We changed PAGE_OFFSET to be a variable rather than a constant, but this reference here in the hibernate assembler got missed. Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			131 lines
		
	
	
	
		
			2.3 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			131 lines
		
	
	
	
		
			2.3 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
/*
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 * hibernate_asm.S:  Hibernaton support specific for sparc64.
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 *
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 * Copyright (C) 2013 Kirill V Tkhai (tkhai@yandex.ru)
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 */
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/cpudata.h>
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#include <asm/page.h>
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ENTRY(swsusp_arch_suspend)
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	save	%sp, -128, %sp
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	save	%sp, -128, %sp
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	flushw
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	setuw	saved_context, %g3
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	/* Save window regs */
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	rdpr	%cwp, %g2
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	stx	%g2, [%g3 + SC_REG_CWP]
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	rdpr	%wstate, %g2
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	stx	%g2, [%g3 + SC_REG_WSTATE]
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	stx	%fp, [%g3 + SC_REG_FP]
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	/* Save state regs */
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	rdpr	%tick, %g2
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	stx	%g2, [%g3 + SC_REG_TICK]
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	rdpr	%pstate, %g2
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	stx	%g2, [%g3 + SC_REG_PSTATE]
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	/* Save global regs */
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	stx	%g4, [%g3 + SC_REG_G4]
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	stx	%g5, [%g3 + SC_REG_G5]
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	stx	%g6, [%g3 + SC_REG_G6]
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	call	swsusp_save
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	 nop
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	mov	%o0, %i0
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	restore
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	mov	%o0, %i0
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	ret
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	 restore
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ENTRY(swsusp_arch_resume)
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	/* Write restore_pblist to %l0 */
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	sethi	%hi(restore_pblist), %l0
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	ldx	[%l0 + %lo(restore_pblist)], %l0
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	call	__flush_tlb_all
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	 nop
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	/* Write PAGE_OFFSET to %g7 */
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	sethi	%hi(PAGE_OFFSET), %g7
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	ldx	[%g7 + %lo(PAGE_OFFSET)], %g7
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	setuw	(PAGE_SIZE-8), %g3
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	/* Use MMU Bypass */
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	rd	%asi, %g1
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	wr	%g0, ASI_PHYS_USE_EC, %asi
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	ba	fill_itlb
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	 nop
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pbe_loop:
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	cmp	%l0, %g0
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	be	restore_ctx
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	 sub	%l0, %g7, %l0
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	ldxa	[%l0    ] %asi, %l1 /* address */
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	ldxa	[%l0 + 8] %asi, %l2 /* orig_address */
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	/* phys addr */
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	sub	%l1, %g7, %l1
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	sub	%l2, %g7, %l2
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	mov	%g3, %l3 /* PAGE_SIZE-8 */
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copy_loop:
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	ldxa	[%l1 + %l3] ASI_PHYS_USE_EC, %g2
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	stxa	%g2, [%l2 + %l3] ASI_PHYS_USE_EC
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	cmp	%l3, %g0
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	bne	copy_loop
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	 sub	%l3, 8, %l3
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	/* next pbe */
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	ba	pbe_loop
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	 ldxa	[%l0 + 16] %asi, %l0
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restore_ctx:
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	setuw	saved_context, %g3
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	/* Restore window regs */
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	wrpr    %g0, 0, %canrestore
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	wrpr    %g0, 0, %otherwin
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	wrpr	%g0, 6, %cansave
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	wrpr    %g0, 0, %cleanwin
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	ldxa	[%g3 + SC_REG_CWP] %asi, %g2
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	wrpr	%g2, %cwp
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	ldxa	[%g3 + SC_REG_WSTATE] %asi, %g2
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	wrpr	%g2, %wstate
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	ldxa	[%g3 + SC_REG_FP] %asi, %fp
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	/* Restore state regs */
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	ldxa	[%g3 + SC_REG_PSTATE] %asi, %g2
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	wrpr	%g2, %pstate
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	ldxa	[%g3 + SC_REG_TICK] %asi, %g2
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	wrpr	%g2, %tick
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	/* Restore global regs */
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	ldxa	[%g3 + SC_REG_G4] %asi, %g4
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	ldxa	[%g3 + SC_REG_G5] %asi, %g5
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	ldxa	[%g3 + SC_REG_G6] %asi, %g6
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	wr	%g1, %g0, %asi
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	restore
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	restore
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	wrpr	%g0, 14, %pil
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	retl
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	 mov	%g0, %o0
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fill_itlb:
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	ba	pbe_loop
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	 wrpr	%g0, 15, %pil
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