 19e2f6fe96
			
		
	
	
	19e2f6fe96
	
	
	
		
			
			Since sungem_phy is used by multiple, unrelated, drivers make it build as a real module under drivers/net. depmod will pick up the symbol dependency and make sure sungem_phy.ko gets loaded any time sungem.ko or spider_net.ko is loaded. Tested-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			132 lines
		
	
	
	
		
			3.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			132 lines
		
	
	
	
		
			3.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef __SUNGEM_PHY_H__
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| #define __SUNGEM_PHY_H__
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| 
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| struct mii_phy;
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| 
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| /* Operations supported by any kind of PHY */
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| struct mii_phy_ops
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| {
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| 	int		(*init)(struct mii_phy *phy);
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| 	int		(*suspend)(struct mii_phy *phy);
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| 	int		(*setup_aneg)(struct mii_phy *phy, u32 advertise);
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| 	int		(*setup_forced)(struct mii_phy *phy, int speed, int fd);
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| 	int		(*poll_link)(struct mii_phy *phy);
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| 	int		(*read_link)(struct mii_phy *phy);
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| 	int		(*enable_fiber)(struct mii_phy *phy, int autoneg);
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| };
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| 
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| /* Structure used to statically define an mii/gii based PHY */
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| struct mii_phy_def
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| {
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| 	u32				phy_id;		/* Concatenated ID1 << 16 | ID2 */
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| 	u32				phy_id_mask;	/* Significant bits */
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| 	u32				features;	/* Ethtool SUPPORTED_* defines */
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| 	int				magic_aneg;	/* Autoneg does all speed test for us */
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| 	const char*			name;
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| 	const struct mii_phy_ops*	ops;
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| };
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| 
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| enum {
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| 	BCM54XX_COPPER,
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| 	BCM54XX_FIBER,
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| 	BCM54XX_GBIC,
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| 	BCM54XX_SGMII,
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| 	BCM54XX_UNKNOWN,
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| };
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| 
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| /* An instance of a PHY, partially borrowed from mii_if_info */
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| struct mii_phy
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| {
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| 	struct mii_phy_def*	def;
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| 	u32			advertising;
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| 	int			mii_id;
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| 
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| 	/* 1: autoneg enabled, 0: disabled */
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| 	int			autoneg;
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| 
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| 	/* forced speed & duplex (no autoneg)
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| 	 * partner speed & duplex & pause (autoneg)
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| 	 */
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| 	int			speed;
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| 	int			duplex;
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| 	int			pause;
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| 
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| 	/* Provided by host chip */
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| 	struct net_device	*dev;
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| 	int (*mdio_read) (struct net_device *dev, int mii_id, int reg);
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| 	void (*mdio_write) (struct net_device *dev, int mii_id, int reg, int val);
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| 	void			*platform_data;
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| };
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| 
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| /* Pass in a struct mii_phy with dev, mdio_read and mdio_write
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|  * filled, the remaining fields will be filled on return
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|  */
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| extern int sungem_phy_probe(struct mii_phy *phy, int mii_id);
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| 
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| 
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| /* MII definitions missing from mii.h */
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| 
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| #define BMCR_SPD2	0x0040		/* Gigabit enable (bcm54xx)	*/
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| #define LPA_PAUSE	0x0400
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| 
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| /* More PHY registers (model specific) */
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| 
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| /* MII BCM5201 MULTIPHY interrupt register */
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| #define MII_BCM5201_INTERRUPT			0x1A
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| #define MII_BCM5201_INTERRUPT_INTENABLE		0x4000
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| 
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| #define MII_BCM5201_AUXMODE2			0x1B
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| #define MII_BCM5201_AUXMODE2_LOWPOWER		0x0008
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| 
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| #define MII_BCM5201_MULTIPHY                    0x1E
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| 
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| /* MII BCM5201 MULTIPHY register bits */
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| #define MII_BCM5201_MULTIPHY_SERIALMODE         0x0002
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| #define MII_BCM5201_MULTIPHY_SUPERISOLATE       0x0008
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| 
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| /* MII BCM5221 Additional registers */
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| #define MII_BCM5221_TEST			0x1f
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| #define MII_BCM5221_TEST_ENABLE_SHADOWS		0x0080
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| #define MII_BCM5221_SHDOW_AUX_STAT2		0x1b
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| #define MII_BCM5221_SHDOW_AUX_STAT2_APD		0x0020
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| #define MII_BCM5221_SHDOW_AUX_MODE4		0x1a
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| #define MII_BCM5221_SHDOW_AUX_MODE4_IDDQMODE	0x0001
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| #define MII_BCM5221_SHDOW_AUX_MODE4_CLKLOPWR	0x0004
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| 
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| /* MII BCM5241 Additional registers */
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| #define MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR	0x0008
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| 
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| /* MII BCM5400 1000-BASET Control register */
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| #define MII_BCM5400_GB_CONTROL			0x09
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| #define MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP	0x0200
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| 
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| /* MII BCM5400 AUXCONTROL register */
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| #define MII_BCM5400_AUXCONTROL                  0x18
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| #define MII_BCM5400_AUXCONTROL_PWR10BASET       0x0004
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| 
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| /* MII BCM5400 AUXSTATUS register */
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| #define MII_BCM5400_AUXSTATUS                   0x19
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| #define MII_BCM5400_AUXSTATUS_LINKMODE_MASK     0x0700
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| #define MII_BCM5400_AUXSTATUS_LINKMODE_SHIFT    8
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| 
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| /* 1000BT control (Marvell & BCM54xx at least) */
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| #define MII_1000BASETCONTROL			0x09
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| #define MII_1000BASETCONTROL_FULLDUPLEXCAP	0x0200
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| #define MII_1000BASETCONTROL_HALFDUPLEXCAP	0x0100
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| 
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| /* Marvell 88E1011 PHY control */
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| #define MII_M1011_PHY_SPEC_CONTROL		0x10
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| #define MII_M1011_PHY_SPEC_CONTROL_MANUAL_MDIX	0x20
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| #define MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX	0x40
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| 
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| /* Marvell 88E1011 PHY status */
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| #define MII_M1011_PHY_SPEC_STATUS		0x11
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| #define MII_M1011_PHY_SPEC_STATUS_1000		0x8000
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| #define MII_M1011_PHY_SPEC_STATUS_100		0x4000
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| #define MII_M1011_PHY_SPEC_STATUS_SPD_MASK	0xc000
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| #define MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX	0x2000
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| #define MII_M1011_PHY_SPEC_STATUS_RESOLVED	0x0800
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| #define MII_M1011_PHY_SPEC_STATUS_TX_PAUSE	0x0008
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| #define MII_M1011_PHY_SPEC_STATUS_RX_PAUSE	0x0004
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| 
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| #endif /* __SUNGEM_PHY_H__ */
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