1ec93b9b17
The valid gpio is GPIO0 ~ GPIO58, so ngpio should be 59. This patch also renames RDC321X_MAX_GPIO to RDC321X_NUM_GPIO because it actually means the number of available GPIOs. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
26 lines
552 B
C
26 lines
552 B
C
#ifndef __RDC321X_MFD_H
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#define __RDC321X_MFD_H
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#include <linux/types.h>
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#include <linux/pci.h>
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/* Offsets to be accessed in the southbridge PCI
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* device configuration register */
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#define RDC321X_WDT_CTRL 0x44
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#define RDC321X_GPIO_CTRL_REG1 0x48
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#define RDC321X_GPIO_DATA_REG1 0x4c
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#define RDC321X_GPIO_CTRL_REG2 0x84
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#define RDC321X_GPIO_DATA_REG2 0x88
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#define RDC321X_NUM_GPIO 59
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struct rdc321x_gpio_pdata {
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struct pci_dev *sb_pdev;
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unsigned max_gpios;
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};
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struct rdc321x_wdt_pdata {
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struct pci_dev *sb_pdev;
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};
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#endif /* __RDC321X_MFD_H */
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