- Remove the slot and controller controller backend as they are not used. - Document the find pciback_[read|write]_config_[byte|word|dword] to make it easier to find. - Collapse the code from conf_space_capability_msi into pciback_ops.c - Collapse conf_space_capability_[pm|vpd].c in conf_space_capability.c [and remove the conf_space_capability.h file] - Rename all visible functions from pciback to xen_pcibk. - Rename all the printk/pr_info, etc that use the "pciback" to say "xen-pciback". - Convert functions that are not referenced outside the code to be static to save on name space. - Do the same thing for structures that are internal to the driver. - Run checkpatch.pl after the renames and fixup its warnings and fix any compile errors caused by the variable rename - Cleanup any structs that checkpath.pl commented about or just look odd. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
		
			
				
	
	
		
			207 lines
		
	
	
	
		
			4.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			207 lines
		
	
	
	
		
			4.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * PCI Backend - Handles the virtual fields found on the capability lists
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 *               in the configuration space.
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 *
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 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
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 */
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include "pciback.h"
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#include "conf_space.h"
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static LIST_HEAD(capabilities);
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struct xen_pcibk_config_capability {
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	struct list_head cap_list;
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	int capability;
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	/* If the device has the capability found above, add these fields */
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	const struct config_field *fields;
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};
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static const struct config_field caplist_header[] = {
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	{
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	 .offset    = PCI_CAP_LIST_ID,
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	 .size      = 2, /* encompass PCI_CAP_LIST_ID & PCI_CAP_LIST_NEXT */
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	 .u.w.read  = xen_pcibk_read_config_word,
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	 .u.w.write = NULL,
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	},
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	{}
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};
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static inline void register_capability(struct xen_pcibk_config_capability *cap)
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{
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	list_add_tail(&cap->cap_list, &capabilities);
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}
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int xen_pcibk_config_capability_add_fields(struct pci_dev *dev)
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{
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	int err = 0;
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	struct xen_pcibk_config_capability *cap;
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	int cap_offset;
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	list_for_each_entry(cap, &capabilities, cap_list) {
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		cap_offset = pci_find_capability(dev, cap->capability);
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		if (cap_offset) {
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			dev_dbg(&dev->dev, "Found capability 0x%x at 0x%x\n",
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				cap->capability, cap_offset);
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			err = xen_pcibk_config_add_fields_offset(dev,
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							       caplist_header,
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							       cap_offset);
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			if (err)
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				goto out;
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			err = xen_pcibk_config_add_fields_offset(dev,
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							       cap->fields,
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							       cap_offset);
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			if (err)
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				goto out;
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		}
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	}
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out:
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	return err;
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}
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static int vpd_address_write(struct pci_dev *dev, int offset, u16 value,
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			     void *data)
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{
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	/* Disallow writes to the vital product data */
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	if (value & PCI_VPD_ADDR_F)
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		return PCIBIOS_SET_FAILED;
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	else
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		return pci_write_config_word(dev, offset, value);
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}
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static const struct config_field caplist_vpd[] = {
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	{
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	 .offset    = PCI_VPD_ADDR,
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	 .size      = 2,
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	 .u.w.read  = xen_pcibk_read_config_word,
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	 .u.w.write = vpd_address_write,
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	 },
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	{
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	 .offset     = PCI_VPD_DATA,
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	 .size       = 4,
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	 .u.dw.read  = xen_pcibk_read_config_dword,
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	 .u.dw.write = NULL,
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	 },
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	{}
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};
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static int pm_caps_read(struct pci_dev *dev, int offset, u16 *value,
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			void *data)
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{
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	int err;
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	u16 real_value;
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	err = pci_read_config_word(dev, offset, &real_value);
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	if (err)
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		goto out;
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	*value = real_value & ~PCI_PM_CAP_PME_MASK;
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out:
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	return err;
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}
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/* PM_OK_BITS specifies the bits that the driver domain is allowed to change.
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 * Can't allow driver domain to enable PMEs - they're shared */
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#define PM_OK_BITS (PCI_PM_CTRL_PME_STATUS|PCI_PM_CTRL_DATA_SEL_MASK)
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static int pm_ctrl_write(struct pci_dev *dev, int offset, u16 new_value,
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			 void *data)
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{
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	int err;
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	u16 old_value;
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	pci_power_t new_state, old_state;
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	err = pci_read_config_word(dev, offset, &old_value);
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	if (err)
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		goto out;
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	old_state = (pci_power_t)(old_value & PCI_PM_CTRL_STATE_MASK);
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	new_state = (pci_power_t)(new_value & PCI_PM_CTRL_STATE_MASK);
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	new_value &= PM_OK_BITS;
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	if ((old_value & PM_OK_BITS) != new_value) {
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		new_value = (old_value & ~PM_OK_BITS) | new_value;
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		err = pci_write_config_word(dev, offset, new_value);
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		if (err)
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			goto out;
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	}
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	/* Let pci core handle the power management change */
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	dev_dbg(&dev->dev, "set power state to %x\n", new_state);
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	err = pci_set_power_state(dev, new_state);
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	if (err) {
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		err = PCIBIOS_SET_FAILED;
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		goto out;
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	}
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 out:
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	return err;
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}
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/* Ensure PMEs are disabled */
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static void *pm_ctrl_init(struct pci_dev *dev, int offset)
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{
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	int err;
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	u16 value;
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	err = pci_read_config_word(dev, offset, &value);
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	if (err)
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		goto out;
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	if (value & PCI_PM_CTRL_PME_ENABLE) {
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		value &= ~PCI_PM_CTRL_PME_ENABLE;
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		err = pci_write_config_word(dev, offset, value);
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	}
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out:
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	return ERR_PTR(err);
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}
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static const struct config_field caplist_pm[] = {
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	{
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		.offset     = PCI_PM_PMC,
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		.size       = 2,
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		.u.w.read   = pm_caps_read,
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	},
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	{
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		.offset     = PCI_PM_CTRL,
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		.size       = 2,
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		.init       = pm_ctrl_init,
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		.u.w.read   = xen_pcibk_read_config_word,
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		.u.w.write  = pm_ctrl_write,
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	},
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	{
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		.offset     = PCI_PM_PPB_EXTENSIONS,
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		.size       = 1,
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		.u.b.read   = xen_pcibk_read_config_byte,
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	},
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	{
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		.offset     = PCI_PM_DATA_REGISTER,
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		.size       = 1,
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		.u.b.read   = xen_pcibk_read_config_byte,
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	},
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	{}
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};
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static struct xen_pcibk_config_capability xen_pcibk_config_capability_pm = {
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	.capability = PCI_CAP_ID_PM,
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	.fields = caplist_pm,
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};
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static struct xen_pcibk_config_capability xen_pcibk_config_capability_vpd = {
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	.capability = PCI_CAP_ID_VPD,
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	.fields = caplist_vpd,
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};
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int xen_pcibk_config_capability_init(void)
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{
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	register_capability(&xen_pcibk_config_capability_vpd);
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	register_capability(&xen_pcibk_config_capability_pm);
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	return 0;
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}
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