Since mmc_of_parse() may fail, let's deal with it and thus do proper error handling. Cc: Christian Daudt <bcm@fixthebug.org> Cc: Matt Porter <mporter@linaro.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
		
			
				
	
	
		
			374 lines
		
	
	
	
		
			10 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			374 lines
		
	
	
	
		
			10 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2013 Broadcom Corporation
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation version 2.
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 *
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 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
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 * kind, whether express or implied; without even the implied warranty
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 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/highmem.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/clk.h>
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#include <linux/regulator/consumer.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/mmc/slot-gpio.h>
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#include "sdhci-pltfm.h"
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#include "sdhci.h"
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#define SDHCI_SOFT_RESET			0x01000000
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#define KONA_SDHOST_CORECTRL			0x8000
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#define KONA_SDHOST_CD_PINCTRL			0x00000008
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#define KONA_SDHOST_STOP_HCLK			0x00000004
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#define KONA_SDHOST_RESET			0x00000002
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#define KONA_SDHOST_EN				0x00000001
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#define KONA_SDHOST_CORESTAT			0x8004
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#define KONA_SDHOST_WP				0x00000002
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#define KONA_SDHOST_CD_SW			0x00000001
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#define KONA_SDHOST_COREIMR			0x8008
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#define KONA_SDHOST_IP				0x00000001
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#define KONA_SDHOST_COREISR			0x800C
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#define KONA_SDHOST_COREIMSR			0x8010
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#define KONA_SDHOST_COREDBG1			0x8014
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#define KONA_SDHOST_COREGPO_MASK		0x8018
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#define SD_DETECT_GPIO_DEBOUNCE_128MS		128
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#define KONA_MMC_AUTOSUSPEND_DELAY		(50)
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struct sdhci_bcm_kona_dev {
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	struct mutex	write_lock; /* protect back to back writes */
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	struct clk	*external_clk;
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};
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static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
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{
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	unsigned int val;
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	unsigned long timeout;
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	/* This timeout should be sufficent for core to reset */
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	timeout = jiffies + msecs_to_jiffies(100);
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	/* reset the host using the top level reset */
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	val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
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	val |= KONA_SDHOST_RESET;
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	sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
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	while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
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		if (time_is_before_jiffies(timeout)) {
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			pr_err("Error: sd host is stuck in reset!!!\n");
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			return -EFAULT;
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		}
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	}
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	/* bring the host out of reset */
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	val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
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	val &= ~KONA_SDHOST_RESET;
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	/*
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	 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
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	 * Back-to-Back writes to same register needs delay when SD bus clock
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	 * is very low w.r.t AHB clock, mainly during boot-time and during card
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	 * insert-removal.
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	 */
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	usleep_range(1000, 5000);
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	sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
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	return 0;
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}
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static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
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{
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	unsigned int val;
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	/* enable the interrupt from the IP core */
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	val = sdhci_readl(host, KONA_SDHOST_COREIMR);
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	val |= KONA_SDHOST_IP;
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	sdhci_writel(host, val, KONA_SDHOST_COREIMR);
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	/* Enable the AHB clock gating module to the host */
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	val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
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	val |= KONA_SDHOST_EN;
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	/*
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	 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
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	 * Back-to-Back writes to same register needs delay when SD bus clock
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	 * is very low w.r.t AHB clock, mainly during boot-time and during card
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	 * insert-removal.
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	 */
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	usleep_range(1000, 5000);
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	sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
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}
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/*
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 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
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 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
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 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
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 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
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 */
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static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
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{
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	struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
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	struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
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	u32 val;
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	/*
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	 * Back-to-Back register write needs a delay of min 10uS.
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	 * Back-to-Back writes to same register needs delay when SD bus clock
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	 * is very low w.r.t AHB clock, mainly during boot-time and during card
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	 * insert-removal.
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	 * We keep 20uS
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	 */
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	mutex_lock(&kona_dev->write_lock);
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	udelay(20);
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	val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
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	if (insert) {
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		int ret;
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		ret = mmc_gpio_get_ro(host->mmc);
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		if (ret >= 0)
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			val = (val & ~KONA_SDHOST_WP) |
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				((ret) ? KONA_SDHOST_WP : 0);
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		val |= KONA_SDHOST_CD_SW;
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		sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
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	} else {
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		val &= ~KONA_SDHOST_CD_SW;
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		sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
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	}
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	mutex_unlock(&kona_dev->write_lock);
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	return 0;
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}
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/*
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 * SD card interrupt event callback
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 */
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static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
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{
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	if (mmc_gpio_get_cd(host->mmc) > 0) {
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		dev_dbg(mmc_dev(host->mmc),
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			"card inserted\n");
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		sdhci_bcm_kona_sd_card_emulate(host, 1);
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	} else {
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		dev_dbg(mmc_dev(host->mmc),
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			"card removed\n");
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		sdhci_bcm_kona_sd_card_emulate(host, 0);
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	}
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}
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/*
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 * Get the base clock. Use central clock source for now. Not sure if different
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 * clock speed to each dev is allowed
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 */
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static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
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{
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	struct sdhci_bcm_kona_dev *kona_dev;
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	struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
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	kona_dev = sdhci_pltfm_priv(pltfm_priv);
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	return host->mmc->f_max;
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}
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static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
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{
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	return sdhci_bcm_kona_get_max_clk(host);
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}
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static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
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				u8 power_mode)
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{
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	/*
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	 *  JEDEC and SD spec specify supplying 74 continuous clocks to
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	 * device after power up. With minimum bus (100KHz) that
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	 * that translates to 740us
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	 */
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	if (power_mode != MMC_POWER_OFF)
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		udelay(740);
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}
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static struct sdhci_ops sdhci_bcm_kona_ops = {
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	.set_clock = sdhci_set_clock,
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	.get_max_clock = sdhci_bcm_kona_get_max_clk,
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	.get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
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	.platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
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	.set_bus_width = sdhci_set_bus_width,
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	.reset = sdhci_reset,
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	.set_uhs_signaling = sdhci_set_uhs_signaling,
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	.card_event = sdhci_bcm_kona_card_event,
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};
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static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
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	.ops    = &sdhci_bcm_kona_ops,
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	.quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
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		SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
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		SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
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		SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
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		SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
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};
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static const struct of_device_id sdhci_bcm_kona_of_match[] = {
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	{ .compatible = "brcm,kona-sdhci"},
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	{ .compatible = "bcm,kona-sdhci"}, /* deprecated name */
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	{}
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};
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MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
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static int sdhci_bcm_kona_probe(struct platform_device *pdev)
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{
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	struct sdhci_bcm_kona_dev *kona_dev = NULL;
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	struct sdhci_pltfm_host *pltfm_priv;
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	struct device *dev = &pdev->dev;
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	struct sdhci_host *host;
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	int ret;
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	ret = 0;
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	host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
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			sizeof(*kona_dev));
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	if (IS_ERR(host))
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		return PTR_ERR(host);
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	dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
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	pltfm_priv = sdhci_priv(host);
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	kona_dev = sdhci_pltfm_priv(pltfm_priv);
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	mutex_init(&kona_dev->write_lock);
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	ret = mmc_of_parse(host->mmc);
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	if (ret)
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		goto err_pltfm_free;
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	if (!host->mmc->f_max) {
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		dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
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		ret = -ENXIO;
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		goto err_pltfm_free;
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	}
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	/* Get and enable the external clock */
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	kona_dev->external_clk = devm_clk_get(dev, NULL);
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	if (IS_ERR(kona_dev->external_clk)) {
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		dev_err(dev, "Failed to get external clock\n");
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		ret = PTR_ERR(kona_dev->external_clk);
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		goto err_pltfm_free;
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	}
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	if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) {
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		dev_err(dev, "Failed to set rate external clock\n");
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		goto err_pltfm_free;
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	}
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	if (clk_prepare_enable(kona_dev->external_clk) != 0) {
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		dev_err(dev, "Failed to enable external clock\n");
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		goto err_pltfm_free;
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	}
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	dev_dbg(dev, "non-removable=%c\n",
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		(host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
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	dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
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		(mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
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		(mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
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	if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
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		host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
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	dev_dbg(dev, "is_8bit=%c\n",
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		(host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
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	ret = sdhci_bcm_kona_sd_reset(host);
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	if (ret)
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		goto err_clk_disable;
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	sdhci_bcm_kona_sd_init(host);
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	ret = sdhci_add_host(host);
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	if (ret) {
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		dev_err(dev, "Failed sdhci_add_host\n");
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		goto err_reset;
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	}
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	/* if device is eMMC, emulate card insert right here */
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	if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
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		ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
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		if (ret) {
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			dev_err(dev,
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				"unable to emulate card insertion\n");
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			goto err_remove_host;
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		}
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	}
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	/*
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	 * Since the card detection GPIO interrupt is configured to be
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	 * edge sensitive, check the initial GPIO value here, emulate
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	 * only if the card is present
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	 */
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	if (mmc_gpio_get_cd(host->mmc) > 0)
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		sdhci_bcm_kona_sd_card_emulate(host, 1);
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	dev_dbg(dev, "initialized properly\n");
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	return 0;
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err_remove_host:
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	sdhci_remove_host(host, 0);
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err_reset:
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	sdhci_bcm_kona_sd_reset(host);
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err_clk_disable:
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	clk_disable_unprepare(kona_dev->external_clk);
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err_pltfm_free:
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	sdhci_pltfm_free(pdev);
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	dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
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	return ret;
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}
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static int sdhci_bcm_kona_remove(struct platform_device *pdev)
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{
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	struct sdhci_host *host = platform_get_drvdata(pdev);
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	struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
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	struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
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	int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
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	sdhci_remove_host(host, dead);
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	clk_disable_unprepare(kona_dev->external_clk);
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	sdhci_pltfm_free(pdev);
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	return 0;
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}
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static struct platform_driver sdhci_bcm_kona_driver = {
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	.driver		= {
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		.name	= "sdhci-kona",
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		.pm	= SDHCI_PLTFM_PMOPS,
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		.of_match_table = sdhci_bcm_kona_of_match,
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	},
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	.probe		= sdhci_bcm_kona_probe,
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	.remove		= sdhci_bcm_kona_remove,
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};
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module_platform_driver(sdhci_bcm_kona_driver);
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MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
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MODULE_AUTHOR("Broadcom");
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MODULE_LICENSE("GPL v2");
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