Parse the GIC timer frequency and interrupt from the device-tree. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8421/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			166 lines
		
	
	
	
		
			4 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			166 lines
		
	
	
	
		
			4 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * This file is subject to the terms and conditions of the GNU General Public
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 * License.  See the file "COPYING" in the main directory of this archive
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 * for more details.
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 *
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 * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
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 */
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#include <linux/clockchips.h>
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip/mips-gic.h>
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#include <linux/notifier.h>
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#include <linux/of_irq.h>
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#include <linux/percpu.h>
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#include <linux/smp.h>
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#include <linux/time.h>
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static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
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static int gic_timer_irq;
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static unsigned int gic_frequency;
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static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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	u64 cnt;
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	int res;
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	cnt = gic_read_count();
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	cnt += (u64)delta;
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	gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
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	res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
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	return res;
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}
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static void gic_set_clock_mode(enum clock_event_mode mode,
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				struct clock_event_device *evt)
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{
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	/* Nothing to do ...  */
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}
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static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
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{
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	struct clock_event_device *cd = dev_id;
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	gic_write_compare(gic_read_compare());
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	cd->event_handler(cd);
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	return IRQ_HANDLED;
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}
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struct irqaction gic_compare_irqaction = {
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	.handler = gic_compare_interrupt,
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	.percpu_dev_id = &gic_clockevent_device,
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	.flags = IRQF_PERCPU | IRQF_TIMER,
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	.name = "timer",
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};
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static void gic_clockevent_cpu_init(struct clock_event_device *cd)
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{
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	unsigned int cpu = smp_processor_id();
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	cd->name		= "MIPS GIC";
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	cd->features		= CLOCK_EVT_FEAT_ONESHOT |
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				  CLOCK_EVT_FEAT_C3STOP;
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	cd->rating		= 350;
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	cd->irq			= gic_timer_irq;
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	cd->cpumask		= cpumask_of(cpu);
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	cd->set_next_event	= gic_next_event;
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	cd->set_mode		= gic_set_clock_mode;
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	clockevents_config_and_register(cd, gic_frequency, 0x300, 0x7fffffff);
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	enable_percpu_irq(gic_timer_irq, IRQ_TYPE_NONE);
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}
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static void gic_clockevent_cpu_exit(struct clock_event_device *cd)
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{
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	disable_percpu_irq(gic_timer_irq);
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}
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static int gic_cpu_notifier(struct notifier_block *nb, unsigned long action,
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				void *data)
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{
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	switch (action & ~CPU_TASKS_FROZEN) {
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	case CPU_STARTING:
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		gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
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		break;
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	case CPU_DYING:
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		gic_clockevent_cpu_exit(this_cpu_ptr(&gic_clockevent_device));
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		break;
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	}
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	return NOTIFY_OK;
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}
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static struct notifier_block gic_cpu_nb = {
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	.notifier_call = gic_cpu_notifier,
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};
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static int gic_clockevent_init(void)
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{
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	if (!cpu_has_counter || !gic_frequency)
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		return -ENXIO;
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	setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
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	register_cpu_notifier(&gic_cpu_nb);
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	gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
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	return 0;
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}
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static cycle_t gic_hpt_read(struct clocksource *cs)
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{
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	return gic_read_count();
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}
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static struct clocksource gic_clocksource = {
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	.name	= "GIC",
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	.read	= gic_hpt_read,
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	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static void __init __gic_clocksource_init(void)
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{
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	/* Set clocksource mask. */
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	gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
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	/* Calculate a somewhat reasonable rating value. */
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	gic_clocksource.rating = 200 + gic_frequency / 10000000;
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	clocksource_register_hz(&gic_clocksource, gic_frequency);
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	gic_clockevent_init();
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}
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void __init gic_clocksource_init(unsigned int frequency)
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{
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	gic_frequency = frequency;
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	gic_timer_irq = MIPS_GIC_IRQ_BASE +
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		GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
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	__gic_clocksource_init();
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}
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static void __init gic_clocksource_of_init(struct device_node *node)
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{
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	if (WARN_ON(!gic_present || !node->parent ||
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		    !of_device_is_compatible(node->parent, "mti,gic")))
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		return;
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	if (of_property_read_u32(node, "clock-frequency", &gic_frequency)) {
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		pr_err("GIC frequency not specified.\n");
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		return;
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	}
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	gic_timer_irq = irq_of_parse_and_map(node, 0);
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	if (!gic_timer_irq) {
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		pr_err("GIC timer IRQ not specified.\n");
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		return;
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	}
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	__gic_clocksource_init();
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}
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CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
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		       gic_clocksource_of_init);
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