 f29ad10de6
			
		
	
	
	f29ad10de6
	
	
	
		
			
			- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data. (It seems that the MAC controller of LS1B v2.0 can only accept pbl=1) - Add GMAC1 support and setup MUX in terms of PHY mode. - Add CPUFreq support. - Add MUX Register Definitions. - Add PWM Register Definitions. - Update clock register bitfields according to the latest spec. - Update clock related stuff. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8024/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			50 lines
		
	
	
	
		
			1.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			50 lines
		
	
	
	
		
			1.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
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|  *
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|  * Register mappings for Loongson 1
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|  *
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|  * This program is free software; you can redistribute	it and/or modify it
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|  * under  the terms of	the GNU General	 Public License as published by the
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|  * Free Software Foundation;  either version 2 of the  License, or (at your
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|  * option) any later version.
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|  */
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| 
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| 
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| #ifndef __ASM_MACH_LOONGSON1_LOONGSON1_H
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| #define __ASM_MACH_LOONGSON1_LOONGSON1_H
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| 
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| #define DEFAULT_MEMSIZE			256	/* If no memsize provided */
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| 
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| /* Loongson 1 Register Bases */
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| #define LS1X_MUX_BASE			0x1fd00420
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| #define LS1X_INTC_BASE			0x1fd01040
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| #define LS1X_EHCI_BASE			0x1fe00000
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| #define LS1X_OHCI_BASE			0x1fe08000
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| #define LS1X_GMAC0_BASE			0x1fe10000
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| #define LS1X_GMAC1_BASE			0x1fe20000
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| 
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| #define LS1X_UART0_BASE			0x1fe40000
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| #define LS1X_UART1_BASE			0x1fe44000
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| #define LS1X_UART2_BASE			0x1fe48000
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| #define LS1X_UART3_BASE			0x1fe4c000
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| #define LS1X_CAN0_BASE			0x1fe50000
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| #define LS1X_CAN1_BASE			0x1fe54000
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| #define LS1X_I2C0_BASE			0x1fe58000
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| #define LS1X_I2C1_BASE			0x1fe68000
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| #define LS1X_I2C2_BASE			0x1fe70000
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| #define LS1X_PWM0_BASE			0x1fe5c000
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| #define LS1X_PWM1_BASE			0x1fe5c010
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| #define LS1X_PWM2_BASE			0x1fe5c020
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| #define LS1X_PWM3_BASE			0x1fe5c030
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| #define LS1X_WDT_BASE			0x1fe5c060
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| #define LS1X_RTC_BASE			0x1fe64000
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| #define LS1X_AC97_BASE			0x1fe74000
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| #define LS1X_NAND_BASE			0x1fe78000
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| #define LS1X_CLK_BASE			0x1fe78030
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| 
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| #include <regs-clk.h>
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| #include <regs-mux.h>
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| #include <regs-pwm.h>
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| #include <regs-wdt.h>
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| 
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| #endif /* __ASM_MACH_LOONGSON1_LOONGSON1_H */
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