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	28963b1e20
	
	
	
		
			
			Some of the TLB bit definitions in <asm/pgtable-bits.h> have become rather complex and are no longer usable from assembler resulting in an explosion like this: AS arch/mips/kernel/head.o arch/mips/kernel/head.S: Assembler messages: arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(1<<((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)' make[2]: *** [arch/mips/kernel/head.o] Error 1 Since now MAPPED_KERNEL_SETUP_TLB is in platform-specific code it's safe to hardcode the TLB bits there. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			106 lines
		
	
	
	
		
			2.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			106 lines
		
	
	
	
		
			2.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * Copyright (C) 2000 Silicon Graphics, Inc.
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|  * Copyright (C) 2005 Ralf Baechle <ralf@linux-mips.org>
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|  */
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| #ifndef __ASM_MACH_IP27_KERNEL_ENTRY_H
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| #define __ASM_MACH_IP27_KERNEL_ENTRY_H
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| 
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| #include <asm/sn/addrs.h>
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| #include <asm/sn/sn0/hubni.h>
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| #include <asm/sn/klkernvars.h>
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| 
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| /*
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|  * Returns the local nasid into res.
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|  */
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| 	.macro GET_NASID_ASM res
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| 	dli	\res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
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| 	ld	\res, (\res)
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| 	and	\res, NSRI_NODEID_MASK
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| 	dsrl	\res, NSRI_NODEID_SHFT
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| 	.endm
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| 
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| /*
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|  * TLB bits
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|  */
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| #define PAGE_GLOBAL		(1 << 6)
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| #define PAGE_VALID		(1 << 7)
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| #define PAGE_DIRTY		(1 << 8)
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| #define CACHE_CACHABLE_COW	(5 << 9)
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| 
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| 	/*
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| 	 * inputs are the text nasid in t1, data nasid in t2.
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| 	 */
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| 	.macro MAPPED_KERNEL_SETUP_TLB
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| #ifdef CONFIG_MAPPED_KERNEL
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| 	/*
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| 	 * This needs to read the nasid - assume 0 for now.
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| 	 * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
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| 	 * 0+DVG in tlblo_1.
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| 	 */
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| 	dli	t0, 0xffffffffc0000000
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| 	dmtc0	t0, CP0_ENTRYHI
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| 	li	t0, 0x1c000		# Offset of text into node memory
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| 	dsll	t1, NASID_SHFT		# Shift text nasid into place
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| 	dsll	t2, NASID_SHFT		# Same for data nasid
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| 	or	t1, t1, t0		# Physical load address of kernel text
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| 	or	t2, t2, t0		# Physical load address of kernel data
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| 	dsrl	t1, 12			# 4K pfn
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| 	dsrl	t2, 12			# 4K pfn
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| 	dsll	t1, 6			# Get pfn into place
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| 	dsll	t2, 6			# Get pfn into place
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| 	li	t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6)
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| 	or	t0, t0, t1
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| 	mtc0	t0, CP0_ENTRYLO0	# physaddr, VG, cach exlwr
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| 	li	t0, ((PAGE_GLOBAL | PAGE_VALID |  PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6)
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| 	or	t0, t0, t2
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| 	mtc0	t0, CP0_ENTRYLO1	# physaddr, DVG, cach exlwr
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| 	li	t0, 0x1ffe000		# MAPPED_KERN_TLBMASK, TLBPGMASK_16M
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| 	mtc0	t0, CP0_PAGEMASK
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| 	li	t0, 0			# KMAP_INX
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| 	mtc0	t0, CP0_INDEX
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| 	li	t0, 1
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| 	mtc0	t0, CP0_WIRED
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| 	tlbwi
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| #else
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| 	mtc0	zero, CP0_WIRED
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| #endif
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| 	.endm
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| 
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| /*
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|  * Intentionally empty macro, used in head.S. Override in
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|  * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
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|  */
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| 	.macro	kernel_entry_setup
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| 	GET_NASID_ASM	t1
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| 	move		t2, t1			# text and data are here
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| 	MAPPED_KERNEL_SETUP_TLB
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| 	.endm
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| 
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| /*
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|  * Do SMP slave processor setup necessary before we can savely execute C code.
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|  */
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| 	.macro	smp_slave_setup
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| 	GET_NASID_ASM	t1
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| 	dli	t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
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| 		    KLDIR_OFF_POINTER + CAC_BASE
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| 	dsll	t1, NASID_SHFT
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| 	or	t0, t0, t1
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| 	ld	t0, 0(t0)			# t0 points to kern_vars struct
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| 	lh	t1, KV_RO_NASID_OFFSET(t0)
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| 	lh	t2, KV_RW_NASID_OFFSET(t0)
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| 	MAPPED_KERNEL_SETUP_TLB
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| 
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| 	/*
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| 	 * We might not get launched at the address the kernel is linked to,
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| 	 * so we jump there.
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| 	 */
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| 	PTR_LA	t0, 0f
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| 	jr	t0
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| 0:
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| 	.endm
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| 
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| #endif /* __ASM_MACH_IP27_KERNEL_ENTRY_H */
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