75c4fd8c78
This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com>
151 lines
3.9 KiB
C
151 lines
3.9 KiB
C
/*
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* Copyright (C) 2008 Scientific-Atlanta, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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* The file comes from kernel/csrc-r4k.c
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*/
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <asm/time.h> /* Not included in linux/time.h */
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#include <asm/mach-powertv/asic_regs.h>
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#include "powertv-clock.h"
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/* MIPS PLL Register Definitions */
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#define PLL_GET_M(x) (((x) >> 8) & 0x000000FF)
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#define PLL_GET_N(x) (((x) >> 16) & 0x000000FF)
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#define PLL_GET_P(x) (((x) >> 24) & 0x00000007)
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/*
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* returns: Clock frequency in kHz
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*/
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unsigned int __init mips_get_pll_freq(void)
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{
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unsigned int pll_reg, m, n, p;
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unsigned int fin = 54000; /* Base frequency in kHz */
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unsigned int fout;
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/* Read PLL register setting */
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pll_reg = asic_read(mips_pll_setup);
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m = PLL_GET_M(pll_reg);
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n = PLL_GET_N(pll_reg);
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p = PLL_GET_P(pll_reg);
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pr_info("MIPS PLL Register:0x%x M=%d N=%d P=%d\n", pll_reg, m, n, p);
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/* Calculate clock frequency = (2 * N * 54MHz) / (M * (2**P)) */
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fout = ((2 * n * fin) / (m * (0x01 << p)));
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pr_info("MIPS Clock Freq=%d kHz\n", fout);
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return fout;
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}
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static cycle_t c0_hpt_read(struct clocksource *cs)
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{
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return read_c0_count();
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}
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static struct clocksource clocksource_mips = {
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.name = "powertv-counter",
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.read = c0_hpt_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static void __init powertv_c0_hpt_clocksource_init(void)
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{
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unsigned int pll_freq = mips_get_pll_freq();
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pr_info("CPU frequency %d.%02d MHz\n", pll_freq / 1000,
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(pll_freq % 1000) * 100 / 1000);
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mips_hpt_frequency = pll_freq / 2 * 1000;
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clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
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clocksource_register_hz(&clocksource_mips, mips_hpt_frequency);
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}
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/**
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* struct tim_c - free running counter
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* @hi: High 16 bits of the counter
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* @lo: Low 32 bits of the counter
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*
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* Lays out the structure of the free running counter in memory. This counter
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* increments at a rate of 27 MHz/8 on all platforms.
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*/
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struct tim_c {
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unsigned int hi;
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unsigned int lo;
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};
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static struct tim_c *tim_c;
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static cycle_t tim_c_read(struct clocksource *cs)
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{
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unsigned int hi;
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unsigned int next_hi;
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unsigned int lo;
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hi = readl(&tim_c->hi);
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for (;;) {
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lo = readl(&tim_c->lo);
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next_hi = readl(&tim_c->hi);
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if (next_hi == hi)
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break;
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hi = next_hi;
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}
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pr_crit("%s: read %llx\n", __func__, ((u64) hi << 32) | lo);
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return ((u64) hi << 32) | lo;
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}
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#define TIM_C_SIZE 48 /* # bits in the timer */
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static struct clocksource clocksource_tim_c = {
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.name = "powertv-tim_c",
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.read = tim_c_read,
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.mask = CLOCKSOURCE_MASK(TIM_C_SIZE),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/**
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* powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock
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*
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* We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to
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* 1 / (27,000,000/8) seconds.
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*/
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static void __init powertv_tim_c_clocksource_init(void)
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{
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const unsigned long counts_per_second = 27000000 / 8;
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clocksource_tim_c.rating = 200;
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clocksource_register_hz(&clocksource_tim_c, counts_per_second);
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tim_c = (struct tim_c *) asic_reg_addr(tim_ch);
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}
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/**
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powertv_clocksource_init - initialize all clocksources
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*/
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void __init powertv_clocksource_init(void)
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{
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powertv_c0_hpt_clocksource_init();
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powertv_tim_c_clocksource_init();
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}
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