linux-pinenote/drivers/gpu
Tvrtko Ursulin 0fda65680e drm/i915/skl: Update watermarks for Y tiling
Display watermarks need different programming for different tiling
modes.

Set the relevant flag so this happens during the plane commit and
add relevant data into a structure made available to the watermark
computation code.

v2: Pass in tiling info to sprite plane updates as well.
v3: Rebased for plane handling changes.
v4: Handle fb == NULL when plane is disabled.
v5: Refactored for addfb2 interface.
v6: Refactored for fb modifier changes.
v7: Updated for atomic commit by only updating watermarks when tiling changes.
v8: BSpec watermark calculation updates.
v9: Restrict scope of y_tile_minimum variable. (Damien Lespiau)
v10: Get fb from plane state otherwise we are working on old state.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Acked-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v9)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-27 18:10:56 +01:00
..
drm drm/i915/skl: Update watermarks for Y tiling 2015-02-27 18:10:56 +01:00
host1x gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register 2014-11-13 16:11:57 +01:00
ipu-v3 gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calc 2015-01-07 19:15:04 +01:00
vga
Makefile