5f60ed0d84
Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and register a channel with the Tegra DRM driver so that the unit can be used from userspace. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
27 lines
832 B
C
27 lines
832 B
C
/*
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* Copyright (C) 2013 NVIDIA Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef TEGRA_GR3D_H
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#define TEGRA_GR3D_H
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#define GR3D_IDX_ATTRIBUTE(x) (0x100 + (x) * 2)
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#define GR3D_IDX_INDEX_BASE 0x121
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#define GR3D_QR_ZTAG_ADDR 0x415
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#define GR3D_QR_CTAG_ADDR 0x417
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#define GR3D_QR_CZ_ADDR 0x419
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#define GR3D_TEX_TEX_ADDR(x) (0x710 + (x))
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#define GR3D_DW_MEMORY_OUTPUT_ADDRESS 0x904
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#define GR3D_GLOBAL_SURFADDR(x) (0xe00 + (x))
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#define GR3D_GLOBAL_SPILLSURFADDR 0xe2a
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#define GR3D_GLOBAL_SURFOVERADDR(x) (0xe30 + (x))
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#define GR3D_GLOBAL_SAMP01SURFADDR(x) (0xe50 + (x))
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#define GR3D_GLOBAL_SAMP23SURFADDR(x) (0xe60 + (x))
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#define GR3D_NUM_REGS 0xe88
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#endif
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