 e240d55d67
			
		
	
	
	e240d55d67
	
	
	
		
			
			Calling the mode_set hook on DPMS changes doesn't seem to be necessary for ns2501. Just drop it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Thomas Richter <richter@rus.uni-stuttgart.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
		
			
				
	
	
		
			573 lines
		
	
	
	
		
			16 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			573 lines
		
	
	
	
		
			16 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2006 Dave Airlie <airlied@linux.ie>
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|  * Copyright © 2006-2007 Intel Corporation
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a
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|  * copy of this software and associated documentation files (the "Software"),
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|  * to deal in the Software without restriction, including without limitation
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|  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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|  * and/or sell copies of the Software, and to permit persons to whom the
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|  * Software is furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice (including the next
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|  * paragraph) shall be included in all copies or substantial portions of the
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|  * Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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|  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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|  * DEALINGS IN THE SOFTWARE.
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|  *
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|  * Authors:
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|  *	Eric Anholt <eric@anholt.net>
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|  */
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| #include <linux/i2c.h>
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| #include <linux/slab.h>
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| #include <drm/drmP.h>
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| #include <drm/drm_crtc.h>
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| #include "intel_drv.h"
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| #include <drm/i915_drm.h>
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| #include "i915_drv.h"
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| #include "dvo.h"
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| 
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| #define SIL164_ADDR	0x38
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| #define CH7xxx_ADDR	0x76
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| #define TFP410_ADDR	0x38
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| #define NS2501_ADDR     0x38
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| 
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| static const struct intel_dvo_device intel_dvo_devices[] = {
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| 	{
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| 		.type = INTEL_DVO_CHIP_TMDS,
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| 		.name = "sil164",
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| 		.dvo_reg = DVOC,
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| 		.slave_addr = SIL164_ADDR,
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| 		.dev_ops = &sil164_ops,
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| 	},
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| 	{
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| 		.type = INTEL_DVO_CHIP_TMDS,
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| 		.name = "ch7xxx",
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| 		.dvo_reg = DVOC,
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| 		.slave_addr = CH7xxx_ADDR,
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| 		.dev_ops = &ch7xxx_ops,
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| 	},
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| 	{
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| 		.type = INTEL_DVO_CHIP_TMDS,
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| 		.name = "ch7xxx",
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| 		.dvo_reg = DVOC,
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| 		.slave_addr = 0x75, /* For some ch7010 */
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| 		.dev_ops = &ch7xxx_ops,
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| 	},
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| 	{
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| 		.type = INTEL_DVO_CHIP_LVDS,
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| 		.name = "ivch",
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| 		.dvo_reg = DVOA,
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| 		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
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| 		.dev_ops = &ivch_ops,
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| 	},
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| 	{
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| 		.type = INTEL_DVO_CHIP_TMDS,
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| 		.name = "tfp410",
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| 		.dvo_reg = DVOC,
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| 		.slave_addr = TFP410_ADDR,
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| 		.dev_ops = &tfp410_ops,
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| 	},
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| 	{
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| 		.type = INTEL_DVO_CHIP_LVDS,
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| 		.name = "ch7017",
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| 		.dvo_reg = DVOC,
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| 		.slave_addr = 0x75,
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| 		.gpio = GMBUS_PORT_DPB,
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| 		.dev_ops = &ch7017_ops,
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| 	},
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| 	{
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| 	        .type = INTEL_DVO_CHIP_TMDS,
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| 		.name = "ns2501",
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| 		.dvo_reg = DVOB,
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| 		.slave_addr = NS2501_ADDR,
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| 		.dev_ops = &ns2501_ops,
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|        }
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| };
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| 
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| struct intel_dvo {
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| 	struct intel_encoder base;
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| 
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| 	struct intel_dvo_device dev;
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| 
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| 	struct drm_display_mode *panel_fixed_mode;
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| 	bool panel_wants_dither;
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| };
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| 
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| static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
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| {
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| 	return container_of(encoder, struct intel_dvo, base);
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| }
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| 
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| static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
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| {
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| 	return enc_to_dvo(intel_attached_encoder(connector));
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| }
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| 
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| static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
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| {
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| 	struct drm_device *dev = connector->base.dev;
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| 	struct drm_i915_private *dev_priv = dev->dev_private;
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| 	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
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| 	u32 tmp;
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| 
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| 	tmp = I915_READ(intel_dvo->dev.dvo_reg);
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| 
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| 	if (!(tmp & DVO_ENABLE))
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| 		return false;
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| 
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| 	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
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| }
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| 
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| static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
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| 				   enum pipe *pipe)
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| {
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| 	struct drm_device *dev = encoder->base.dev;
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| 	struct drm_i915_private *dev_priv = dev->dev_private;
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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| 	u32 tmp;
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| 
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| 	tmp = I915_READ(intel_dvo->dev.dvo_reg);
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| 
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| 	if (!(tmp & DVO_ENABLE))
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| 		return false;
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| 
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| 	*pipe = PORT_TO_PIPE(tmp);
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| 
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| 	return true;
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| }
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| 
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| static void intel_dvo_get_config(struct intel_encoder *encoder,
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| 				 struct intel_crtc_config *pipe_config)
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| {
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| 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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| 	u32 tmp, flags = 0;
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| 
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| 	tmp = I915_READ(intel_dvo->dev.dvo_reg);
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| 	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
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| 		flags |= DRM_MODE_FLAG_PHSYNC;
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| 	else
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| 		flags |= DRM_MODE_FLAG_NHSYNC;
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| 	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
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| 		flags |= DRM_MODE_FLAG_PVSYNC;
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| 	else
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| 		flags |= DRM_MODE_FLAG_NVSYNC;
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| 
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| 	pipe_config->adjusted_mode.flags |= flags;
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| 
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| 	pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
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| }
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| 
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| static void intel_disable_dvo(struct intel_encoder *encoder)
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| {
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| 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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| 	u32 dvo_reg = intel_dvo->dev.dvo_reg;
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| 	u32 temp = I915_READ(dvo_reg);
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| 
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| 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
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| 	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
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| 	I915_READ(dvo_reg);
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| }
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| 
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| static void intel_enable_dvo(struct intel_encoder *encoder)
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| {
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| 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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| 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
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| 	u32 dvo_reg = intel_dvo->dev.dvo_reg;
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| 	u32 temp = I915_READ(dvo_reg);
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| 
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| 	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
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| 					 &crtc->config.requested_mode,
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| 					 &crtc->config.adjusted_mode);
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| 
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| 	I915_WRITE(dvo_reg, temp | DVO_ENABLE);
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| 	I915_READ(dvo_reg);
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| 
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| 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
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| }
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| 
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| /* Special dpms function to support cloning between dvo/sdvo/crt. */
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| static void intel_dvo_dpms(struct drm_connector *connector, int mode)
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| {
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| 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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| 	struct drm_crtc *crtc;
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| 	struct intel_crtc_config *config;
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| 
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| 	/* dvo supports only 2 dpms states. */
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| 	if (mode != DRM_MODE_DPMS_ON)
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| 		mode = DRM_MODE_DPMS_OFF;
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| 
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| 	if (mode == connector->dpms)
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| 		return;
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| 
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| 	connector->dpms = mode;
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| 
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| 	/* Only need to change hw state when actually enabled */
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| 	crtc = intel_dvo->base.base.crtc;
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| 	if (!crtc) {
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| 		intel_dvo->base.connectors_active = false;
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| 		return;
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| 	}
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| 
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| 	/* We call connector dpms manually below in case pipe dpms doesn't
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| 	 * change due to cloning. */
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| 	if (mode == DRM_MODE_DPMS_ON) {
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| 		config = &to_intel_crtc(crtc)->config;
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| 
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| 		intel_dvo->base.connectors_active = true;
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| 
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| 		intel_crtc_update_dpms(crtc);
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| 
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| 		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
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| 	} else {
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| 		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
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| 
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| 		intel_dvo->base.connectors_active = false;
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| 
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| 		intel_crtc_update_dpms(crtc);
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| 	}
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| 
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| 	intel_modeset_check_state(connector->dev);
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| }
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| 
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| static enum drm_mode_status
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| intel_dvo_mode_valid(struct drm_connector *connector,
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| 		     struct drm_display_mode *mode)
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| {
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| 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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| 
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| 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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| 		return MODE_NO_DBLESCAN;
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| 
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| 	/* XXX: Validate clock range */
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| 
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| 	if (intel_dvo->panel_fixed_mode) {
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| 		if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
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| 			return MODE_PANEL;
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| 		if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
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| 			return MODE_PANEL;
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| 	}
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| 
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| 	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
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| }
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| 
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| static bool intel_dvo_compute_config(struct intel_encoder *encoder,
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| 				     struct intel_crtc_config *pipe_config)
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| {
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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| 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
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| 
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| 	/* If we have timings from the BIOS for the panel, put them in
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| 	 * to the adjusted mode.  The CRTC will be set up for this mode,
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| 	 * with the panel scaling set up to source from the H/VDisplay
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| 	 * of the original mode.
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| 	 */
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| 	if (intel_dvo->panel_fixed_mode != NULL) {
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| #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
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| 		C(hdisplay);
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| 		C(hsync_start);
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| 		C(hsync_end);
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| 		C(htotal);
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| 		C(vdisplay);
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| 		C(vsync_start);
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| 		C(vsync_end);
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| 		C(vtotal);
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| 		C(clock);
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| #undef C
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| 
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| 		drm_mode_set_crtcinfo(adjusted_mode, 0);
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| 	}
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| 
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| 	return true;
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| }
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| 
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| static void intel_dvo_pre_enable(struct intel_encoder *encoder)
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| {
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| 	struct drm_device *dev = encoder->base.dev;
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| 	struct drm_i915_private *dev_priv = dev->dev_private;
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| 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
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| 	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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| 	int pipe = crtc->pipe;
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| 	u32 dvo_val;
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| 	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
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| 
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| 	switch (dvo_reg) {
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| 	case DVOA:
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| 	default:
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| 		dvo_srcdim_reg = DVOA_SRCDIM;
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| 		break;
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| 	case DVOB:
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| 		dvo_srcdim_reg = DVOB_SRCDIM;
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| 		break;
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| 	case DVOC:
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| 		dvo_srcdim_reg = DVOC_SRCDIM;
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| 		break;
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| 	}
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| 
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| 	/* Save the data order, since I don't know what it should be set to. */
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| 	dvo_val = I915_READ(dvo_reg) &
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| 		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
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| 	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
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| 		   DVO_BLANK_ACTIVE_HIGH;
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| 
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| 	if (pipe == 1)
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| 		dvo_val |= DVO_PIPE_B_SELECT;
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| 	dvo_val |= DVO_PIPE_STALL;
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| 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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| 		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
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| 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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| 		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
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| 
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| 	/*I915_WRITE(DVOB_SRCDIM,
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| 	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
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| 	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
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| 	I915_WRITE(dvo_srcdim_reg,
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| 		   (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
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| 		   (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
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| 	/*I915_WRITE(DVOB, dvo_val);*/
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| 	I915_WRITE(dvo_reg, dvo_val);
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| }
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| 
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| /**
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|  * Detect the output connection on our DVO device.
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|  *
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|  * Unimplemented.
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|  */
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| static enum drm_connector_status
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| intel_dvo_detect(struct drm_connector *connector, bool force)
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| {
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| 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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| 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
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| 		      connector->base.id, connector->name);
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| 	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
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| }
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| 
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| static int intel_dvo_get_modes(struct drm_connector *connector)
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| {
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| 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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| 	struct drm_i915_private *dev_priv = connector->dev->dev_private;
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| 
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| 	/* We should probably have an i2c driver get_modes function for those
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| 	 * devices which will have a fixed set of modes determined by the chip
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| 	 * (TV-out, for example), but for now with just TMDS and LVDS,
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| 	 * that's not the case.
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| 	 */
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| 	intel_ddc_get_modes(connector,
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| 			    intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
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| 	if (!list_empty(&connector->probed_modes))
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| 		return 1;
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| 
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| 	if (intel_dvo->panel_fixed_mode != NULL) {
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| 		struct drm_display_mode *mode;
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| 		mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
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| 		if (mode) {
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| 			drm_mode_probed_add(connector, mode);
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| 			return 1;
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| 		}
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static void intel_dvo_destroy(struct drm_connector *connector)
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| {
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| 	drm_connector_cleanup(connector);
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| 	kfree(connector);
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| }
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| 
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| static const struct drm_connector_funcs intel_dvo_connector_funcs = {
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| 	.dpms = intel_dvo_dpms,
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| 	.detect = intel_dvo_detect,
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| 	.destroy = intel_dvo_destroy,
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| 	.fill_modes = drm_helper_probe_single_connector_modes,
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| };
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| 
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| static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
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| 	.mode_valid = intel_dvo_mode_valid,
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| 	.get_modes = intel_dvo_get_modes,
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| 	.best_encoder = intel_best_encoder,
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| };
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| 
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| static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
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| {
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| 	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
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| 
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| 	if (intel_dvo->dev.dev_ops->destroy)
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| 		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
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| 
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| 	kfree(intel_dvo->panel_fixed_mode);
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| 
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| 	intel_encoder_destroy(encoder);
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| }
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| 
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| static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
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| 	.destroy = intel_dvo_enc_destroy,
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| };
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| 
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| /**
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|  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
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|  *
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|  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
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|  * chip being on DVOB/C and having multiple pipes.
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|  */
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| static struct drm_display_mode *
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| intel_dvo_get_current_mode(struct drm_connector *connector)
 | |
| {
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| 	struct drm_device *dev = connector->dev;
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| 	struct drm_i915_private *dev_priv = dev->dev_private;
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| 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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| 	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
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| 	struct drm_display_mode *mode = NULL;
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| 
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| 	/* If the DVO port is active, that'll be the LVDS, so we can pull out
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| 	 * its timings to get how the BIOS set up the panel.
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| 	 */
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| 	if (dvo_val & DVO_ENABLE) {
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| 		struct drm_crtc *crtc;
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| 		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
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| 
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| 		crtc = intel_get_crtc_for_pipe(dev, pipe);
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| 		if (crtc) {
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| 			mode = intel_crtc_mode_get(dev, crtc);
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| 			if (mode) {
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| 				mode->type |= DRM_MODE_TYPE_PREFERRED;
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| 				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
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| 					mode->flags |= DRM_MODE_FLAG_PHSYNC;
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| 				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
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| 					mode->flags |= DRM_MODE_FLAG_PVSYNC;
 | |
| 			}
 | |
| 		}
 | |
| 	}
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| 
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| 	return mode;
 | |
| }
 | |
| 
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| void intel_dvo_init(struct drm_device *dev)
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| {
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| 	struct drm_i915_private *dev_priv = dev->dev_private;
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| 	struct intel_encoder *intel_encoder;
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| 	struct intel_dvo *intel_dvo;
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| 	struct intel_connector *intel_connector;
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| 	int i;
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| 	int encoder_type = DRM_MODE_ENCODER_NONE;
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| 
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| 	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
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| 	if (!intel_dvo)
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| 		return;
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| 
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| 	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
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| 	if (!intel_connector) {
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| 		kfree(intel_dvo);
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| 		return;
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| 	}
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| 
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| 	intel_encoder = &intel_dvo->base;
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| 	drm_encoder_init(dev, &intel_encoder->base,
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| 			 &intel_dvo_enc_funcs, encoder_type);
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| 
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| 	intel_encoder->disable = intel_disable_dvo;
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| 	intel_encoder->enable = intel_enable_dvo;
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| 	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
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| 	intel_encoder->get_config = intel_dvo_get_config;
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| 	intel_encoder->compute_config = intel_dvo_compute_config;
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| 	intel_encoder->pre_enable = intel_dvo_pre_enable;
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| 	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
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| 	intel_connector->unregister = intel_connector_unregister;
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| 
 | |
| 	/* Now, try to find a controller */
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| 	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
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| 		struct drm_connector *connector = &intel_connector->base;
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| 		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
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| 		struct i2c_adapter *i2c;
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| 		int gpio;
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| 		bool dvoinit;
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| 
 | |
| 		/* Allow the I2C driver info to specify the GPIO to be used in
 | |
| 		 * special cases, but otherwise default to what's defined
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| 		 * in the spec.
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| 		 */
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| 		if (intel_gmbus_is_port_valid(dvo->gpio))
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| 			gpio = dvo->gpio;
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| 		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
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| 			gpio = GMBUS_PORT_SSC;
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| 		else
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| 			gpio = GMBUS_PORT_DPB;
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| 
 | |
| 		/* Set up the I2C bus necessary for the chip we're probing.
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| 		 * It appears that everything is on GPIOE except for panels
 | |
| 		 * on i830 laptops, which are on GPIOB (DVOA).
 | |
| 		 */
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| 		i2c = intel_gmbus_get_adapter(dev_priv, gpio);
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| 
 | |
| 		intel_dvo->dev = *dvo;
 | |
| 
 | |
| 		/* GMBUS NAK handling seems to be unstable, hence let the
 | |
| 		 * transmitter detection run in bit banging mode for now.
 | |
| 		 */
 | |
| 		intel_gmbus_force_bit(i2c, true);
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| 
 | |
| 		dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
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| 
 | |
| 		intel_gmbus_force_bit(i2c, false);
 | |
| 
 | |
| 		if (!dvoinit)
 | |
| 			continue;
 | |
| 
 | |
| 		intel_encoder->type = INTEL_OUTPUT_DVO;
 | |
| 		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 | |
| 		switch (dvo->type) {
 | |
| 		case INTEL_DVO_CHIP_TMDS:
 | |
| 			intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 | |
| 				(1 << INTEL_OUTPUT_DVO);
 | |
| 			drm_connector_init(dev, connector,
 | |
| 					   &intel_dvo_connector_funcs,
 | |
| 					   DRM_MODE_CONNECTOR_DVII);
 | |
| 			encoder_type = DRM_MODE_ENCODER_TMDS;
 | |
| 			break;
 | |
| 		case INTEL_DVO_CHIP_LVDS:
 | |
| 			intel_encoder->cloneable = 0;
 | |
| 			drm_connector_init(dev, connector,
 | |
| 					   &intel_dvo_connector_funcs,
 | |
| 					   DRM_MODE_CONNECTOR_LVDS);
 | |
| 			encoder_type = DRM_MODE_ENCODER_LVDS;
 | |
| 			break;
 | |
| 		}
 | |
| 
 | |
| 		drm_connector_helper_add(connector,
 | |
| 					 &intel_dvo_connector_helper_funcs);
 | |
| 		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 | |
| 		connector->interlace_allowed = false;
 | |
| 		connector->doublescan_allowed = false;
 | |
| 
 | |
| 		intel_connector_attach_encoder(intel_connector, intel_encoder);
 | |
| 		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 | |
| 			/* For our LVDS chipsets, we should hopefully be able
 | |
| 			 * to dig the fixed panel mode out of the BIOS data.
 | |
| 			 * However, it's in a different format from the BIOS
 | |
| 			 * data on chipsets with integrated LVDS (stored in AIM
 | |
| 			 * headers, likely), so for now, just get the current
 | |
| 			 * mode being output through DVO.
 | |
| 			 */
 | |
| 			intel_dvo->panel_fixed_mode =
 | |
| 				intel_dvo_get_current_mode(connector);
 | |
| 			intel_dvo->panel_wants_dither = true;
 | |
| 		}
 | |
| 
 | |
| 		drm_connector_register(connector);
 | |
| 		return;
 | |
| 	}
 | |
| 
 | |
| 	drm_encoder_cleanup(&intel_encoder->base);
 | |
| 	kfree(intel_dvo);
 | |
| 	kfree(intel_connector);
 | |
| }
 |