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	8f4d2683b0
	
	
	
		
			
			This patch is in preparation of DSI dual link panels. For dual link
panels, few packets needs to be sent to Port A or Port C or both. Based
on the portno from MIPI Sequence Block#53, these sequences needs to be
sent accordingly.
v2: Addressed review comments by Jani
    - port variables named properly
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
		
	
			
		
			
				
	
	
		
			117 lines
		
	
	
	
		
			3.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			117 lines
		
	
	
	
		
			3.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright © 2013 Intel Corporation
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a
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|  * copy of this software and associated documentation files (the "Software"),
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|  * to deal in the Software without restriction, including without limitation
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|  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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|  * and/or sell copies of the Software, and to permit persons to whom the
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|  * Software is furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice (including the next
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|  * paragraph) shall be included in all copies or substantial portions of the
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|  * Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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|  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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|  * DEALINGS IN THE SOFTWARE.
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|  *
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|  * Author: Jani Nikula <jani.nikula@intel.com>
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|  */
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| 
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| #ifndef _INTEL_DSI_DSI_H
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| #define _INTEL_DSI_DSI_H
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| 
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| #include <drm/drmP.h>
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| #include <drm/drm_crtc.h>
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| #include <video/mipi_display.h>
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| #include "i915_drv.h"
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| #include "intel_drv.h"
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| #include "intel_dsi.h"
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| 
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| #define DPI_LP_MODE_EN	false
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| #define DPI_HS_MODE_EN	true
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| 
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| void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable,
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| 						enum port port);
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| 
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| int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
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| 		     const u8 *data, int len, enum port port);
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| 
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| int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
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| 			 const u8 *data, int len, enum port port);
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| 
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| int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
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| 		    u8 *buf, int buflen, enum port port);
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| 
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| int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
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| 		u8 *reqdata, int reqlen, u8 *buf, int buflen, enum port port);
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| 
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| int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs);
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| void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi);
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| 
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| /* XXX: questionable write helpers */
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| static inline int dsi_vc_dcs_write_0(struct intel_dsi *intel_dsi,
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| 				     int channel, u8 dcs_cmd, enum port port)
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| {
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| 	return dsi_vc_dcs_write(intel_dsi, channel, &dcs_cmd, 1, port);
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| }
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| 
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| static inline int dsi_vc_dcs_write_1(struct intel_dsi *intel_dsi,
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| 			int channel, u8 dcs_cmd, u8 param, enum port port)
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| {
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| 	u8 buf[2] = { dcs_cmd, param };
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| 	return dsi_vc_dcs_write(intel_dsi, channel, buf, 2, port);
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| }
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| 
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| static inline int dsi_vc_generic_write_0(struct intel_dsi *intel_dsi,
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| 					 int channel, enum port port)
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| {
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| 	return dsi_vc_generic_write(intel_dsi, channel, NULL, 0, port);
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| }
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| 
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| static inline int dsi_vc_generic_write_1(struct intel_dsi *intel_dsi,
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| 					 int channel, u8 param, enum port port)
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| {
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| 	return dsi_vc_generic_write(intel_dsi, channel, ¶m, 1, port);
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| }
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| 
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| static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi,
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| 			int channel, u8 param1, u8 param2, enum port port)
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| {
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| 	u8 buf[2] = { param1, param2 };
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| 	return dsi_vc_generic_write(intel_dsi, channel, buf, 2, port);
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| }
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| 
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| /* XXX: questionable read helpers */
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| static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi,
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| 			int channel, u8 *buf, int buflen, enum port port)
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| {
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| 	return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen,
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| 									port);
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| }
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| 
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| static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi,
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| 					int channel, u8 param, u8 *buf,
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| 					int buflen, enum port port)
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| {
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| 	return dsi_vc_generic_read(intel_dsi, channel, ¶m, 1, buf, buflen,
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| 									port);
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| }
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| 
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| static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi,
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| 					int channel, u8 param1, u8 param2,
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| 					u8 *buf, int buflen, enum port port)
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| {
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| 	u8 req[2] = { param1, param2 };
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| 
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| 	return dsi_vc_generic_read(intel_dsi, channel, req, 2, buf, buflen,
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| 									port);
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| }
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| 
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| 
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| #endif /* _INTEL_DSI_DSI_H */
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