7178d2cdd9
Use the much more common pr_warn instead of pr_warning with the goal of removing pr_warning eventually. Other miscellanea: o Coalesce formats o Realign arguments Signed-off-by: Joe Perches <joe@perches.com> Cc: linux-mips <linux-mips@linux-mips.org> Cc: LKML <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/7935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
107 lines
2.6 KiB
C
107 lines
2.6 KiB
C
/*
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* Based on linux/arch/mips/txx9/rbtx4939/setup.c,
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* and RBTX49xx patch from CELF patch archive.
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*
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* Copyright 2001, 2003-2005 MontaVista Software Inc.
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* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
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* (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/tx4939.h>
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int __init tx4939_report_pciclk(void)
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{
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int pciclk = 0;
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pr_info("PCIC --%s PCICLK:",
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(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
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" PCI66" : "");
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if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
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pciclk = txx9_master_clock * 20 / 6;
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if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
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pciclk /= 2;
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printk(KERN_CONT "Internal(%u.%uMHz)",
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(pciclk + 50000) / 1000000,
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((pciclk + 50000) / 100000) % 10);
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} else {
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printk(KERN_CONT "External");
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pciclk = -1;
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}
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printk(KERN_CONT "\n");
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return pciclk;
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}
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void __init tx4939_report_pci1clk(void)
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{
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unsigned int pciclk = txx9_master_clock * 20 / 6;
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pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
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(pciclk + 50000) / 1000000,
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((pciclk + 50000) / 100000) % 10);
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}
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int __init tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
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{
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if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
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switch (slot) {
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case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
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if (__raw_readq(&tx4939_ccfgptr->pcfg) &
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TX4939_PCFG_ET0MODE)
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return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
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break;
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case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
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if (__raw_readq(&tx4939_ccfgptr->pcfg) &
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TX4939_PCFG_ET1MODE)
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return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
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break;
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}
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return 0;
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}
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return -1;
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}
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int __init tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq = tx4939_pcic1_map_irq(dev, slot);
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if (irq >= 0)
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return irq;
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irq = pin;
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/* IRQ rotation */
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irq--; /* 0-3 */
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irq = (irq + 33 - slot) % 4;
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irq++; /* 1-4 */
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switch (irq) {
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case 1:
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irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
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break;
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case 2:
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irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
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break;
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case 3:
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irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
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break;
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case 4:
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irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
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break;
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}
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return irq;
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}
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void __init tx4939_setup_pcierr_irq(void)
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{
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if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
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tx4927_pcierr_interrupt,
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0, "PCI error",
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(void *)TX4939_PCIC_REG))
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pr_warn("Failed to request irq for PCIERR\n");
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}
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