 a60e7e1e65
			
		
	
	
	a60e7e1e65
	
	
	
		
			
			checkpath spotted a few stylistic errors, fix them. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			207 lines
		
	
	
	
		
			4.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			207 lines
		
	
	
	
		
			4.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * drivers/net/phy/davicom.c
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|  *
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|  * Driver for Davicom PHYs
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|  *
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|  * Author: Andy Fleming
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|  *
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|  * Copyright (c) 2004 Freescale Semiconductor, Inc.
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|  *
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|  * This program is free software; you can redistribute  it and/or modify it
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|  * under  the terms of  the GNU General  Public License as published by the
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|  * Free Software Foundation;  either version 2 of the  License, or (at your
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|  * option) any later version.
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|  *
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|  */
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| #include <linux/kernel.h>
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| #include <linux/string.h>
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| #include <linux/errno.h>
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| #include <linux/unistd.h>
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| #include <linux/interrupt.h>
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| #include <linux/init.h>
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| #include <linux/delay.h>
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| #include <linux/netdevice.h>
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| #include <linux/etherdevice.h>
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| #include <linux/skbuff.h>
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| #include <linux/spinlock.h>
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| #include <linux/mm.h>
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| #include <linux/module.h>
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| #include <linux/mii.h>
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| #include <linux/ethtool.h>
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| #include <linux/phy.h>
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| 
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| #include <asm/io.h>
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| #include <asm/irq.h>
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| #include <asm/uaccess.h>
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| 
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| #define MII_DM9161_SCR		0x10
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| #define MII_DM9161_SCR_INIT	0x0610
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| #define MII_DM9161_SCR_RMII	0x0100
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| 
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| /* DM9161 Interrupt Register */
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| #define MII_DM9161_INTR	0x15
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| #define MII_DM9161_INTR_PEND		0x8000
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| #define MII_DM9161_INTR_DPLX_MASK	0x0800
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| #define MII_DM9161_INTR_SPD_MASK	0x0400
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| #define MII_DM9161_INTR_LINK_MASK	0x0200
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| #define MII_DM9161_INTR_MASK		0x0100
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| #define MII_DM9161_INTR_DPLX_CHANGE	0x0010
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| #define MII_DM9161_INTR_SPD_CHANGE	0x0008
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| #define MII_DM9161_INTR_LINK_CHANGE	0x0004
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| #define MII_DM9161_INTR_INIT 		0x0000
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| #define MII_DM9161_INTR_STOP	\
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| (MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \
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|  | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK)
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| 
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| /* DM9161 10BT Configuration/Status */
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| #define MII_DM9161_10BTCSR	0x12
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| #define MII_DM9161_10BTCSR_INIT	0x7800
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| 
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| MODULE_DESCRIPTION("Davicom PHY driver");
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| MODULE_AUTHOR("Andy Fleming");
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| MODULE_LICENSE("GPL");
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| 
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| 
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| #define DM9161_DELAY 1
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| static int dm9161_config_intr(struct phy_device *phydev)
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| {
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| 	int temp;
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| 
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| 	temp = phy_read(phydev, MII_DM9161_INTR);
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| 
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| 	if (temp < 0)
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| 		return temp;
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| 
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| 	if (PHY_INTERRUPT_ENABLED == phydev->interrupts)
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| 		temp &= ~(MII_DM9161_INTR_STOP);
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| 	else
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| 		temp |= MII_DM9161_INTR_STOP;
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| 
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| 	temp = phy_write(phydev, MII_DM9161_INTR, temp);
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| 
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| 	return temp;
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| }
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| 
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| static int dm9161_config_aneg(struct phy_device *phydev)
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| {
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| 	int err;
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| 
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| 	/* Isolate the PHY */
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| 	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
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| 
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| 	if (err < 0)
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| 		return err;
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| 
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| 	/* Configure the new settings */
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| 	err = genphy_config_aneg(phydev);
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| 
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| 	if (err < 0)
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| 		return err;
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| 
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| 	return 0;
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| }
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| 
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| static int dm9161_config_init(struct phy_device *phydev)
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| {
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| 	int err, temp;
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| 
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| 	/* Isolate the PHY */
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| 	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
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| 
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| 	if (err < 0)
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| 		return err;
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| 
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| 	switch (phydev->interface) {
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| 	case PHY_INTERFACE_MODE_MII:
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| 		temp = MII_DM9161_SCR_INIT;
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| 		break;
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| 	case PHY_INTERFACE_MODE_RMII:
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| 		temp =  MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII;
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| 		break;
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	/* Do not bypass the scrambler/descrambler */
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| 	err = phy_write(phydev, MII_DM9161_SCR, temp);
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| 	if (err < 0)
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| 		return err;
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| 
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| 	/* Clear 10BTCSR to default */
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| 	err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);
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| 
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| 	if (err < 0)
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| 		return err;
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| 
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| 	/* Reconnect the PHY, and enable Autonegotiation */
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| 	return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
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| }
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| 
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| static int dm9161_ack_interrupt(struct phy_device *phydev)
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| {
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| 	int err = phy_read(phydev, MII_DM9161_INTR);
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| 
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| 	return (err < 0) ? err : 0;
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| }
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| 
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| static struct phy_driver dm91xx_driver[] = {
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| {
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| 	.phy_id		= 0x0181b880,
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| 	.name		= "Davicom DM9161E",
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| 	.phy_id_mask	= 0x0ffffff0,
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| 	.features	= PHY_BASIC_FEATURES,
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| 	.flags		= PHY_HAS_INTERRUPT,
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| 	.config_init	= dm9161_config_init,
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| 	.config_aneg	= dm9161_config_aneg,
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| 	.read_status	= genphy_read_status,
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| 	.ack_interrupt	= dm9161_ack_interrupt,
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| 	.config_intr	= dm9161_config_intr,
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| 	.driver		= { .owner = THIS_MODULE,},
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| }, {
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| 	.phy_id		= 0x0181b8a0,
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| 	.name		= "Davicom DM9161A",
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| 	.phy_id_mask	= 0x0ffffff0,
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| 	.features	= PHY_BASIC_FEATURES,
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| 	.flags		= PHY_HAS_INTERRUPT,
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| 	.config_init	= dm9161_config_init,
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| 	.config_aneg	= dm9161_config_aneg,
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| 	.read_status	= genphy_read_status,
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| 	.ack_interrupt	= dm9161_ack_interrupt,
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| 	.config_intr	= dm9161_config_intr,
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| 	.driver		= { .owner = THIS_MODULE,},
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| }, {
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| 	.phy_id		= 0x00181b80,
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| 	.name		= "Davicom DM9131",
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| 	.phy_id_mask	= 0x0ffffff0,
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| 	.features	= PHY_BASIC_FEATURES,
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| 	.flags		= PHY_HAS_INTERRUPT,
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| 	.config_aneg	= genphy_config_aneg,
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| 	.read_status	= genphy_read_status,
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| 	.ack_interrupt	= dm9161_ack_interrupt,
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| 	.config_intr	= dm9161_config_intr,
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| 	.driver		= { .owner = THIS_MODULE,},
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| } };
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| 
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| static int __init davicom_init(void)
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| {
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| 	return phy_drivers_register(dm91xx_driver,
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| 		ARRAY_SIZE(dm91xx_driver));
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| }
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| 
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| static void __exit davicom_exit(void)
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| {
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| 	phy_drivers_unregister(dm91xx_driver,
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| 		ARRAY_SIZE(dm91xx_driver));
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| }
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| 
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| module_init(davicom_init);
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| module_exit(davicom_exit);
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| 
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| static struct mdio_device_id __maybe_unused davicom_tbl[] = {
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| 	{ 0x0181b880, 0x0ffffff0 },
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| 	{ 0x0181b8a0, 0x0ffffff0 },
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| 	{ 0x00181b80, 0x0ffffff0 },
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| 	{ }
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| };
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| 
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| MODULE_DEVICE_TABLE(mdio, davicom_tbl);
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