62ce272d87
Modified the G2D driver (which initially supported only H/W Rev.3) to support H/W Rev.4.1 present on Exynos4x12 and Exynos52x0 SOCs. - Set the SRC and DST type to 'memory' instead of using reset values. - FIMG2D v4.1 H/W uses different logic for stretching(scaling). - Use CACHECTL_REG only with FIMG2D v3. [s.nawrocki: removed empty line at end of file]] Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
117 lines
2.3 KiB
C
117 lines
2.3 KiB
C
/*
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* Samsung S5P G2D - 2D Graphics Accelerator Driver
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Kamil Debski, <k.debski@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version
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*/
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#include <linux/io.h>
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#include "g2d.h"
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#include "g2d-regs.h"
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#define w(x, a) writel((x), d->regs + (a))
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#define r(a) readl(d->regs + (a))
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/* g2d_reset clears all g2d registers */
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void g2d_reset(struct g2d_dev *d)
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{
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w(1, SOFT_RESET_REG);
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}
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void g2d_set_src_size(struct g2d_dev *d, struct g2d_frame *f)
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{
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u32 n;
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w(0, SRC_SELECT_REG);
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w(f->stride & 0xFFFF, SRC_STRIDE_REG);
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n = f->o_height & 0xFFF;
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n <<= 16;
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n |= f->o_width & 0xFFF;
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w(n, SRC_LEFT_TOP_REG);
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n = f->bottom & 0xFFF;
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n <<= 16;
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n |= f->right & 0xFFF;
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w(n, SRC_RIGHT_BOTTOM_REG);
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w(f->fmt->hw, SRC_COLOR_MODE_REG);
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}
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void g2d_set_src_addr(struct g2d_dev *d, dma_addr_t a)
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{
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w(a, SRC_BASE_ADDR_REG);
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}
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void g2d_set_dst_size(struct g2d_dev *d, struct g2d_frame *f)
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{
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u32 n;
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w(0, DST_SELECT_REG);
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w(f->stride & 0xFFFF, DST_STRIDE_REG);
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n = f->o_height & 0xFFF;
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n <<= 16;
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n |= f->o_width & 0xFFF;
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w(n, DST_LEFT_TOP_REG);
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n = f->bottom & 0xFFF;
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n <<= 16;
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n |= f->right & 0xFFF;
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w(n, DST_RIGHT_BOTTOM_REG);
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w(f->fmt->hw, DST_COLOR_MODE_REG);
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}
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void g2d_set_dst_addr(struct g2d_dev *d, dma_addr_t a)
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{
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w(a, DST_BASE_ADDR_REG);
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}
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void g2d_set_rop4(struct g2d_dev *d, u32 r)
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{
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w(r, ROP4_REG);
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}
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void g2d_set_flip(struct g2d_dev *d, u32 r)
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{
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w(r, SRC_MSK_DIRECT_REG);
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}
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void g2d_set_v41_stretch(struct g2d_dev *d, struct g2d_frame *src,
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struct g2d_frame *dst)
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{
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w(DEFAULT_SCALE_MODE, SRC_SCALE_CTRL_REG);
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/* inversed scaling factor: src is numerator */
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w((src->c_width << 16) / dst->c_width, SRC_XSCALE_REG);
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w((src->c_height << 16) / dst->c_height, SRC_YSCALE_REG);
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}
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void g2d_set_cmd(struct g2d_dev *d, u32 c)
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{
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w(c, BITBLT_COMMAND_REG);
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}
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void g2d_start(struct g2d_dev *d)
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{
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/* Clear cache */
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if (d->variant->hw_rev == TYPE_G2D_3X)
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w(0x7, CACHECTL_REG);
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/* Enable interrupt */
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w(1, INTEN_REG);
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/* Start G2D engine */
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w(1, BITBLT_START_REG);
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}
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void g2d_clear_int(struct g2d_dev *d)
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{
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w(1, INTC_PEND_REG);
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}
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