 7d8d9f6705
			
		
	
	
	7d8d9f6705
	
	
	
		
			
			The hw cursor is relatively adept at triggering underflows, which manifest as a "blue flash" (since blue is configured as the underflow color). Juggle a few things around to tighten up the timing for setting cursor registers in DONE irq. And most importantly, don't ever disable the hw cursor. Instead flip it to a blank/empty cursor. This seems far more reliable, as even simply clearing the cursor-enable bit (with no other updates in previous/ following frames) can in some cases cause underflow. v1: original v2: add missing locking spotted by Micah Cc: Micah Richert <richert@braincorporation.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
		
			
				
	
	
		
			93 lines
		
	
	
	
		
			2.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			93 lines
		
	
	
	
		
			2.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2013 Red Hat
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|  * Author: Rob Clark <robdclark@gmail.com>
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms of the GNU General Public License version 2 as published by
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|  * the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful, but WITHOUT
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|  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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|  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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|  * more details.
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|  *
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|  * You should have received a copy of the GNU General Public License along with
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|  * this program.  If not, see <http://www.gnu.org/licenses/>.
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|  */
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| 
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| 
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| #include "msm_drv.h"
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| #include "mdp4_kms.h"
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| 
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| void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask)
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| {
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| 	mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_ENABLE, irqmask);
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| }
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| 
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| static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
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| {
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| 	DRM_ERROR("errors: %08x\n", irqstatus);
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| }
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| 
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| void mdp4_irq_preinstall(struct msm_kms *kms)
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| {
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| 	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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| 	mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
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| }
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| 
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| int mdp4_irq_postinstall(struct msm_kms *kms)
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| {
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| 	struct mdp_kms *mdp_kms = to_mdp_kms(kms);
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| 	struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
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| 	struct mdp_irq *error_handler = &mdp4_kms->error_handler;
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| 
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| 	error_handler->irq = mdp4_irq_error_handler;
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| 	error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN |
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| 			MDP4_IRQ_EXTERNAL_INTF_UDERRUN;
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| 
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| 	mdp_irq_register(mdp_kms, error_handler);
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| 
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| 	return 0;
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| }
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| 
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| void mdp4_irq_uninstall(struct msm_kms *kms)
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| {
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| 	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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| 	mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
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| }
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| 
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| irqreturn_t mdp4_irq(struct msm_kms *kms)
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| {
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| 	struct mdp_kms *mdp_kms = to_mdp_kms(kms);
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| 	struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
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| 	struct drm_device *dev = mdp4_kms->dev;
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| 	struct msm_drm_private *priv = dev->dev_private;
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| 	unsigned int id;
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| 	uint32_t status;
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| 
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| 	status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS);
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| 	mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, status);
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| 
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| 	VERB("status=%08x", status);
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| 
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| 	mdp_dispatch_irqs(mdp_kms, status);
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| 
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| 	for (id = 0; id < priv->num_crtcs; id++)
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| 		if (status & mdp4_crtc_vblank(priv->crtcs[id]))
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| 			drm_handle_vblank(dev, id);
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
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| {
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| 	mdp_update_vblank_mask(to_mdp_kms(kms),
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| 			mdp4_crtc_vblank(crtc), true);
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| 	return 0;
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| }
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| 
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| void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
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| {
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| 	mdp_update_vblank_mask(to_mdp_kms(kms),
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| 			mdp4_crtc_vblank(crtc), false);
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| }
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