7546d2f48d
Loongson family machines has three types of serial port: PCI UART, LPC UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based machines use PCI UART; most Loongson-2F based machines use LPC UART; Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART. Port address of UARTs: CPU UART: REG_BASE + OFFSET; LPC UART: LIO1_BASE + OFFSET; PCI UART: PCIIO_BASE + OFFSET. Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART are called "CPU provided serial port". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6635 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/*
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* Copyright (C) 2009 Lemote Inc.
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* Author: Wu Zhangjin, wuzhangjin@gmail.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <asm/bootinfo.h>
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#include <loongson.h>
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/* ioremapped */
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unsigned long _loongson_uart_base;
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EXPORT_SYMBOL(_loongson_uart_base);
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/* raw */
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unsigned long loongson_uart_base;
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EXPORT_SYMBOL(loongson_uart_base);
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void prom_init_loongson_uart_base(void)
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{
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switch (mips_machtype) {
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case MACH_LEMOTE_FL2E:
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loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8;
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break;
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case MACH_LEMOTE_FL2F:
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case MACH_LEMOTE_LL2F:
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loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8;
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break;
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case MACH_LEMOTE_ML2F7:
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case MACH_LEMOTE_YL2F89:
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case MACH_DEXXON_GDIUM2F10:
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case MACH_LEMOTE_NAS:
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default:
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/* The CPU provided serial port (LPC) */
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loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8;
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break;
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case MACH_LEMOTE_A1004:
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case MACH_LEMOTE_A1101:
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case MACH_LEMOTE_A1201:
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case MACH_LEMOTE_A1205:
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/* The CPU provided serial port (CPU) */
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loongson_uart_base = LOONGSON_REG_BASE + 0x1e0;
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break;
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}
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_loongson_uart_base =
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(unsigned long)ioremap_nocache(loongson_uart_base, 8);
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}
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