 62bc82a82b
			
		
	
	
	62bc82a82b
	
	
	
		
			
			Using static inline functions ensure proper type checking which also remove compilation warning for no MMU Compilation warning: arch/microblaze/include/asm/cacheflush.h: warning: 'addr' may be used uninitialized in this function [-Wmaybe-uninitialized] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
		
			
				
	
	
		
			124 lines
		
	
	
	
		
			4.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			124 lines
		
	
	
	
		
			4.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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|  * Copyright (C) 2007-2009 PetaLogix
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|  * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
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|  * based on v850 version which was
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|  * Copyright (C) 2001,02,03 NEC Electronics Corporation
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|  * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
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|  *
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|  * This file is subject to the terms and conditions of the GNU General
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|  * Public License. See the file COPYING in the main directory of this
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|  * archive for more details.
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|  *
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|  */
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| 
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| #ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
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| #define _ASM_MICROBLAZE_CACHEFLUSH_H
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| 
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| /* Somebody depends on this; sigh... */
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| #include <linux/mm.h>
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| #include <linux/io.h>
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| 
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| /* Look at Documentation/cachetlb.txt */
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| 
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| /*
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|  * Cache handling functions.
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|  * Microblaze has a write-through data cache, meaning that the data cache
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|  * never needs to be flushed.  The only flushing operations that are
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|  * implemented are to invalidate the instruction cache.  These are called
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|  * after loading a user application into memory, we must invalidate the
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|  * instruction cache to make sure we don't fetch old, bad code.
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|  */
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| 
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| /* struct cache, d=dcache, i=icache, fl = flush, iv = invalidate,
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|  * suffix r = range */
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| struct scache {
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| 	/* icache */
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| 	void (*ie)(void); /* enable */
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| 	void (*id)(void); /* disable */
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| 	void (*ifl)(void); /* flush */
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| 	void (*iflr)(unsigned long a, unsigned long b);
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| 	void (*iin)(void); /* invalidate */
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| 	void (*iinr)(unsigned long a, unsigned long b);
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| 	/* dcache */
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| 	void (*de)(void); /* enable */
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| 	void (*dd)(void); /* disable */
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| 	void (*dfl)(void); /* flush */
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| 	void (*dflr)(unsigned long a, unsigned long b);
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| 	void (*din)(void); /* invalidate */
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| 	void (*dinr)(unsigned long a, unsigned long b);
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| };
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| 
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| /* microblaze cache */
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| extern struct scache *mbc;
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| 
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| void microblaze_cache_init(void);
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| 
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| #define enable_icache()					mbc->ie();
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| #define disable_icache()				mbc->id();
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| #define flush_icache()					mbc->ifl();
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| #define flush_icache_range(start, end)			mbc->iflr(start, end);
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| #define invalidate_icache()				mbc->iin();
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| #define invalidate_icache_range(start, end)		mbc->iinr(start, end);
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| 
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| #define flush_icache_user_range(vma, pg, adr, len)	flush_icache();
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| #define flush_icache_page(vma, pg)			do { } while (0)
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| 
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| #define enable_dcache()					mbc->de();
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| #define disable_dcache()				mbc->dd();
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| /* FIXME for LL-temac driver */
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| #define invalidate_dcache()				mbc->din();
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| #define invalidate_dcache_range(start, end)		mbc->dinr(start, end);
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| #define flush_dcache()					mbc->dfl();
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| #define flush_dcache_range(start, end)			mbc->dflr(start, end);
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| 
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| #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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| /* MS: We have to implement it because of rootfs-jffs2 issue on WB */
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| #define flush_dcache_page(page) \
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| do { \
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| 	unsigned long addr = (unsigned long) page_address(page); /* virtual */ \
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| 	addr = (u32)virt_to_phys((void *)addr); \
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| 	flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \
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| } while (0);
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| 
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| #define flush_dcache_mmap_lock(mapping)		do { } while (0)
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| #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
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| 
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| #define flush_cache_dup_mm(mm)				do { } while (0)
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| #define flush_cache_vmap(start, end)			do { } while (0)
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| #define flush_cache_vunmap(start, end)			do { } while (0)
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| #define flush_cache_mm(mm)			do { } while (0)
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| 
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| #define flush_cache_page(vma, vmaddr, pfn) \
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| 	flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
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| 
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| /* MS: kgdb code use this macro, wrong len with FLASH */
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| #if 0
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| #define flush_cache_range(vma, start, len)	{	\
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| 	flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \
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| 	flush_dcache_range((unsigned) (start), (unsigned) (start) + (len)); \
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| }
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| #endif
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| 
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| #define flush_cache_range(vma, start, len) do { } while (0)
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| 
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| static inline void copy_to_user_page(struct vm_area_struct *vma,
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| 				     struct page *page, unsigned long vaddr,
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| 				     void *dst, void *src, int len)
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| {
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| 	u32 addr = virt_to_phys(dst);
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| 	memcpy(dst, src, len);
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| 	if (vma->vm_flags & VM_EXEC) {
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| 		invalidate_icache_range(addr, addr + PAGE_SIZE);
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| 		flush_dcache_range(addr, addr + PAGE_SIZE);
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| 	}
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| }
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| 
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| static inline void copy_from_user_page(struct vm_area_struct *vma,
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| 				       struct page *page, unsigned long vaddr,
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| 				       void *dst, void *src, int len)
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| {
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| 	memcpy(dst, src, len);
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| }
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| 
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| #endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
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