On ARM64, when the BPF JIT compiler fills the JIT image body with opcodes during translation of eBPF into ARM64 opcodes, we may fail for several reasons during that phase: one being that we jump to the notyet label for not yet supported eBPF instructions such as BPF_ST. In that case we only free offsets, but not the actual allocated target image where opcodes are being stored. Fix it by calling module_free() on dismantle time in case of errors. Signed-off-by: Daniel Borkmann <dborkman@redhat.com> Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Alexei Starovoitov <ast@plumgrid.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
		
			
				
	
	
		
			679 lines
		
	
	
	
		
			17 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			679 lines
		
	
	
	
		
			17 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * BPF JIT compiler for ARM64
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 *
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 * Copyright (C) 2014 Zi Shen Lim <zlim.lnx@gmail.com>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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 */
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#define pr_fmt(fmt) "bpf_jit: " fmt
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#include <linux/filter.h>
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#include <linux/moduleloader.h>
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#include <linux/printk.h>
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#include <linux/skbuff.h>
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#include <linux/slab.h>
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#include <asm/byteorder.h>
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#include <asm/cacheflush.h>
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#include "bpf_jit.h"
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int bpf_jit_enable __read_mostly;
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#define TMP_REG_1 (MAX_BPF_REG + 0)
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#define TMP_REG_2 (MAX_BPF_REG + 1)
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/* Map BPF registers to A64 registers */
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static const int bpf2a64[] = {
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	/* return value from in-kernel function, and exit value from eBPF */
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	[BPF_REG_0] = A64_R(7),
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	/* arguments from eBPF program to in-kernel function */
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	[BPF_REG_1] = A64_R(0),
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	[BPF_REG_2] = A64_R(1),
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	[BPF_REG_3] = A64_R(2),
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	[BPF_REG_4] = A64_R(3),
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	[BPF_REG_5] = A64_R(4),
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	/* callee saved registers that in-kernel function will preserve */
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	[BPF_REG_6] = A64_R(19),
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	[BPF_REG_7] = A64_R(20),
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	[BPF_REG_8] = A64_R(21),
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	[BPF_REG_9] = A64_R(22),
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	/* read-only frame pointer to access stack */
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	[BPF_REG_FP] = A64_FP,
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	/* temporary register for internal BPF JIT */
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	[TMP_REG_1] = A64_R(23),
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	[TMP_REG_2] = A64_R(24),
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};
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struct jit_ctx {
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	const struct bpf_prog *prog;
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	int idx;
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	int tmp_used;
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	int body_offset;
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	int *offset;
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	u32 *image;
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};
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static inline void emit(const u32 insn, struct jit_ctx *ctx)
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{
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	if (ctx->image != NULL)
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		ctx->image[ctx->idx] = cpu_to_le32(insn);
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	ctx->idx++;
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}
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static inline void emit_a64_mov_i64(const int reg, const u64 val,
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				    struct jit_ctx *ctx)
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{
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	u64 tmp = val;
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	int shift = 0;
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	emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
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	tmp >>= 16;
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	shift += 16;
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	while (tmp) {
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		if (tmp & 0xffff)
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			emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
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		tmp >>= 16;
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		shift += 16;
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	}
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}
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static inline void emit_a64_mov_i(const int is64, const int reg,
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				  const s32 val, struct jit_ctx *ctx)
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{
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	u16 hi = val >> 16;
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	u16 lo = val & 0xffff;
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	if (hi & 0x8000) {
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		if (hi == 0xffff) {
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			emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
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		} else {
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			emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
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			emit(A64_MOVK(is64, reg, lo, 0), ctx);
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		}
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	} else {
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		emit(A64_MOVZ(is64, reg, lo, 0), ctx);
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		if (hi)
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			emit(A64_MOVK(is64, reg, hi, 16), ctx);
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	}
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}
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static inline int bpf2a64_offset(int bpf_to, int bpf_from,
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				 const struct jit_ctx *ctx)
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{
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	int to = ctx->offset[bpf_to + 1];
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	/* -1 to account for the Branch instruction */
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	int from = ctx->offset[bpf_from + 1] - 1;
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	return to - from;
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}
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static inline int epilogue_offset(const struct jit_ctx *ctx)
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{
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	int to = ctx->offset[ctx->prog->len - 1];
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	int from = ctx->idx - ctx->body_offset;
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	return to - from;
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}
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/* Stack must be multiples of 16B */
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#define STACK_ALIGN(sz) (((sz) + 15) & ~15)
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static void build_prologue(struct jit_ctx *ctx)
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{
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	const u8 r6 = bpf2a64[BPF_REG_6];
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	const u8 r7 = bpf2a64[BPF_REG_7];
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	const u8 r8 = bpf2a64[BPF_REG_8];
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	const u8 r9 = bpf2a64[BPF_REG_9];
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	const u8 fp = bpf2a64[BPF_REG_FP];
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	const u8 ra = bpf2a64[BPF_REG_A];
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	const u8 rx = bpf2a64[BPF_REG_X];
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	const u8 tmp1 = bpf2a64[TMP_REG_1];
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	const u8 tmp2 = bpf2a64[TMP_REG_2];
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	int stack_size = MAX_BPF_STACK;
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	stack_size += 4; /* extra for skb_copy_bits buffer */
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	stack_size = STACK_ALIGN(stack_size);
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	/* Save callee-saved register */
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	emit(A64_PUSH(r6, r7, A64_SP), ctx);
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	emit(A64_PUSH(r8, r9, A64_SP), ctx);
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	if (ctx->tmp_used)
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		emit(A64_PUSH(tmp1, tmp2, A64_SP), ctx);
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	/* Set up BPF stack */
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	emit(A64_SUB_I(1, A64_SP, A64_SP, stack_size), ctx);
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	/* Set up frame pointer */
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	emit(A64_MOV(1, fp, A64_SP), ctx);
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	/* Clear registers A and X */
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	emit_a64_mov_i64(ra, 0, ctx);
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	emit_a64_mov_i64(rx, 0, ctx);
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}
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static void build_epilogue(struct jit_ctx *ctx)
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{
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	const u8 r0 = bpf2a64[BPF_REG_0];
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	const u8 r6 = bpf2a64[BPF_REG_6];
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	const u8 r7 = bpf2a64[BPF_REG_7];
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	const u8 r8 = bpf2a64[BPF_REG_8];
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	const u8 r9 = bpf2a64[BPF_REG_9];
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	const u8 fp = bpf2a64[BPF_REG_FP];
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	const u8 tmp1 = bpf2a64[TMP_REG_1];
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	const u8 tmp2 = bpf2a64[TMP_REG_2];
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	int stack_size = MAX_BPF_STACK;
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	stack_size += 4; /* extra for skb_copy_bits buffer */
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	stack_size = STACK_ALIGN(stack_size);
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	/* We're done with BPF stack */
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	emit(A64_ADD_I(1, A64_SP, A64_SP, stack_size), ctx);
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	/* Restore callee-saved register */
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	if (ctx->tmp_used)
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		emit(A64_POP(tmp1, tmp2, A64_SP), ctx);
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	emit(A64_POP(r8, r9, A64_SP), ctx);
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	emit(A64_POP(r6, r7, A64_SP), ctx);
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	/* Restore frame pointer */
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	emit(A64_MOV(1, fp, A64_SP), ctx);
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	/* Set return value */
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	emit(A64_MOV(1, A64_R(0), r0), ctx);
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	emit(A64_RET(A64_LR), ctx);
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}
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static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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{
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	const u8 code = insn->code;
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	const u8 dst = bpf2a64[insn->dst_reg];
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	const u8 src = bpf2a64[insn->src_reg];
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	const u8 tmp = bpf2a64[TMP_REG_1];
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	const u8 tmp2 = bpf2a64[TMP_REG_2];
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	const s16 off = insn->off;
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	const s32 imm = insn->imm;
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	const int i = insn - ctx->prog->insnsi;
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	const bool is64 = BPF_CLASS(code) == BPF_ALU64;
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	u8 jmp_cond;
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	s32 jmp_offset;
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	switch (code) {
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	/* dst = src */
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	case BPF_ALU | BPF_MOV | BPF_X:
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	case BPF_ALU64 | BPF_MOV | BPF_X:
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		emit(A64_MOV(is64, dst, src), ctx);
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		break;
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	/* dst = dst OP src */
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	case BPF_ALU | BPF_ADD | BPF_X:
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	case BPF_ALU64 | BPF_ADD | BPF_X:
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		emit(A64_ADD(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_SUB | BPF_X:
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	case BPF_ALU64 | BPF_SUB | BPF_X:
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		emit(A64_SUB(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_AND | BPF_X:
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	case BPF_ALU64 | BPF_AND | BPF_X:
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		emit(A64_AND(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_OR | BPF_X:
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	case BPF_ALU64 | BPF_OR | BPF_X:
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		emit(A64_ORR(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_XOR | BPF_X:
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	case BPF_ALU64 | BPF_XOR | BPF_X:
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		emit(A64_EOR(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_MUL | BPF_X:
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	case BPF_ALU64 | BPF_MUL | BPF_X:
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		emit(A64_MUL(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_DIV | BPF_X:
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	case BPF_ALU64 | BPF_DIV | BPF_X:
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		emit(A64_UDIV(is64, dst, dst, src), ctx);
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		break;
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	case BPF_ALU | BPF_MOD | BPF_X:
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	case BPF_ALU64 | BPF_MOD | BPF_X:
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		ctx->tmp_used = 1;
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		emit(A64_UDIV(is64, tmp, dst, src), ctx);
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		emit(A64_MUL(is64, tmp, tmp, src), ctx);
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		emit(A64_SUB(is64, dst, dst, tmp), ctx);
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		break;
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	/* dst = -dst */
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	case BPF_ALU | BPF_NEG:
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	case BPF_ALU64 | BPF_NEG:
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		emit(A64_NEG(is64, dst, dst), ctx);
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		break;
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	/* dst = BSWAP##imm(dst) */
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	case BPF_ALU | BPF_END | BPF_FROM_LE:
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	case BPF_ALU | BPF_END | BPF_FROM_BE:
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#ifdef CONFIG_CPU_BIG_ENDIAN
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		if (BPF_SRC(code) == BPF_FROM_BE)
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			break;
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#else /* !CONFIG_CPU_BIG_ENDIAN */
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		if (BPF_SRC(code) == BPF_FROM_LE)
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			break;
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#endif
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		switch (imm) {
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		case 16:
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			emit(A64_REV16(is64, dst, dst), ctx);
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			break;
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		case 32:
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			emit(A64_REV32(is64, dst, dst), ctx);
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			break;
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		case 64:
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			emit(A64_REV64(dst, dst), ctx);
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			break;
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		}
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		break;
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	/* dst = imm */
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	case BPF_ALU | BPF_MOV | BPF_K:
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	case BPF_ALU64 | BPF_MOV | BPF_K:
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		emit_a64_mov_i(is64, dst, imm, ctx);
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		break;
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	/* dst = dst OP imm */
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	case BPF_ALU | BPF_ADD | BPF_K:
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	case BPF_ALU64 | BPF_ADD | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_ADD(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_SUB | BPF_K:
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	case BPF_ALU64 | BPF_SUB | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_SUB(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_AND | BPF_K:
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	case BPF_ALU64 | BPF_AND | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_AND(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_OR | BPF_K:
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	case BPF_ALU64 | BPF_OR | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_ORR(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_XOR | BPF_K:
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	case BPF_ALU64 | BPF_XOR | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_EOR(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_MUL | BPF_K:
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	case BPF_ALU64 | BPF_MUL | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_MUL(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_DIV | BPF_K:
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	case BPF_ALU64 | BPF_DIV | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp, imm, ctx);
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		emit(A64_UDIV(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_MOD | BPF_K:
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	case BPF_ALU64 | BPF_MOD | BPF_K:
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		ctx->tmp_used = 1;
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		emit_a64_mov_i(is64, tmp2, imm, ctx);
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		emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
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		emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
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		emit(A64_SUB(is64, dst, dst, tmp), ctx);
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		break;
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	case BPF_ALU | BPF_LSH | BPF_K:
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	case BPF_ALU64 | BPF_LSH | BPF_K:
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		emit(A64_LSL(is64, dst, dst, imm), ctx);
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		break;
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	case BPF_ALU | BPF_RSH | BPF_K:
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	case BPF_ALU64 | BPF_RSH | BPF_K:
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		emit(A64_LSR(is64, dst, dst, imm), ctx);
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		break;
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	case BPF_ALU | BPF_ARSH | BPF_K:
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	case BPF_ALU64 | BPF_ARSH | BPF_K:
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		emit(A64_ASR(is64, dst, dst, imm), ctx);
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		break;
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#define check_imm(bits, imm) do {				\
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	if ((((imm) > 0) && ((imm) >> (bits))) ||		\
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	    (((imm) < 0) && (~(imm) >> (bits)))) {		\
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		pr_info("[%2d] imm=%d(0x%x) out of range\n",	\
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			i, imm, imm);				\
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		return -EINVAL;					\
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	}							\
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} while (0)
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#define check_imm19(imm) check_imm(19, imm)
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#define check_imm26(imm) check_imm(26, imm)
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	/* JUMP off */
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	case BPF_JMP | BPF_JA:
 | 
						|
		jmp_offset = bpf2a64_offset(i + off, i, ctx);
 | 
						|
		check_imm26(jmp_offset);
 | 
						|
		emit(A64_B(jmp_offset), ctx);
 | 
						|
		break;
 | 
						|
	/* IF (dst COND src) JUMP off */
 | 
						|
	case BPF_JMP | BPF_JEQ | BPF_X:
 | 
						|
	case BPF_JMP | BPF_JGT | BPF_X:
 | 
						|
	case BPF_JMP | BPF_JGE | BPF_X:
 | 
						|
	case BPF_JMP | BPF_JNE | BPF_X:
 | 
						|
	case BPF_JMP | BPF_JSGT | BPF_X:
 | 
						|
	case BPF_JMP | BPF_JSGE | BPF_X:
 | 
						|
		emit(A64_CMP(1, dst, src), ctx);
 | 
						|
emit_cond_jmp:
 | 
						|
		jmp_offset = bpf2a64_offset(i + off, i, ctx);
 | 
						|
		check_imm19(jmp_offset);
 | 
						|
		switch (BPF_OP(code)) {
 | 
						|
		case BPF_JEQ:
 | 
						|
			jmp_cond = A64_COND_EQ;
 | 
						|
			break;
 | 
						|
		case BPF_JGT:
 | 
						|
			jmp_cond = A64_COND_HI;
 | 
						|
			break;
 | 
						|
		case BPF_JGE:
 | 
						|
			jmp_cond = A64_COND_CS;
 | 
						|
			break;
 | 
						|
		case BPF_JNE:
 | 
						|
			jmp_cond = A64_COND_NE;
 | 
						|
			break;
 | 
						|
		case BPF_JSGT:
 | 
						|
			jmp_cond = A64_COND_GT;
 | 
						|
			break;
 | 
						|
		case BPF_JSGE:
 | 
						|
			jmp_cond = A64_COND_GE;
 | 
						|
			break;
 | 
						|
		default:
 | 
						|
			return -EFAULT;
 | 
						|
		}
 | 
						|
		emit(A64_B_(jmp_cond, jmp_offset), ctx);
 | 
						|
		break;
 | 
						|
	case BPF_JMP | BPF_JSET | BPF_X:
 | 
						|
		emit(A64_TST(1, dst, src), ctx);
 | 
						|
		goto emit_cond_jmp;
 | 
						|
	/* IF (dst COND imm) JUMP off */
 | 
						|
	case BPF_JMP | BPF_JEQ | BPF_K:
 | 
						|
	case BPF_JMP | BPF_JGT | BPF_K:
 | 
						|
	case BPF_JMP | BPF_JGE | BPF_K:
 | 
						|
	case BPF_JMP | BPF_JNE | BPF_K:
 | 
						|
	case BPF_JMP | BPF_JSGT | BPF_K:
 | 
						|
	case BPF_JMP | BPF_JSGE | BPF_K:
 | 
						|
		ctx->tmp_used = 1;
 | 
						|
		emit_a64_mov_i(1, tmp, imm, ctx);
 | 
						|
		emit(A64_CMP(1, dst, tmp), ctx);
 | 
						|
		goto emit_cond_jmp;
 | 
						|
	case BPF_JMP | BPF_JSET | BPF_K:
 | 
						|
		ctx->tmp_used = 1;
 | 
						|
		emit_a64_mov_i(1, tmp, imm, ctx);
 | 
						|
		emit(A64_TST(1, dst, tmp), ctx);
 | 
						|
		goto emit_cond_jmp;
 | 
						|
	/* function call */
 | 
						|
	case BPF_JMP | BPF_CALL:
 | 
						|
	{
 | 
						|
		const u8 r0 = bpf2a64[BPF_REG_0];
 | 
						|
		const u64 func = (u64)__bpf_call_base + imm;
 | 
						|
 | 
						|
		ctx->tmp_used = 1;
 | 
						|
		emit_a64_mov_i64(tmp, func, ctx);
 | 
						|
		emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
 | 
						|
		emit(A64_MOV(1, A64_FP, A64_SP), ctx);
 | 
						|
		emit(A64_BLR(tmp), ctx);
 | 
						|
		emit(A64_MOV(1, r0, A64_R(0)), ctx);
 | 
						|
		emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
 | 
						|
		break;
 | 
						|
	}
 | 
						|
	/* function return */
 | 
						|
	case BPF_JMP | BPF_EXIT:
 | 
						|
		if (i == ctx->prog->len - 1)
 | 
						|
			break;
 | 
						|
		jmp_offset = epilogue_offset(ctx);
 | 
						|
		check_imm26(jmp_offset);
 | 
						|
		emit(A64_B(jmp_offset), ctx);
 | 
						|
		break;
 | 
						|
 | 
						|
	/* LDX: dst = *(size *)(src + off) */
 | 
						|
	case BPF_LDX | BPF_MEM | BPF_W:
 | 
						|
	case BPF_LDX | BPF_MEM | BPF_H:
 | 
						|
	case BPF_LDX | BPF_MEM | BPF_B:
 | 
						|
	case BPF_LDX | BPF_MEM | BPF_DW:
 | 
						|
		ctx->tmp_used = 1;
 | 
						|
		emit_a64_mov_i(1, tmp, off, ctx);
 | 
						|
		switch (BPF_SIZE(code)) {
 | 
						|
		case BPF_W:
 | 
						|
			emit(A64_LDR32(dst, src, tmp), ctx);
 | 
						|
			break;
 | 
						|
		case BPF_H:
 | 
						|
			emit(A64_LDRH(dst, src, tmp), ctx);
 | 
						|
			break;
 | 
						|
		case BPF_B:
 | 
						|
			emit(A64_LDRB(dst, src, tmp), ctx);
 | 
						|
			break;
 | 
						|
		case BPF_DW:
 | 
						|
			emit(A64_LDR64(dst, src, tmp), ctx);
 | 
						|
			break;
 | 
						|
		}
 | 
						|
		break;
 | 
						|
 | 
						|
	/* ST: *(size *)(dst + off) = imm */
 | 
						|
	case BPF_ST | BPF_MEM | BPF_W:
 | 
						|
	case BPF_ST | BPF_MEM | BPF_H:
 | 
						|
	case BPF_ST | BPF_MEM | BPF_B:
 | 
						|
	case BPF_ST | BPF_MEM | BPF_DW:
 | 
						|
		goto notyet;
 | 
						|
 | 
						|
	/* STX: *(size *)(dst + off) = src */
 | 
						|
	case BPF_STX | BPF_MEM | BPF_W:
 | 
						|
	case BPF_STX | BPF_MEM | BPF_H:
 | 
						|
	case BPF_STX | BPF_MEM | BPF_B:
 | 
						|
	case BPF_STX | BPF_MEM | BPF_DW:
 | 
						|
		ctx->tmp_used = 1;
 | 
						|
		emit_a64_mov_i(1, tmp, off, ctx);
 | 
						|
		switch (BPF_SIZE(code)) {
 | 
						|
		case BPF_W:
 | 
						|
			emit(A64_STR32(src, dst, tmp), ctx);
 | 
						|
			break;
 | 
						|
		case BPF_H:
 | 
						|
			emit(A64_STRH(src, dst, tmp), ctx);
 | 
						|
			break;
 | 
						|
		case BPF_B:
 | 
						|
			emit(A64_STRB(src, dst, tmp), ctx);
 | 
						|
			break;
 | 
						|
		case BPF_DW:
 | 
						|
			emit(A64_STR64(src, dst, tmp), ctx);
 | 
						|
			break;
 | 
						|
		}
 | 
						|
		break;
 | 
						|
	/* STX XADD: lock *(u32 *)(dst + off) += src */
 | 
						|
	case BPF_STX | BPF_XADD | BPF_W:
 | 
						|
	/* STX XADD: lock *(u64 *)(dst + off) += src */
 | 
						|
	case BPF_STX | BPF_XADD | BPF_DW:
 | 
						|
		goto notyet;
 | 
						|
 | 
						|
	/* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
 | 
						|
	case BPF_LD | BPF_ABS | BPF_W:
 | 
						|
	case BPF_LD | BPF_ABS | BPF_H:
 | 
						|
	case BPF_LD | BPF_ABS | BPF_B:
 | 
						|
	/* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
 | 
						|
	case BPF_LD | BPF_IND | BPF_W:
 | 
						|
	case BPF_LD | BPF_IND | BPF_H:
 | 
						|
	case BPF_LD | BPF_IND | BPF_B:
 | 
						|
	{
 | 
						|
		const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
 | 
						|
		const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
 | 
						|
		const u8 fp = bpf2a64[BPF_REG_FP];
 | 
						|
		const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
 | 
						|
		const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
 | 
						|
		const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
 | 
						|
		const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
 | 
						|
		const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
 | 
						|
		int size;
 | 
						|
 | 
						|
		emit(A64_MOV(1, r1, r6), ctx);
 | 
						|
		emit_a64_mov_i(0, r2, imm, ctx);
 | 
						|
		if (BPF_MODE(code) == BPF_IND)
 | 
						|
			emit(A64_ADD(0, r2, r2, src), ctx);
 | 
						|
		switch (BPF_SIZE(code)) {
 | 
						|
		case BPF_W:
 | 
						|
			size = 4;
 | 
						|
			break;
 | 
						|
		case BPF_H:
 | 
						|
			size = 2;
 | 
						|
			break;
 | 
						|
		case BPF_B:
 | 
						|
			size = 1;
 | 
						|
			break;
 | 
						|
		default:
 | 
						|
			return -EINVAL;
 | 
						|
		}
 | 
						|
		emit_a64_mov_i64(r3, size, ctx);
 | 
						|
		emit(A64_ADD_I(1, r4, fp, MAX_BPF_STACK), ctx);
 | 
						|
		emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
 | 
						|
		emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
 | 
						|
		emit(A64_MOV(1, A64_FP, A64_SP), ctx);
 | 
						|
		emit(A64_BLR(r5), ctx);
 | 
						|
		emit(A64_MOV(1, r0, A64_R(0)), ctx);
 | 
						|
		emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
 | 
						|
 | 
						|
		jmp_offset = epilogue_offset(ctx);
 | 
						|
		check_imm19(jmp_offset);
 | 
						|
		emit(A64_CBZ(1, r0, jmp_offset), ctx);
 | 
						|
		emit(A64_MOV(1, r5, r0), ctx);
 | 
						|
		switch (BPF_SIZE(code)) {
 | 
						|
		case BPF_W:
 | 
						|
			emit(A64_LDR32(r0, r5, A64_ZR), ctx);
 | 
						|
#ifndef CONFIG_CPU_BIG_ENDIAN
 | 
						|
			emit(A64_REV32(0, r0, r0), ctx);
 | 
						|
#endif
 | 
						|
			break;
 | 
						|
		case BPF_H:
 | 
						|
			emit(A64_LDRH(r0, r5, A64_ZR), ctx);
 | 
						|
#ifndef CONFIG_CPU_BIG_ENDIAN
 | 
						|
			emit(A64_REV16(0, r0, r0), ctx);
 | 
						|
#endif
 | 
						|
			break;
 | 
						|
		case BPF_B:
 | 
						|
			emit(A64_LDRB(r0, r5, A64_ZR), ctx);
 | 
						|
			break;
 | 
						|
		}
 | 
						|
		break;
 | 
						|
	}
 | 
						|
notyet:
 | 
						|
		pr_info_once("*** NOT YET: opcode %02x ***\n", code);
 | 
						|
		return -EFAULT;
 | 
						|
 | 
						|
	default:
 | 
						|
		pr_err_once("unknown opcode %02x\n", code);
 | 
						|
		return -EINVAL;
 | 
						|
	}
 | 
						|
 | 
						|
	return 0;
 | 
						|
}
 | 
						|
 | 
						|
static int build_body(struct jit_ctx *ctx)
 | 
						|
{
 | 
						|
	const struct bpf_prog *prog = ctx->prog;
 | 
						|
	int i;
 | 
						|
 | 
						|
	for (i = 0; i < prog->len; i++) {
 | 
						|
		const struct bpf_insn *insn = &prog->insnsi[i];
 | 
						|
		int ret;
 | 
						|
 | 
						|
		if (ctx->image == NULL)
 | 
						|
			ctx->offset[i] = ctx->idx;
 | 
						|
 | 
						|
		ret = build_insn(insn, ctx);
 | 
						|
		if (ret)
 | 
						|
			return ret;
 | 
						|
	}
 | 
						|
 | 
						|
	return 0;
 | 
						|
}
 | 
						|
 | 
						|
static inline void bpf_flush_icache(void *start, void *end)
 | 
						|
{
 | 
						|
	flush_icache_range((unsigned long)start, (unsigned long)end);
 | 
						|
}
 | 
						|
 | 
						|
void bpf_jit_compile(struct bpf_prog *prog)
 | 
						|
{
 | 
						|
	/* Nothing to do here. We support Internal BPF. */
 | 
						|
}
 | 
						|
 | 
						|
void bpf_int_jit_compile(struct bpf_prog *prog)
 | 
						|
{
 | 
						|
	struct jit_ctx ctx;
 | 
						|
	int image_size;
 | 
						|
 | 
						|
	if (!bpf_jit_enable)
 | 
						|
		return;
 | 
						|
 | 
						|
	if (!prog || !prog->len)
 | 
						|
		return;
 | 
						|
 | 
						|
	memset(&ctx, 0, sizeof(ctx));
 | 
						|
	ctx.prog = prog;
 | 
						|
 | 
						|
	ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
 | 
						|
	if (ctx.offset == NULL)
 | 
						|
		return;
 | 
						|
 | 
						|
	/* 1. Initial fake pass to compute ctx->idx. */
 | 
						|
 | 
						|
	/* Fake pass to fill in ctx->offset. */
 | 
						|
	if (build_body(&ctx))
 | 
						|
		goto out;
 | 
						|
 | 
						|
	build_prologue(&ctx);
 | 
						|
 | 
						|
	build_epilogue(&ctx);
 | 
						|
 | 
						|
	/* Now we know the actual image size. */
 | 
						|
	image_size = sizeof(u32) * ctx.idx;
 | 
						|
	ctx.image = module_alloc(image_size);
 | 
						|
	if (unlikely(ctx.image == NULL))
 | 
						|
		goto out;
 | 
						|
 | 
						|
	/* 2. Now, the actual pass. */
 | 
						|
 | 
						|
	ctx.idx = 0;
 | 
						|
	build_prologue(&ctx);
 | 
						|
 | 
						|
	ctx.body_offset = ctx.idx;
 | 
						|
	if (build_body(&ctx)) {
 | 
						|
		module_free(NULL, ctx.image);
 | 
						|
		goto out;
 | 
						|
	}
 | 
						|
 | 
						|
	build_epilogue(&ctx);
 | 
						|
 | 
						|
	/* And we're done. */
 | 
						|
	if (bpf_jit_enable > 1)
 | 
						|
		bpf_jit_dump(prog->len, image_size, 2, ctx.image);
 | 
						|
 | 
						|
	bpf_flush_icache(ctx.image, ctx.image + ctx.idx);
 | 
						|
	prog->bpf_func = (void *)ctx.image;
 | 
						|
	prog->jited = 1;
 | 
						|
 | 
						|
out:
 | 
						|
	kfree(ctx.offset);
 | 
						|
}
 | 
						|
 | 
						|
void bpf_jit_free(struct bpf_prog *prog)
 | 
						|
{
 | 
						|
	if (prog->jited)
 | 
						|
		module_free(NULL, prog->bpf_func);
 | 
						|
 | 
						|
	kfree(prog);
 | 
						|
}
 |