Mika Kahola 0904deaf4e drm/i915: Limit CHV max cdclk ... Limit CHV maximum cdclk to 320MHz. v2: Rebase to the latest v3: Clean up of if-else tree Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-06-15 18:38:02 +02:00
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drm	drm/i915: Limit CHV max cdclk	2015-06-15 18:38:02 +02:00
host1x	gpu: host1x: Export host1x_syncpt_read()	2015-04-02 18:46:20 +02:00
ipu-v3	imx-drm changes to use media bus formats and LDB drm_panel support	2015-04-13 17:28:57 +10:00
vga
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00