Polaris is an SMSC reference platform with a SH7709S CPU and LAN9118 ethernet controller. This patch adds support for it. Updated following feedback from Nobuhiro Iwamatsu. Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
		
			
				
	
	
		
			149 lines
		
	
	
	
		
			3.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			149 lines
		
	
	
	
		
			3.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * June 2006 steve.glendinning@smsc.com
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 *
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 * Polaris-specific resource declaration
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 *
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 */
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/smsc911x.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/machvec.h>
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#include <asm/heartbeat.h>
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#include <cpu/gpio.h>
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#include <mach-se/mach/se.h>
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#define BCR2		(0xFFFFFF62)
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#define WCR2		(0xFFFFFF66)
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#define AREA5_WAIT_CTRL	(0x1C00)
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#define WAIT_STATES_10	(0x7)
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static struct resource smsc911x_resources[] = {
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	[0] = {
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		.name		= "smsc911x-memory",
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		.start		= PA_EXT5,
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		.end		= PA_EXT5 + 0x1fff,
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		.flags		= IORESOURCE_MEM,
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	},
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	[1] = {
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		.name		= "smsc911x-irq",
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		.start		= IRQ0_IRQ,
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		.end		= IRQ0_IRQ,
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		.flags		= IORESOURCE_IRQ,
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	},
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};
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static struct smsc911x_platform_config smsc911x_config = {
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	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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	.flags		= SMSC911X_USE_32BIT,
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	.phy_interface	= PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device smsc911x_device = {
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	.name		= "smsc911x",
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	.id		= 0,
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	.num_resources	= ARRAY_SIZE(smsc911x_resources),
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	.resource	= smsc911x_resources,
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	.dev = {
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		.platform_data = &smsc911x_config,
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	},
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};
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static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
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static struct heartbeat_data heartbeat_data = {
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	.bit_pos	= heartbeat_bit_pos,
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	.nr_bits	= ARRAY_SIZE(heartbeat_bit_pos),
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	.regsize	= 8,
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};
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static struct resource heartbeat_resources[] = {
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	[0] = {
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		.start	= PORT_PCDR,
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		.end	= PORT_PCDR,
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		.flags	= IORESOURCE_MEM,
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	},
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};
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static struct platform_device heartbeat_device = {
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	.name		= "heartbeat",
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	.id		= -1,
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	.dev	= {
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		.platform_data	= &heartbeat_data,
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	},
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	.num_resources	= ARRAY_SIZE(heartbeat_resources),
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	.resource	= heartbeat_resources,
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};
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static struct platform_device *polaris_devices[] __initdata = {
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	&smsc911x_device,
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	&heartbeat_device,
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};
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static int __init polaris_initialise(void)
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{
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	u16 wcr, bcr_mask;
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	printk(KERN_INFO "Configuring Polaris external bus\n");
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	/* Configure area 5 with 2 wait states */
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	wcr = ctrl_inw(WCR2);
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	wcr &= (~AREA5_WAIT_CTRL);
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	wcr |= (WAIT_STATES_10 << 10);
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	ctrl_outw(wcr, WCR2);
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	/* Configure area 5 for 32-bit access */
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	bcr_mask = ctrl_inw(BCR2);
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	bcr_mask |= 1 << 10;
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	ctrl_outw(bcr_mask, BCR2);
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	return platform_add_devices(polaris_devices,
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				    ARRAY_SIZE(polaris_devices));
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}
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arch_initcall(polaris_initialise);
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static struct ipr_data ipr_irq_table[] = {
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	/* External IRQs */
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	{ IRQ0_IRQ, 0,  0,  1, },	/* IRQ0 */
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	{ IRQ1_IRQ, 0,  4,  1, },	/* IRQ1 */
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};
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static unsigned long ipr_offsets[] = {
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	INTC_IPRC
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};
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static struct ipr_desc ipr_irq_desc = {
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	.ipr_offsets	= ipr_offsets,
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	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
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	.ipr_data	= ipr_irq_table,
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	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
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	.chip = {
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		.name	= "sh7709-ext",
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	},
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};
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static void __init init_polaris_irq(void)
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{
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	/* Disable all interrupts */
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	ctrl_outw(0, BCR_ILCRA);
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	ctrl_outw(0, BCR_ILCRB);
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	ctrl_outw(0, BCR_ILCRC);
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	ctrl_outw(0, BCR_ILCRD);
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	ctrl_outw(0, BCR_ILCRE);
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	ctrl_outw(0, BCR_ILCRF);
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	ctrl_outw(0, BCR_ILCRG);
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	register_ipr_controller(&ipr_irq_desc);
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}
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static struct sh_machine_vector mv_polaris __initmv = {
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	.mv_name		= "Polaris",
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	.mv_nr_irqs		= 61,
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	.mv_init_irq		= init_polaris_irq,
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};
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