Adapt new API. Almost change is trivial, most important change are to remove following like =operator. cpumask_t cpu_mask = *mm_cpumask(mm); cpus_allowed = current->cpus_allowed; Because cpumask_var_t is =operator unsafe. These usage might prevent kernel core improvement. No functional change. Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			322 lines
		
	
	
	
		
			7.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			322 lines
		
	
	
	
		
			7.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 *  sun4m SMP support.
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 *
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 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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 */
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#include <linux/interrupt.h>
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#include <linux/profile.h>
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#include <linux/delay.h>
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#include <linux/cpu.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include "irq.h"
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#include "kernel.h"
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#define IRQ_IPI_SINGLE		12
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#define IRQ_IPI_MASK		13
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#define IRQ_IPI_RESCHED		14
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#define IRQ_CROSS_CALL		15
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static inline unsigned long
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swap_ulong(volatile unsigned long *ptr, unsigned long val)
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{
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	__asm__ __volatile__("swap [%1], %0\n\t" :
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			     "=&r" (val), "=&r" (ptr) :
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			     "0" (val), "1" (ptr));
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	return val;
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}
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static void smp4m_ipi_init(void);
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static void smp_setup_percpu_timer(void);
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void __cpuinit smp4m_callin(void)
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{
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	int cpuid = hard_smp_processor_id();
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	local_flush_cache_all();
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	local_flush_tlb_all();
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	notify_cpu_starting(cpuid);
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	/* Get our local ticker going. */
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	smp_setup_percpu_timer();
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	calibrate_delay();
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	smp_store_cpu_info(cpuid);
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	local_flush_cache_all();
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	local_flush_tlb_all();
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	/*
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	 * Unblock the master CPU _only_ when the scheduler state
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	 * of all secondary CPUs will be up-to-date, so after
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	 * the SMP initialization the master will be just allowed
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	 * to call the scheduler code.
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	 */
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	/* Allow master to continue. */
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	swap_ulong(&cpu_callin_map[cpuid], 1);
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	/* XXX: What's up with all the flushes? */
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	local_flush_cache_all();
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	local_flush_tlb_all();
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	/* Fix idle thread fields. */
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	__asm__ __volatile__("ld [%0], %%g6\n\t"
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			     : : "r" (¤t_set[cpuid])
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			     : "memory" /* paranoid */);
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	/* Attach to the address space of init_task. */
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	atomic_inc(&init_mm.mm_count);
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	current->active_mm = &init_mm;
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	while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
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		mb();
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	local_irq_enable();
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	set_cpu_online(cpuid, true);
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}
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/*
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 *	Cycle through the processors asking the PROM to start each one.
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 */
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void __init smp4m_boot_cpus(void)
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{
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	smp4m_ipi_init();
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	smp_setup_percpu_timer();
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	local_flush_cache_all();
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}
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int __cpuinit smp4m_boot_one_cpu(int i)
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{
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	unsigned long *entry = &sun4m_cpu_startup;
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	struct task_struct *p;
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	int timeout;
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	int cpu_node;
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	cpu_find_by_mid(i, &cpu_node);
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	/* Cook up an idler for this guy. */
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	p = fork_idle(i);
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	current_set[i] = task_thread_info(p);
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	/* See trampoline.S for details... */
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	entry += ((i - 1) * 3);
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	/*
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	 * Initialize the contexts table
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	 * Since the call to prom_startcpu() trashes the structure,
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	 * we need to re-initialize it for each cpu
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	 */
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	smp_penguin_ctable.which_io = 0;
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	smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
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	smp_penguin_ctable.reg_size = 0;
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	/* whirrr, whirrr, whirrrrrrrrr... */
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	printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
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	local_flush_cache_all();
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	prom_startcpu(cpu_node, &smp_penguin_ctable, 0, (char *)entry);
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	/* wheee... it's going... */
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	for (timeout = 0; timeout < 10000; timeout++) {
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		if (cpu_callin_map[i])
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			break;
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		udelay(200);
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	}
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	if (!(cpu_callin_map[i])) {
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		printk(KERN_ERR "Processor %d is stuck.\n", i);
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		return -ENODEV;
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	}
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	local_flush_cache_all();
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	return 0;
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}
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void __init smp4m_smp_done(void)
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{
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	int i, first;
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	int *prev;
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	/* setup cpu list for irq rotation */
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	first = 0;
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	prev = &first;
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	for_each_online_cpu(i) {
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		*prev = i;
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		prev = &cpu_data(i).next;
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	}
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	*prev = first;
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	local_flush_cache_all();
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	/* Ok, they are spinning and ready to go. */
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}
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/* Initialize IPIs on the SUN4M SMP machine */
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static void __init smp4m_ipi_init(void)
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{
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}
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static void smp4m_ipi_resched(int cpu)
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{
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	set_cpu_int(cpu, IRQ_IPI_RESCHED);
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}
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static void smp4m_ipi_single(int cpu)
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{
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	set_cpu_int(cpu, IRQ_IPI_SINGLE);
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}
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static void smp4m_ipi_mask_one(int cpu)
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{
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	set_cpu_int(cpu, IRQ_IPI_MASK);
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}
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static struct smp_funcall {
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	smpfunc_t func;
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	unsigned long arg1;
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	unsigned long arg2;
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	unsigned long arg3;
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	unsigned long arg4;
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	unsigned long arg5;
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	unsigned long processors_in[SUN4M_NCPUS];  /* Set when ipi entered. */
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	unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
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} ccall_info;
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static DEFINE_SPINLOCK(cross_call_lock);
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/* Cross calls must be serialized, at least currently. */
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static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
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			     unsigned long arg2, unsigned long arg3,
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			     unsigned long arg4)
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{
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		register int ncpus = SUN4M_NCPUS;
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		unsigned long flags;
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		spin_lock_irqsave(&cross_call_lock, flags);
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		/* Init function glue. */
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		ccall_info.func = func;
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		ccall_info.arg1 = arg1;
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		ccall_info.arg2 = arg2;
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		ccall_info.arg3 = arg3;
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		ccall_info.arg4 = arg4;
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		ccall_info.arg5 = 0;
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		/* Init receive/complete mapping, plus fire the IPI's off. */
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		{
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			register int i;
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			cpumask_clear_cpu(smp_processor_id(), &mask);
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			cpumask_and(&mask, cpu_online_mask, &mask);
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			for (i = 0; i < ncpus; i++) {
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				if (cpumask_test_cpu(i, &mask)) {
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					ccall_info.processors_in[i] = 0;
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					ccall_info.processors_out[i] = 0;
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					set_cpu_int(i, IRQ_CROSS_CALL);
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				} else {
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					ccall_info.processors_in[i] = 1;
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					ccall_info.processors_out[i] = 1;
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				}
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			}
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		}
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		{
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			register int i;
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			i = 0;
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			do {
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				if (!cpumask_test_cpu(i, &mask))
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					continue;
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				while (!ccall_info.processors_in[i])
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					barrier();
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			} while (++i < ncpus);
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			i = 0;
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			do {
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				if (!cpumask_test_cpu(i, &mask))
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					continue;
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				while (!ccall_info.processors_out[i])
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					barrier();
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			} while (++i < ncpus);
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		}
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		spin_unlock_irqrestore(&cross_call_lock, flags);
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}
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/* Running cross calls. */
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void smp4m_cross_call_irq(void)
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{
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	int i = smp_processor_id();
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	ccall_info.processors_in[i] = 1;
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	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
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			ccall_info.arg4, ccall_info.arg5);
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	ccall_info.processors_out[i] = 1;
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}
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void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
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{
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	struct pt_regs *old_regs;
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	int cpu = smp_processor_id();
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	old_regs = set_irq_regs(regs);
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	sun4m_clear_profile_irq(cpu);
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	profile_tick(CPU_PROFILING);
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	if (!--prof_counter(cpu)) {
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		int user = user_mode(regs);
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		irq_enter();
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		update_process_times(user);
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		irq_exit();
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		prof_counter(cpu) = prof_multiplier(cpu);
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	}
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	set_irq_regs(old_regs);
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}
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static void __cpuinit smp_setup_percpu_timer(void)
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{
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	int cpu = smp_processor_id();
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	prof_counter(cpu) = prof_multiplier(cpu) = 1;
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	load_profile_irq(cpu, lvl14_resolution);
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	if (cpu == boot_cpu_id)
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		sun4m_unmask_profile_irq();
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}
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static void __init smp4m_blackbox_id(unsigned *addr)
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{
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	int rd = *addr & 0x3e000000;
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	int rs1 = rd >> 11;
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	addr[0] = 0x81580000 | rd;		/* rd %tbr, reg */
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	addr[1] = 0x8130200c | rd | rs1;	/* srl reg, 0xc, reg */
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	addr[2] = 0x80082003 | rd | rs1;	/* and reg, 3, reg */
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}
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static void __init smp4m_blackbox_current(unsigned *addr)
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{
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	int rd = *addr & 0x3e000000;
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	int rs1 = rd >> 11;
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	addr[0] = 0x81580000 | rd;		/* rd %tbr, reg */
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	addr[2] = 0x8130200a | rd | rs1;	/* srl reg, 0xa, reg */
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	addr[4] = 0x8008200c | rd | rs1;	/* and reg, 0xc, reg */
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}
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void __init sun4m_init_smp(void)
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{
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	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
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	BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
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	BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
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	BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
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	BTFIXUPSET_CALL(smp_ipi_resched, smp4m_ipi_resched, BTFIXUPCALL_NORM);
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	BTFIXUPSET_CALL(smp_ipi_single, smp4m_ipi_single, BTFIXUPCALL_NORM);
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	BTFIXUPSET_CALL(smp_ipi_mask_one, smp4m_ipi_mask_one, BTFIXUPCALL_NORM);
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}
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