3c4c342fea
A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com>
95 lines
2.5 KiB
C
95 lines
2.5 KiB
C
/*
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* arch/arm/mach-tegra/include/mach/io.h
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*
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@google.com>
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* Erik Gilling <konkers@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MACH_TEGRA_IO_H
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#define __MACH_TEGRA_IO_H
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#define IO_SPACE_LIMIT 0xffff
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/* On TEGRA, many peripherals are very closely packed in
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* two 256MB io windows (that actually only use about 64KB
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* at the start of each).
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*
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* We will just map the first 1MB of each window (to minimize
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* pt entries needed) and provide a macro to transform physical
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* io addresses to an appropriate void __iomem *.
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*
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*/
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#ifdef __ASSEMBLY__
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#define IOMEM(x) (x)
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#else
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#define IOMEM(x) ((void __force __iomem *)(x))
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#endif
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#define IO_IRAM_PHYS 0x40000000
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#define IO_IRAM_VIRT IOMEM(0xFE400000)
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#define IO_IRAM_SIZE SZ_256K
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#define IO_CPU_PHYS 0x50040000
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#define IO_CPU_VIRT IOMEM(0xFE000000)
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#define IO_CPU_SIZE SZ_16K
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#define IO_PPSB_PHYS 0x60000000
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#define IO_PPSB_VIRT IOMEM(0xFE200000)
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#define IO_PPSB_SIZE SZ_1M
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#define IO_APB_PHYS 0x70000000
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#define IO_APB_VIRT IOMEM(0xFE300000)
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#define IO_APB_SIZE SZ_1M
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#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
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#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
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#define IO_TO_VIRT(n) ( \
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IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \
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IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \
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IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \
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IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \
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IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \
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IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
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IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
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IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
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NULL)
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#ifndef __ASSEMBLER__
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#define IO_ADDRESS(n) (IO_TO_VIRT(n))
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#ifdef CONFIG_TEGRA_PCI
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extern void __iomem *tegra_pcie_io_base;
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static inline void __iomem *__io(unsigned long addr)
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{
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return tegra_pcie_io_base + (addr & IO_SPACE_LIMIT);
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}
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#else
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#endif
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#endif
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#endif
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