* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits) ARM: S5P64X0: External Interrupt Support ARM: EXYNOS4: Enable MFC on Samsung NURI ARM: EXYNOS4: Enable MFC on universal_c210 ARM: S5PV210: Enable MFC on Goni ARM: S5P: Add support for MFC device ARM: EXYNOS4: Add support FIMD on SMDKC210 ARM: EXYNOS4: Add platform device and helper functions for FIMD ARM: EXYNOS4: Add resource definition for FIMD ARM: EXYNOS4: Change devname for FIMD clkdev ARM: SAMSUNG: Add IRQ_I2S0 definition ARM: SAMSUNG: Add platform device for idma ARM: EXYNOS4: Add more registers to be saved and restored for PM ARM: EXYNOS4: Add more register addresses of CMU ARM: EXYNOS4: Add platform device for dwmci driver ARM: EXYNOS4: configure rtc-s3c on NURI ARM: EXYNOS4: configure MAX8903 secondary charger on NURI ARM: EXYNOS4: configure ADC on NURI ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs ... Fix up tons of silly conflicts: - arch/arm/mach-davinci/include/mach/psc.h - arch/arm/mach-exynos4/Kconfig - arch/arm/mach-exynos4/mach-smdkc210.c - arch/arm/mach-exynos4/pm.c - arch/arm/mach-imx/mm-imx1.c - arch/arm/mach-imx/mm-imx21.c - arch/arm/mach-imx/mm-imx25.c - arch/arm/mach-imx/mm-imx27.c - arch/arm/mach-imx/mm-imx31.c - arch/arm/mach-imx/mm-imx35.c - arch/arm/mach-mx5/mm.c - arch/arm/mach-s5pv210/mach-goni.c - arch/arm/mm/Kconfig
		
			
				
	
	
		
			89 lines
		
	
	
	
		
			2.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			89 lines
		
	
	
	
		
			2.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * arch/arm/mach-imx/mm-imx27.c
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 *
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 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version 2
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 * of the License, or (at your option) any later version.
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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 * MA 02110-1301, USA.
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 */
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <mach/hardware.h>
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#include <mach/common.h>
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#include <mach/devices-common.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include <mach/irqs.h>
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#include <mach/iomux-v1.h>
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/* MX27 memory map definition */
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static struct map_desc imx27_io_desc[] __initdata = {
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	/*
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	 * this fixed mapping covers:
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	 * - AIPI1
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	 * - AIPI2
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	 * - AITC
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	 * - ROM Patch
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	 * - and some reserved space
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	 */
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	imx_map_entry(MX27, AIPI, MT_DEVICE),
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	/*
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	 * this fixed mapping covers:
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	 * - CSI
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	 * - ATA
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	 */
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	imx_map_entry(MX27, SAHB1, MT_DEVICE),
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	/*
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	 * this fixed mapping covers:
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	 * - EMI
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	 */
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	imx_map_entry(MX27, X_MEMC, MT_DEVICE),
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};
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/*
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 * Initialize the memory map. It is called during the
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 * system startup to create static physical to virtual
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 * memory map for the IO modules.
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 */
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void __init mx27_map_io(void)
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{
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	iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
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}
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void __init imx27_init_early(void)
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{
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	mxc_set_cpu_type(MXC_CPU_MX27);
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	mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
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	imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
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			MX27_NUM_GPIO_PORT);
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}
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void __init mx27_init_irq(void)
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{
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	mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
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}
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void __init imx27_soc_init(void)
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{
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	/* i.mx27 has the i.mx21 type gpio */
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	mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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	mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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	mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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	mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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	mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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	mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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	imx_add_imx_dma();
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}
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