74ac23a3e4
As SPI platform devices are consolidated to plat-samsung, some corresponding changes are required in the respective machine folder. Setup files are added for SPI GPIO configurations and platform data initialization. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
174 lines
5 KiB
C
174 lines
5 KiB
C
/* linux/arch/arm/mach-exynos4/include/mach/irqs.h
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* EXYNOS4 - IRQ definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H __FILE__
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#include <plat/irqs.h>
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/* PPI: Private Peripheral Interrupt */
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#define IRQ_PPI(x) (x+16)
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#define IRQ_MCT_LOCALTIMER IRQ_PPI(12)
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/* SPI: Shared Peripheral Interrupt */
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#define IRQ_SPI(x) (x+32)
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#define IRQ_EINT0 IRQ_SPI(16)
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#define IRQ_EINT1 IRQ_SPI(17)
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#define IRQ_EINT2 IRQ_SPI(18)
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#define IRQ_EINT3 IRQ_SPI(19)
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#define IRQ_EINT4 IRQ_SPI(20)
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#define IRQ_EINT5 IRQ_SPI(21)
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#define IRQ_EINT6 IRQ_SPI(22)
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#define IRQ_EINT7 IRQ_SPI(23)
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#define IRQ_EINT8 IRQ_SPI(24)
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#define IRQ_EINT9 IRQ_SPI(25)
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#define IRQ_EINT10 IRQ_SPI(26)
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#define IRQ_EINT11 IRQ_SPI(27)
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#define IRQ_EINT12 IRQ_SPI(28)
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#define IRQ_EINT13 IRQ_SPI(29)
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#define IRQ_EINT14 IRQ_SPI(30)
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#define IRQ_EINT15 IRQ_SPI(31)
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#define IRQ_EINT16_31 IRQ_SPI(32)
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#define IRQ_PDMA0 IRQ_SPI(35)
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#define IRQ_PDMA1 IRQ_SPI(36)
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#define IRQ_TIMER0_VIC IRQ_SPI(37)
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#define IRQ_TIMER1_VIC IRQ_SPI(38)
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#define IRQ_TIMER2_VIC IRQ_SPI(39)
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#define IRQ_TIMER3_VIC IRQ_SPI(40)
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#define IRQ_TIMER4_VIC IRQ_SPI(41)
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#define IRQ_MCT_L0 IRQ_SPI(42)
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#define IRQ_WDT IRQ_SPI(43)
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#define IRQ_RTC_ALARM IRQ_SPI(44)
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#define IRQ_RTC_TIC IRQ_SPI(45)
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#define IRQ_GPIO_XB IRQ_SPI(46)
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#define IRQ_GPIO_XA IRQ_SPI(47)
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#define IRQ_MCT_L1 IRQ_SPI(48)
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#define IRQ_UART0 IRQ_SPI(52)
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#define IRQ_UART1 IRQ_SPI(53)
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#define IRQ_UART2 IRQ_SPI(54)
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#define IRQ_UART3 IRQ_SPI(55)
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#define IRQ_UART4 IRQ_SPI(56)
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#define IRQ_MCT_G0 IRQ_SPI(57)
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#define IRQ_IIC IRQ_SPI(58)
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#define IRQ_IIC1 IRQ_SPI(59)
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#define IRQ_IIC2 IRQ_SPI(60)
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#define IRQ_IIC3 IRQ_SPI(61)
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#define IRQ_IIC4 IRQ_SPI(62)
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#define IRQ_IIC5 IRQ_SPI(63)
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#define IRQ_IIC6 IRQ_SPI(64)
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#define IRQ_IIC7 IRQ_SPI(65)
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#define IRQ_SPI0 IRQ_SPI(66)
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#define IRQ_SPI1 IRQ_SPI(67)
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#define IRQ_SPI2 IRQ_SPI(68)
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#define IRQ_USB_HOST IRQ_SPI(70)
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#define IRQ_USB_HSOTG IRQ_SPI(71)
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#define IRQ_MODEM_IF IRQ_SPI(72)
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#define IRQ_HSMMC0 IRQ_SPI(73)
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#define IRQ_HSMMC1 IRQ_SPI(74)
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#define IRQ_HSMMC2 IRQ_SPI(75)
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#define IRQ_HSMMC3 IRQ_SPI(76)
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#define IRQ_DWMCI IRQ_SPI(77)
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#define IRQ_MIPI_CSIS0 IRQ_SPI(78)
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#define IRQ_MIPI_CSIS1 IRQ_SPI(80)
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#define IRQ_ONENAND_AUDI IRQ_SPI(82)
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#define IRQ_ROTATOR IRQ_SPI(83)
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#define IRQ_FIMC0 IRQ_SPI(84)
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#define IRQ_FIMC1 IRQ_SPI(85)
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#define IRQ_FIMC2 IRQ_SPI(86)
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#define IRQ_FIMC3 IRQ_SPI(87)
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#define IRQ_JPEG IRQ_SPI(88)
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#define IRQ_2D IRQ_SPI(89)
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#define IRQ_PCIE IRQ_SPI(90)
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#define IRQ_MIXER IRQ_SPI(91)
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#define IRQ_HDMI IRQ_SPI(92)
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#define IRQ_IIC_HDMIPHY IRQ_SPI(93)
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#define IRQ_MFC IRQ_SPI(94)
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#define IRQ_SDO IRQ_SPI(95)
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#define IRQ_AUDIO_SS IRQ_SPI(96)
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#define IRQ_I2S0 IRQ_SPI(97)
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#define IRQ_I2S1 IRQ_SPI(98)
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#define IRQ_I2S2 IRQ_SPI(99)
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#define IRQ_AC97 IRQ_SPI(100)
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#define IRQ_SPDIF IRQ_SPI(104)
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#define IRQ_ADC0 IRQ_SPI(105)
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#define IRQ_PEN0 IRQ_SPI(106)
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#define IRQ_ADC1 IRQ_SPI(107)
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#define IRQ_PEN1 IRQ_SPI(108)
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#define IRQ_KEYPAD IRQ_SPI(109)
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#define IRQ_PMU IRQ_SPI(110)
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#define IRQ_GPS IRQ_SPI(111)
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#define IRQ_INTFEEDCTRL_SSS IRQ_SPI(112)
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#define IRQ_SLIMBUS IRQ_SPI(113)
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#define IRQ_TSI IRQ_SPI(115)
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#define IRQ_SATA IRQ_SPI(116)
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#define MAX_IRQ_IN_COMBINER 8
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#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
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#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y)
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#define IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
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#define IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
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#define IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
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#define IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3)
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#define IRQ_SYSMMU_FIMC2_0 COMBINER_IRQ(4, 4)
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#define IRQ_SYSMMU_FIMC3_0 COMBINER_IRQ(4, 5)
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#define IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 6)
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#define IRQ_SYSMMU_2D_0 COMBINER_IRQ(4, 7)
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#define IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(5, 0)
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#define IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(5, 1)
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#define IRQ_SYSMMU_LCD0_M0_0 COMBINER_IRQ(5, 2)
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#define IRQ_SYSMMU_LCD1_M1_0 COMBINER_IRQ(5, 3)
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#define IRQ_SYSMMU_TV_M0_0 COMBINER_IRQ(5, 4)
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#define IRQ_SYSMMU_MFC_M0_0 COMBINER_IRQ(5, 5)
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#define IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6)
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#define IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7)
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#define IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0)
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#define IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1)
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#define IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2)
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#define MAX_COMBINER_NR 16
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#define IRQ_ADC IRQ_ADC0
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#define IRQ_TC IRQ_PEN0
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#define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0)
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#define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE + 0)
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#define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE + 16)
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/* optional GPIO interrupts */
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#define S5P_GPIOINT_BASE (S5P_IRQ_EINT_BASE + 32)
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#define IRQ_GPIO1_NR_GROUPS 16
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#define IRQ_GPIO2_NR_GROUPS 9
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#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
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#define IRQ_TIMER_BASE (IRQ_GPIO_END + 64)
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/* Set the default NR_IRQS */
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#define NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
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#endif /* __ASM_ARCH_IRQS_H */
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