Convert #include "..." to #include <path/...> in drivers/gpu/. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
		
			
				
	
	
		
			391 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			391 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/* via_irq.c
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 *
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 * Copyright 2004 BEAM Ltd.
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 * Copyright 2002 Tungsten Graphics, Inc.
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 * Copyright 2005 Thomas Hellstrom.
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * BEAM LTD, TUNGSTEN GRAPHICS  AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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 * DEALINGS IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Terry Barnaby <terry1@beam.ltd.uk>
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 *    Keith Whitwell <keith@tungstengraphics.com>
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 *    Thomas Hellstrom <unichrome@shipmail.org>
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 *
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 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
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 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
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 * The refresh rate is also calculated for video playback sync purposes.
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 */
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#include <drm/drmP.h>
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#include <drm/via_drm.h>
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#include "via_drv.h"
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#define VIA_REG_INTERRUPT       0x200
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/* VIA_REG_INTERRUPT */
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#define VIA_IRQ_GLOBAL	  (1 << 31)
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#define VIA_IRQ_VBLANK_ENABLE   (1 << 19)
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#define VIA_IRQ_VBLANK_PENDING  (1 << 3)
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#define VIA_IRQ_HQV0_ENABLE     (1 << 11)
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#define VIA_IRQ_HQV1_ENABLE     (1 << 25)
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#define VIA_IRQ_HQV0_PENDING    (1 << 9)
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#define VIA_IRQ_HQV1_PENDING    (1 << 10)
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#define VIA_IRQ_DMA0_DD_ENABLE  (1 << 20)
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#define VIA_IRQ_DMA0_TD_ENABLE  (1 << 21)
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#define VIA_IRQ_DMA1_DD_ENABLE  (1 << 22)
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#define VIA_IRQ_DMA1_TD_ENABLE  (1 << 23)
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#define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
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#define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
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#define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
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#define VIA_IRQ_DMA1_TD_PENDING (1 << 7)
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/*
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 * Device-specific IRQs go here. This type might need to be extended with
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 * the register if there are multiple IRQ control registers.
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 * Currently we activate the HQV interrupts of  Unichrome Pro group A.
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 */
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static maskarray_t via_pro_group_a_irqs[] = {
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	{VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
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	 0x00000000 },
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	{VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
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	 0x00000000 },
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	{VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
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	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
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	{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
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	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
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};
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static int via_num_pro_group_a = ARRAY_SIZE(via_pro_group_a_irqs);
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static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
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static maskarray_t via_unichrome_irqs[] = {
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	{VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
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	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
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	{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
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	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
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};
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static int via_num_unichrome = ARRAY_SIZE(via_unichrome_irqs);
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static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
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static unsigned time_diff(struct timeval *now, struct timeval *then)
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{
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	return (now->tv_usec >= then->tv_usec) ?
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		now->tv_usec - then->tv_usec :
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		1000000 - (then->tv_usec - now->tv_usec);
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}
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u32 via_get_vblank_counter(struct drm_device *dev, int crtc)
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{
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	drm_via_private_t *dev_priv = dev->dev_private;
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	if (crtc != 0)
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		return 0;
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	return atomic_read(&dev_priv->vbl_received);
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}
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irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
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{
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	struct drm_device *dev = (struct drm_device *) arg;
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	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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	u32 status;
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	int handled = 0;
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	struct timeval cur_vblank;
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	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
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	int i;
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	status = VIA_READ(VIA_REG_INTERRUPT);
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	if (status & VIA_IRQ_VBLANK_PENDING) {
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		atomic_inc(&dev_priv->vbl_received);
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		if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) {
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			do_gettimeofday(&cur_vblank);
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			if (dev_priv->last_vblank_valid) {
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				dev_priv->usec_per_vblank =
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					time_diff(&cur_vblank,
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						  &dev_priv->last_vblank) >> 4;
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			}
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			dev_priv->last_vblank = cur_vblank;
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			dev_priv->last_vblank_valid = 1;
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		}
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		if (!(atomic_read(&dev_priv->vbl_received) & 0xFF)) {
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			DRM_DEBUG("US per vblank is: %u\n",
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				  dev_priv->usec_per_vblank);
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		}
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		drm_handle_vblank(dev, 0);
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		handled = 1;
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	}
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	for (i = 0; i < dev_priv->num_irqs; ++i) {
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		if (status & cur_irq->pending_mask) {
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			atomic_inc(&cur_irq->irq_received);
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			DRM_WAKEUP(&cur_irq->irq_queue);
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			handled = 1;
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			if (dev_priv->irq_map[drm_via_irq_dma0_td] == i)
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				via_dmablit_handler(dev, 0, 1);
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			else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i)
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				via_dmablit_handler(dev, 1, 1);
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		}
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		cur_irq++;
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	}
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	/* Acknowledge interrupts */
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	VIA_WRITE(VIA_REG_INTERRUPT, status);
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	if (handled)
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		return IRQ_HANDLED;
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	else
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		return IRQ_NONE;
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}
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static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t *dev_priv)
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{
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	u32 status;
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	if (dev_priv) {
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		/* Acknowledge interrupts */
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		status = VIA_READ(VIA_REG_INTERRUPT);
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		VIA_WRITE(VIA_REG_INTERRUPT, status |
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			  dev_priv->irq_pending_mask);
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	}
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}
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int via_enable_vblank(struct drm_device *dev, int crtc)
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{
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	drm_via_private_t *dev_priv = dev->dev_private;
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	u32 status;
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	if (crtc != 0) {
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		DRM_ERROR("%s:  bad crtc %d\n", __func__, crtc);
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		return -EINVAL;
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	}
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	status = VIA_READ(VIA_REG_INTERRUPT);
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	VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_VBLANK_ENABLE);
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	VIA_WRITE8(0x83d4, 0x11);
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	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
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	return 0;
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}
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void via_disable_vblank(struct drm_device *dev, int crtc)
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{
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	drm_via_private_t *dev_priv = dev->dev_private;
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	u32 status;
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	status = VIA_READ(VIA_REG_INTERRUPT);
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	VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBLANK_ENABLE);
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	VIA_WRITE8(0x83d4, 0x11);
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	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
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	if (crtc != 0)
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		DRM_ERROR("%s:  bad crtc %d\n", __func__, crtc);
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}
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static int
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via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence,
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		    unsigned int *sequence)
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{
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	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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	unsigned int cur_irq_sequence;
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	drm_via_irq_t *cur_irq;
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	int ret = 0;
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	maskarray_t *masks;
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	int real_irq;
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	DRM_DEBUG("\n");
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	if (!dev_priv) {
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		DRM_ERROR("called with no initialization\n");
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		return -EINVAL;
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	}
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	if (irq >= drm_via_irq_num) {
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		DRM_ERROR("Trying to wait on unknown irq %d\n", irq);
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		return -EINVAL;
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	}
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	real_irq = dev_priv->irq_map[irq];
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	if (real_irq < 0) {
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		DRM_ERROR("Video IRQ %d not available on this hardware.\n",
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			  irq);
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		return -EINVAL;
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	}
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	masks = dev_priv->irq_masks;
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	cur_irq = dev_priv->via_irqs + real_irq;
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	if (masks[real_irq][2] && !force_sequence) {
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		DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
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			    ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
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			     masks[irq][4]));
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		cur_irq_sequence = atomic_read(&cur_irq->irq_received);
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	} else {
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		DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
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			    (((cur_irq_sequence =
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			       atomic_read(&cur_irq->irq_received)) -
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			      *sequence) <= (1 << 23)));
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	}
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	*sequence = cur_irq_sequence;
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	return ret;
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}
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/*
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 * drm_dma.h hooks
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 */
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void via_driver_irq_preinstall(struct drm_device *dev)
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{
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	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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	u32 status;
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	drm_via_irq_t *cur_irq;
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	int i;
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	DRM_DEBUG("dev_priv: %p\n", dev_priv);
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	if (dev_priv) {
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		cur_irq = dev_priv->via_irqs;
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		dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
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		dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
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		if (dev_priv->chipset == VIA_PRO_GROUP_A ||
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		    dev_priv->chipset == VIA_DX9_0) {
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			dev_priv->irq_masks = via_pro_group_a_irqs;
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			dev_priv->num_irqs = via_num_pro_group_a;
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			dev_priv->irq_map = via_irqmap_pro_group_a;
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		} else {
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			dev_priv->irq_masks = via_unichrome_irqs;
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			dev_priv->num_irqs = via_num_unichrome;
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			dev_priv->irq_map = via_irqmap_unichrome;
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		}
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		for (i = 0; i < dev_priv->num_irqs; ++i) {
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			atomic_set(&cur_irq->irq_received, 0);
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			cur_irq->enable_mask = dev_priv->irq_masks[i][0];
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			cur_irq->pending_mask = dev_priv->irq_masks[i][1];
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			DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
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			dev_priv->irq_enable_mask |= cur_irq->enable_mask;
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			dev_priv->irq_pending_mask |= cur_irq->pending_mask;
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			cur_irq++;
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			DRM_DEBUG("Initializing IRQ %d\n", i);
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		}
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		dev_priv->last_vblank_valid = 0;
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		/* Clear VSync interrupt regs */
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		status = VIA_READ(VIA_REG_INTERRUPT);
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		VIA_WRITE(VIA_REG_INTERRUPT, status &
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			  ~(dev_priv->irq_enable_mask));
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		/* Clear bits if they're already high */
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		viadrv_acknowledge_irqs(dev_priv);
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	}
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}
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int via_driver_irq_postinstall(struct drm_device *dev)
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{
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	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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	u32 status;
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	DRM_DEBUG("via_driver_irq_postinstall\n");
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	if (!dev_priv)
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		return -EINVAL;
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	status = VIA_READ(VIA_REG_INTERRUPT);
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	VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
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		  | dev_priv->irq_enable_mask);
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	/* Some magic, oh for some data sheets ! */
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	VIA_WRITE8(0x83d4, 0x11);
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	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
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	return 0;
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}
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void via_driver_irq_uninstall(struct drm_device *dev)
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{
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	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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	u32 status;
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	DRM_DEBUG("\n");
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	if (dev_priv) {
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		/* Some more magic, oh for some data sheets ! */
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		VIA_WRITE8(0x83d4, 0x11);
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		VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
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		status = VIA_READ(VIA_REG_INTERRUPT);
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		VIA_WRITE(VIA_REG_INTERRUPT, status &
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			  ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
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	}
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}
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int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv)
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{
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	drm_via_irqwait_t *irqwait = data;
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	struct timeval now;
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	int ret = 0;
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	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
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	int force_sequence;
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	if (irqwait->request.irq >= dev_priv->num_irqs) {
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		DRM_ERROR("Trying to wait on unknown irq %d\n",
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			  irqwait->request.irq);
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		return -EINVAL;
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	}
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	cur_irq += irqwait->request.irq;
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	switch (irqwait->request.type & ~VIA_IRQ_FLAGS_MASK) {
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	case VIA_IRQ_RELATIVE:
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		irqwait->request.sequence +=
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			atomic_read(&cur_irq->irq_received);
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		irqwait->request.type &= ~_DRM_VBLANK_RELATIVE;
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	case VIA_IRQ_ABSOLUTE:
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		break;
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	default:
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		return -EINVAL;
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	}
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	if (irqwait->request.type & VIA_IRQ_SIGNAL) {
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		DRM_ERROR("Signals on Via IRQs not implemented yet.\n");
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		return -EINVAL;
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	}
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	force_sequence = (irqwait->request.type & VIA_IRQ_FORCE_SEQUENCE);
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 | 
						|
	ret = via_driver_irq_wait(dev, irqwait->request.irq, force_sequence,
 | 
						|
				  &irqwait->request.sequence);
 | 
						|
	do_gettimeofday(&now);
 | 
						|
	irqwait->reply.tval_sec = now.tv_sec;
 | 
						|
	irqwait->reply.tval_usec = now.tv_usec;
 | 
						|
 | 
						|
	return ret;
 | 
						|
}
 |