This is a rather large set of patches for device drivers that for one
reason or another the subsystem maintainer preferred to get merged
through the arm-soc tree. There are both new drivers as well as
existing drivers that are getting converted from platform-specific
code into standalone drivers using the appropriate subsystem
specific interfaces.
In particular, we can now have pinctrl, clk, clksource and irqchip
drivers in one file per driver, without the need to call into
platform specific interface, or to get called from platform specific
code, as long as all information about the hardware is provided
through a device tree.
Most of the drivers we touch this time are for clocksource. Since
now most of them are part of drivers/clocksource, I expect that we
won't have to touch these again from arm-soc and can let the
clocksource maintainers take care of these in the future.
Another larger part of this series is specific to the exynos platform,
which is seeing some significant effort in upstreaming and
modernization of its device drivers this time around, which
unfortunately is also the cause for the churn and a lot of the
merge conflicts.
There is one new subsystem that gets merged as part of this series:
the reset controller interface, which is a very simple interface
for taking devices on the SoC out of reset or back into reset.
Patches to use this interface on i.MX follow later in this merge
window, and we are going to have other platforms (at least tegra
and sirf) get converted in 3.11. This will let us get rid of
platform specific callbacks in a number of platform independent
device drivers.
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Olof Johansson:
"This is a rather large set of patches for device drivers that for one
reason or another the subsystem maintainer preferred to get merged
through the arm-soc tree. There are both new drivers as well as
existing drivers that are getting converted from platform-specific
code into standalone drivers using the appropriate subsystem specific
interfaces.
In particular, we can now have pinctrl, clk, clksource and irqchip
drivers in one file per driver, without the need to call into platform
specific interface, or to get called from platform specific code, as
long as all information about the hardware is provided through a
device tree.
Most of the drivers we touch this time are for clocksource. Since now
most of them are part of drivers/clocksource, I expect that we won't
have to touch these again from arm-soc and can let the clocksource
maintainers take care of these in the future.
Another larger part of this series is specific to the exynos platform,
which is seeing some significant effort in upstreaming and
modernization of its device drivers this time around, which
unfortunately is also the cause for the churn and a lot of the merge
conflicts.
There is one new subsystem that gets merged as part of this series:
the reset controller interface, which is a very simple interface for
taking devices on the SoC out of reset or back into reset. Patches to
use this interface on i.MX follow later in this merge window, and we
are going to have other platforms (at least tegra and sirf) get
converted in 3.11. This will let us get rid of platform specific
callbacks in a number of platform independent device drivers."
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (256 commits)
irqchip: s3c24xx: add missing __init annotations
ARM: dts: Disable the RTC by default on exynos5
clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3}
ARM: exynos: restore mach/regs-clock.h for exynos5
clocksource: exynos_mct: fix build error on non-DT
pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register()
irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure
reset: NULL deref on allocation failure
reset: Add reset controller API
dt: describe base reset signal binding
ARM: EXYNOS: Add arm-pmu DT binding for exynos421x
ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
ARM: EXYNOS: Enable PMUs for exynos4
irqchip: exynos-combiner: Correct combined IRQs for exynos4
irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq
ARM: EXYNOS: fix compilation error introduced due to common clock migration
clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}
clk: exynos4: export clocks required for fimc-is
clk: samsung: Fix compilation error
clk: tegra: fix enum tegra114_clk to match binding
...
633 lines
15 KiB
C
633 lines
15 KiB
C
/*
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* linux/arch/arm/mach-omap2/board-3430sdp.c
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*
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* Copyright (C) 2007 Texas Instruments
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*
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* Modified from mach-omap2/board-generic.c
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*
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* Initial code: Syed Mohammed Khasim
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/spi/spi.h>
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#include <linux/i2c/twl.h>
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#include <linux/regulator/machine.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/mmc/host.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <linux/platform_data/omap-twl4030.h>
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#include <linux/usb/phy.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include <linux/omap-dma.h>
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#include <video/omapdss.h>
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#include <video/omap-panel-data.h>
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#include "gpmc.h"
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#include "gpmc-smc91x.h"
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#include "soc.h"
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#include "board-flash.h"
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#include "mux.h"
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#include "sdram-qimonda-hyb18m512160af-6.h"
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#include "hsmmc.h"
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#include "pm.h"
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#include "control.h"
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#include "common-board-devices.h"
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#define CONFIG_DISABLE_HFCLK 1
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#define SDP3430_TS_GPIO_IRQ_SDPV1 3
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#define SDP3430_TS_GPIO_IRQ_SDPV2 2
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#define ENABLE_VAUX3_DEDICATED 0x03
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#define ENABLE_VAUX3_DEV_GRP 0x20
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#define TWL4030_MSECURE_GPIO 22
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static uint32_t board_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 2, KEY_A),
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KEY(0, 3, KEY_B),
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KEY(0, 4, KEY_C),
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KEY(1, 0, KEY_DOWN),
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KEY(1, 1, KEY_UP),
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KEY(1, 2, KEY_E),
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KEY(1, 3, KEY_F),
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KEY(1, 4, KEY_G),
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KEY(2, 0, KEY_ENTER),
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KEY(2, 1, KEY_I),
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KEY(2, 2, KEY_J),
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KEY(2, 3, KEY_K),
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KEY(2, 4, KEY_3),
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KEY(3, 0, KEY_M),
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KEY(3, 1, KEY_N),
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KEY(3, 2, KEY_O),
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KEY(3, 3, KEY_P),
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KEY(3, 4, KEY_Q),
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KEY(4, 0, KEY_R),
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KEY(4, 1, KEY_4),
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KEY(4, 2, KEY_T),
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KEY(4, 3, KEY_U),
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KEY(4, 4, KEY_D),
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KEY(5, 0, KEY_V),
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KEY(5, 1, KEY_W),
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KEY(5, 2, KEY_L),
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KEY(5, 3, KEY_S),
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KEY(5, 4, KEY_H),
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0
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data sdp3430_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 5,
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.cols = 6,
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.rep = 1,
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};
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#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
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#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
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static struct gpio sdp3430_dss_gpios[] __initdata = {
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{SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
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{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
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};
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static void __init sdp3430_display_init(void)
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{
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int r;
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r = gpio_request_array(sdp3430_dss_gpios,
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ARRAY_SIZE(sdp3430_dss_gpios));
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if (r)
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printk(KERN_ERR "failed to get LCD control GPIOs\n");
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}
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static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
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{
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gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
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gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
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return 0;
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}
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static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
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{
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gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
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gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
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}
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static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
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{
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return 0;
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}
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static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
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{
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}
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static struct omap_dss_device sdp3430_lcd_device = {
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.name = "lcd",
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.driver_name = "sharp_ls_panel",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.phy.dpi.data_lines = 16,
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.platform_enable = sdp3430_panel_enable_lcd,
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.platform_disable = sdp3430_panel_disable_lcd,
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};
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static struct tfp410_platform_data dvi_panel = {
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.power_down_gpio = -1,
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.i2c_bus_num = -1,
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};
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static struct omap_dss_device sdp3430_dvi_device = {
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.name = "dvi",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "tfp410",
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.data = &dvi_panel,
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.phy.dpi.data_lines = 24,
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};
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static struct omap_dss_device sdp3430_tv_device = {
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.name = "tv",
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.driver_name = "venc",
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.type = OMAP_DISPLAY_TYPE_VENC,
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.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
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.platform_enable = sdp3430_panel_enable_tv,
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.platform_disable = sdp3430_panel_disable_tv,
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};
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static struct omap_dss_device *sdp3430_dss_devices[] = {
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&sdp3430_lcd_device,
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&sdp3430_dvi_device,
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&sdp3430_tv_device,
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};
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static struct omap_dss_board_info sdp3430_dss_data = {
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.num_devices = ARRAY_SIZE(sdp3430_dss_devices),
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.devices = sdp3430_dss_devices,
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.default_device = &sdp3430_lcd_device,
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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/* 8 bits (default) requires S6.3 == ON,
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* so the SIM card isn't used; else 4 bits.
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*/
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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.gpio_wp = 4,
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.deferred = true,
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},
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{
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.mmc = 2,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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.gpio_wp = 7,
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.deferred = true,
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},
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{} /* Terminator */
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};
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static struct omap_tw4030_pdata omap_twl4030_audio_data = {
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.voice_connected = true,
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.custom_routing = true,
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.has_hs = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
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.has_hf = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
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.has_mainmic = true,
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.has_submic = true,
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.has_hsmic = true,
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.has_linein = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
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};
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static int sdp3430_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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/* gpio + 0 is "mmc0_cd" (input/IRQ),
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* gpio + 1 is "mmc1_cd" (input/IRQ)
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*/
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mmc[0].gpio_cd = gpio + 0;
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mmc[1].gpio_cd = gpio + 1;
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omap_hsmmc_late_init(mmc);
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/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
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gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
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/* gpio + 15 is "sub_lcd_nRST" (output) */
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gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
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omap_twl4030_audio_data.jack_detect = gpio + 2;
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omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
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return 0;
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}
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static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
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.pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
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| BIT(16) | BIT(17),
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.setup = sdp3430_twl_gpio_setup,
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};
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/* regulator consumer mappings */
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/* ads7846 on SPI */
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static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
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REGULATOR_SUPPLY("vcc", "spi1.0"),
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};
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static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
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};
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static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
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REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
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};
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static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
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};
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/*
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* Apply all the fixed voltages since most versions of U-Boot
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* don't bother with that initialization.
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*/
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/* VAUX1 for mainboard (irda and sub-lcd) */
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static struct regulator_init_data sdp3430_vaux1 = {
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.constraints = {
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.min_uV = 2800000,
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.max_uV = 2800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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/* VAUX2 for camera module */
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static struct regulator_init_data sdp3430_vaux2 = {
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.constraints = {
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.min_uV = 2800000,
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.max_uV = 2800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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/* VAUX3 for LCD board */
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static struct regulator_init_data sdp3430_vaux3 = {
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.constraints = {
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.min_uV = 2800000,
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.max_uV = 2800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
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.consumer_supplies = sdp3430_vaux3_supplies,
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};
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/* VAUX4 for OMAP VDD_CSI2 (camera) */
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static struct regulator_init_data sdp3430_vaux4 = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
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static struct regulator_init_data sdp3430_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
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.consumer_supplies = sdp3430_vmmc1_supplies,
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};
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/* VMMC2 for MMC2 card */
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static struct regulator_init_data sdp3430_vmmc2 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 1850000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
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.consumer_supplies = sdp3430_vmmc2_supplies,
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};
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/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
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static struct regulator_init_data sdp3430_vsim = {
|
|
.constraints = {
|
|
.min_uV = 1800000,
|
|
.max_uV = 3000000,
|
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
|
| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
|
| REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
|
|
.consumer_supplies = sdp3430_vsim_supplies,
|
|
};
|
|
|
|
static struct twl4030_platform_data sdp3430_twldata = {
|
|
/* platform_data for children goes here */
|
|
.gpio = &sdp3430_gpio_data,
|
|
.keypad = &sdp3430_kp_data,
|
|
|
|
.vaux1 = &sdp3430_vaux1,
|
|
.vaux2 = &sdp3430_vaux2,
|
|
.vaux3 = &sdp3430_vaux3,
|
|
.vaux4 = &sdp3430_vaux4,
|
|
.vmmc1 = &sdp3430_vmmc1,
|
|
.vmmc2 = &sdp3430_vmmc2,
|
|
.vsim = &sdp3430_vsim,
|
|
};
|
|
|
|
static int __init omap3430_i2c_init(void)
|
|
{
|
|
/* i2c1 for PMIC only */
|
|
omap3_pmic_get_config(&sdp3430_twldata,
|
|
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
|
TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
|
|
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
|
sdp3430_twldata.vdac->constraints.apply_uV = true;
|
|
sdp3430_twldata.vpll2->constraints.apply_uV = true;
|
|
sdp3430_twldata.vpll2->constraints.name = "VDVI";
|
|
|
|
sdp3430_twldata.audio->codec->hs_extmute = 1;
|
|
sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
|
|
|
|
omap3_pmic_init("twl4030", &sdp3430_twldata);
|
|
|
|
/* i2c2 on camera connector (for sensor control) and optional isp1301 */
|
|
omap_register_i2c_bus(2, 400, NULL, 0);
|
|
/* i2c3 on display connector (for DVI, tfp410) */
|
|
omap_register_i2c_bus(3, 400, NULL, 0);
|
|
return 0;
|
|
}
|
|
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
|
|
|
static struct omap_smc91x_platform_data board_smc91x_data = {
|
|
.cs = 3,
|
|
.flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
|
|
IORESOURCE_IRQ_LOWLEVEL,
|
|
};
|
|
|
|
static void __init board_smc91x_init(void)
|
|
{
|
|
if (omap_rev() > OMAP3430_REV_ES1_0)
|
|
board_smc91x_data.gpio_irq = 6;
|
|
else
|
|
board_smc91x_data.gpio_irq = 29;
|
|
|
|
gpmc_smc91x_init(&board_smc91x_data);
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void board_smc91x_init(void)
|
|
{
|
|
}
|
|
|
|
#endif
|
|
|
|
static void enable_board_wakeup_source(void)
|
|
{
|
|
/* T2 interrupt line (keypad) */
|
|
omap_mux_init_signal("sys_nirq",
|
|
OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
|
|
}
|
|
|
|
static struct usbhs_phy_data phy_data[] __initdata = {
|
|
{
|
|
.port = 1,
|
|
.reset_gpio = 57,
|
|
.vcc_gpio = -EINVAL,
|
|
},
|
|
{
|
|
.port = 2,
|
|
.reset_gpio = 61,
|
|
.vcc_gpio = -EINVAL,
|
|
},
|
|
};
|
|
|
|
static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
|
|
|
|
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
|
|
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
|
};
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
static struct omap_board_mux board_mux[] __initdata = {
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
#else
|
|
#define board_mux NULL
|
|
#endif
|
|
|
|
/*
|
|
* SDP3430 V2 Board CS organization
|
|
* Different from SDP3430 V1. Now 4 switches used to specify CS
|
|
*
|
|
* See also the Switch S8 settings in the comments.
|
|
*/
|
|
static char chip_sel_3430[][GPMC_CS_NUM] = {
|
|
{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
|
|
{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
|
|
{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
|
|
};
|
|
|
|
static struct mtd_partition sdp_nor_partitions[] = {
|
|
/* bootloader (U-Boot, etc) in first sector */
|
|
{
|
|
.name = "Bootloader-NOR",
|
|
.offset = 0,
|
|
.size = SZ_256K,
|
|
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
|
},
|
|
/* bootloader params in the next sector */
|
|
{
|
|
.name = "Params-NOR",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_256K,
|
|
.mask_flags = 0,
|
|
},
|
|
/* kernel */
|
|
{
|
|
.name = "Kernel-NOR",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_2M,
|
|
.mask_flags = 0
|
|
},
|
|
/* file system */
|
|
{
|
|
.name = "Filesystem-NOR",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = MTDPART_SIZ_FULL,
|
|
.mask_flags = 0
|
|
}
|
|
};
|
|
|
|
static struct mtd_partition sdp_onenand_partitions[] = {
|
|
{
|
|
.name = "X-Loader-OneNAND",
|
|
.offset = 0,
|
|
.size = 4 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE /* force read-only */
|
|
},
|
|
{
|
|
.name = "U-Boot-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 2 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE /* force read-only */
|
|
},
|
|
{
|
|
.name = "U-Boot Environment-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 1 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "Kernel-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 16 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "File System-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = MTDPART_SIZ_FULL,
|
|
},
|
|
};
|
|
|
|
static struct mtd_partition sdp_nand_partitions[] = {
|
|
/* All the partition sizes are listed in terms of NAND block size */
|
|
{
|
|
.name = "X-Loader-NAND",
|
|
.offset = 0,
|
|
.size = 4 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
|
},
|
|
{
|
|
.name = "U-Boot-NAND",
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
|
|
.size = 10 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
|
},
|
|
{
|
|
.name = "Boot Env-NAND",
|
|
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
|
|
.size = 6 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "Kernel-NAND",
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
|
|
.size = 40 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "File System - NAND",
|
|
.size = MTDPART_SIZ_FULL,
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
|
|
},
|
|
};
|
|
|
|
static struct flash_partitions sdp_flash_partitions[] = {
|
|
{
|
|
.parts = sdp_nor_partitions,
|
|
.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
|
|
},
|
|
{
|
|
.parts = sdp_onenand_partitions,
|
|
.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
|
|
},
|
|
{
|
|
.parts = sdp_nand_partitions,
|
|
.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
|
|
},
|
|
};
|
|
|
|
static void __init omap_3430sdp_init(void)
|
|
{
|
|
int gpio_pendown;
|
|
|
|
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
|
omap_hsmmc_init(mmc);
|
|
omap3430_i2c_init();
|
|
omap_display_init(&sdp3430_dss_data);
|
|
if (omap_rev() > OMAP3430_REV_ES1_0)
|
|
gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
|
|
else
|
|
gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
|
|
omap_ads7846_init(1, gpio_pendown, 310, NULL);
|
|
omap_serial_init();
|
|
omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
|
|
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
|
usb_musb_init(NULL);
|
|
board_smc91x_init();
|
|
board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
|
|
sdp3430_display_init();
|
|
enable_board_wakeup_source();
|
|
|
|
usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
|
|
usbhs_init(&usbhs_bdata);
|
|
}
|
|
|
|
MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
|
|
/* Maintainer: Syed Khasim - Texas Instruments Inc */
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap3430_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.handle_irq = omap3_intc_handle_irq,
|
|
.init_machine = omap_3430sdp_init,
|
|
.init_late = omap3430_init_late,
|
|
.init_time = omap3_sync32k_timer_init,
|
|
.restart = omap3xxx_restart,
|
|
MACHINE_END
|