SPEAr is an ARM based family of SoCs. This patch adds in support of cpufreq
driver for SPEAr SoCs. It is supported via DT only and so bindings are present
in binding document.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This series will do the following:
- Switch the Integrator/AP and /CP to use the SoC bus
when booting from device tree.
- Group all devices on the SoC below this bus so as to
set a good example of how to do this. The bus was
invented by Lee Jones, let's show how it's to be used
on a DT:ed SoC.
- Fetch the special system controller offsets from two
special device tree nodes for each case and replace
the static mappings with these at boot.
- Move some static remaps to the ATAG-only code path
and delete some static maps that aren't used.
- Push dependencies on system controller remaps down
to the Integrator/AP board file and the PCIv3 driver
respectively and use only dynamic remappings.
- Fix up conditional BUG() usage in the PCIv3 driver
to be simpler and more to the point.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQp9xhAAoJEEEQszewGV1zBmIQAJbGZ1VaD1+G2cpDTkhvN6wv
08hCpqhPpBLR4Zuy5ld1ZpOPfVaPonO2RT6/isTxlT1qgNhOQEJbaj0cGwnaQ5b/
vqvjkkgiOkVkfKTQMb0IwvCNkGB4o1RWiBmvZ+VrPcWfmAkXoCQ4uQuT/I+msjeJ
dApJNJP8dwuCJTlX+JsUEDGK5Rtk1UrRMn/ZeQ8JNn7WcztkTd7l5I8oqTrmjtcE
08DfvuByL2InwN1Drs5quaW4NaWg6ZSmMGMDJaH2ETXbZALR1/AXdhBkMSkWm3ty
68O52eIqqJYT+pL3W4MOww7fG9602kK6pqDnYs4yIHQ7pWEns2m4jqAryuTRGYxv
hech+i/37b5ghgwuLSsMNNVO+c7gSIT4lHY1bStRGdJMrlRVSPDwn1wJhXs3PeC7
D+TQIngHUfwSN0kjme57MwmKx3epjF5M5A3JjcWGKewbnjj28K7TuGs0voHxh/5L
FVf9YC/k07mQoGlaLAm4aa5RGCH0YjoD/7Hllaopa/yxajVx1YtwklV4kZZ9QFPl
N2F74bDyQjr9j+lK7oa6Z3YjywZX2L19cfYEhoXQ/qvYx/n4Qg5qCVAcq+siCOt5
6TPmo3zP9Wa6f6aLmiFqVQEHd+Xc1KFFGBLzOJ3NQRqZreDdB9cHTF/VKB3xYBzT
MT1tLweT+uqMZElSIsS+
=zpgo
-----END PGP SIGNATURE-----
Merge tag 'integrator-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/cleanup
From Linus Walleij <linus.walleij@linaro.org>:
This series will do the following:
- Switch the Integrator/AP and /CP to use the SoC bus
when booting from device tree.
- Group all devices on the SoC below this bus so as to
set a good example of how to do this. The bus was
invented by Lee Jones, let's show how it's to be used
on a DT:ed SoC.
- Fetch the special system controller offsets from two
special device tree nodes for each case and replace
the static mappings with these at boot.
- Move some static remaps to the ATAG-only code path
and delete some static maps that aren't used.
- Push dependencies on system controller remaps down
to the Integrator/AP board file and the PCIv3 driver
respectively and use only dynamic remappings.
- Fix up conditional BUG() usage in the PCIv3 driver
to be simpler and more to the point.
* tag 'integrator-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: use BUG_ON where possible
ARM: integrator: push down SC dependencies
ARM: integrator: delete static UART1 mapping
ARM: integrator: delete SC mapping on the CP
ARM: integrator: remove static CP syscon mapping
ARM: integrator: remove static AP syscon mapping
ARM: integrator: hook the CP into the SoC bus
ARM: integrator: hook the AP into the SoC bus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SPEAr3xx architecture includes shared/multiplexed irqs for certain set
of devices. The multiplexor provides a single interrupt to parent
interrupt controller (VIC) on behalf of a group of devices.
There can be multiple groups available on SPEAr3xx variants but not
exceeding 4. The number of devices in a group can differ, further they
may share same set of status/mask registers spanning across different
bit masks. Also in some cases the group may not have enable or other
registers. This makes software little complex.
Present implementation was non-DT and had few complex data structures to
decipher banks, number of irqs supported, mask and registers involved.
This patch simplifies the overall design and convert it in to DT. It
also removes all registration from individual SoC files and bring them
in to common shirq.c.
Also updated the corresponding documentation for DT binding of shirq.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
- ehci-orion dt binding
- gpio-poweroff
- use dt regulators
- move mpp to DT/pinctrl
Depends on:
- orion/boards
- merge conflicts
- keep all 'select's in Kconfig
- remove all #includes in board-*.c
- pinctrl/devel up to:
- 06763c7 pinctrl: mvebu: move to its own directory
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJQsEfdAAoJEAi3KVZQDZAeBd8IAIAkBGIJyUJSmQJEWkZ/9ezq
UOLec1t/TnLhAQ1Sk8g4C41wmHKYNqmZSVaAXC+QP6Yw+Gdhlw+V6YBjOYDzA7Y4
k8ljw3SFbvS+AIx0qK26j6Tf6En2H5lMXsdlKoarCV+G+MxAHsQO7jL6y7BFwTlX
QnwJFz+NRzMFxaPiCS+43oZuxIIzkHe8wKMb0y7nSiNQYUUv8TdKvyK+ekFuszOp
v6uo/MI1p1/xdUxDbEKxOwmUjAy7x+t0LUFi1dsWuiDHdrG+BVT4NkJuFaD8Ui13
VoUD1ogyWHQZV2hq0dfj+9Hed5NEgl6toAzGN9LPLmsuVUXCnB2CdBprhuDv5F8=
=yaX1
-----END PGP SIGNATURE-----
Merge tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper:
orion dt for v3.8
- ehci-orion dt binding
- gpio-poweroff
- use dt regulators
- move mpp to DT/pinctrl
Depends on:
- orion/boards
- merge conflicts
- keep all 'select's in Kconfig
- remove all #includes in board-*.c
- pinctrl/devel up to:
- 06763c7 pinctrl: mvebu: move to its own directory
* tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux: (211 commits)
ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
ARM: Kirkwood: Add support LED of OpenBlocks A6
ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
ARM: kirkwood: Add support DT of second I2C bus
ARM: kirkwood: Convert mplcec4 board to pinctrl
ARM: Kirkwood: Convert km_kirkwood to pinctrl
ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
ARM: Kirkwood: Convert IX2-200 to pinctrl.
ARM: Kirkwood: Convert lsxl boards to pinctrl.
ARM: Kirkwood: Convert ib62x0 to pinctrl.
ARM: Kirkwood: Convert GoFlex Net to pinctrl.
ARM: Kirkwood: Convert dreamplug to pinctrl.
ARM: Kirkwood: Convert dockstar to pinctrl.
ARM: Kirkwood: Convert dnskw to pinctrl
ARM: Kirkwood: Convert iConnect to pinctrl.
ARM: Kirkwood: Convert TS219 to pinctrl.
ARM: Kirkwood: Add DTSI files for pinctrl
ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- mach-orion5x/ joins the dark side! (devicetree)
- Lacie Network Space family
- Lacie Ethernet Disk mini v2
- USI TopKick
- ZyXEL NSA310
- MPL CEC4
- Plat'Home OpenBlocks A6 (kirkwood, AX3-4 is armada xp)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJQrc/qAAoJEAi3KVZQDZAeGIcIAJ70hcz/cKdEKNpekMRoMWpz
LoDXtPqRuUvCqBdUNFkJyPAhHHkWwnU6KRcBRz1dknTtJ7nyCkDQYRG/JIroIs8I
X9N6JbPH7FMU+Z1ZUAM2ww+pEAIQkwX06erAy9u/a7ivMj/0LeXboNK+ngIx1jgL
xz2SS4wJrujPwvT2rYo4nJ+WwGiiIPbRjiY7r87rD/DQ9nY9DxKgfve7pRhaCCZS
Baw48u8qTe6M9LGcXw+b/MSHGCTB6YabqaRHMAr/1NK0Z3JDGU8tEpOuMCnFX7SA
6CxEymw5/8fzyTgdRz7FRd9Hg28y5Cd+T2l48X4tSL/M16H4EeBOxj6ub4zCi9s=
=nsDw
-----END PGP SIGNATURE-----
Merge tag 'orion_boards_for_3.8' of git://git.infradead.org/users/jcooper/linux into next/boards
From Jason Cooper:
orion boards for v3.8
- mach-orion5x/ joins the dark side! (devicetree)
- Lacie Network Space family
- Lacie Ethernet Disk mini v2
- USI TopKick
- ZyXEL NSA310
- MPL CEC4
- Plat'Home OpenBlocks A6 (kirkwood, AX3-4 is armada xp)
* tag 'orion_boards_for_3.8' of git://git.infradead.org/users/jcooper/linux:
ARM: kirkwood: Add Plat'Home OpenBlocks A6 support
ARM: Dove: update defconfig
ARM: Kirkwood: update defconfig for new boards
arm: orion5x: add DT related options in defconfig
arm: orion5x: convert 'LaCie Ethernet Disk mini v2' to Device Tree
arm: orion5x: basic Device Tree support
arm: orion5x: mechanical defconfig update
ARM: kirkwood: Add support for the MPL CEC4
arm: kirkwood: add support for ZyXEL NSA310
ARM: Kirkwood: new board USI Topkick
ARM: kirkwood: use gpio-fan DT binding on lsxl
ARM: Kirkwood: add Netspace boards to defconfig
ARM: kirkwood: DT board setup for Network Space Mini v2
ARM: kirkwood: DT board setup for Network Space Lite v2
ARM: kirkwood: DT board setup for Network Space v2 and parents
leds: leds-ns2: add device tree binding
ARM: Kirkwood: Enable the second I2C bus
From Kukjin Kim:
Here is second Samsung DT stuff for v3.8.
This is including power domain DT support for exynos and Google ARM
Chromebook, Snow board and exynos4210-origen updates.
* 'next/dt-samsung-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Use drive strength 3 for SD pins for exynos4
ARM: dts: Set up power domains for exynos4
ARM: EXYNOS: Bind devices to power domains using DT
ARM: EXYNOS: Fix power domain name initialization
ARM: EXYNOS: Detect power domain state on registration from DT
ARM: dts: Add vmmc fixed voltage regulator for exynos4210-origen
ARM: dts: Update sdhci nodes for current bindings for exynos4210-origen
ARM: dts: Update for pinctrl-samsung driver for exynos4210-origen
ARM: dts: Split memory sections for exynos4210-origen
ARM: EXYNOS: add all i2c busses to auxdata for DT
ARM: dts: Add aliases for i2c controller for exynos4
ARM: dts: Add board dts file for Snow board (ARM Chromebook)
ARM: dts: Move the dwmmc aliases from smdk5250 dts to exynos
Add/add conflicts resolved in arch/arm/boot/dts/exynos5250-smdk5250.dts
and arch/arm/mach-exynos/mach-exynos5-dt.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJQrjrAAAoJEPFlmONMx+ezQMMP/AkZQsc1M5qaVXsnomi7JOe3
Wz75JfZvj7LIAK+YnlCaw9KP8qYUOR/Crl3+SkraJtyY3QFlKYH/7NqEvMpa0QPX
L+33AQc463D76yyv5c+Ag0V+5nTgMq070UJkqVFAnXbGfVdngkJ+sVMfwHluuPbk
W/4qABMuWw0UvcCbiukZg/OdTgduUTg1ffCg8ojiXeTY9gkbxELF/cs9pa9B/Wlt
oWESwqtNus9C4AnxWg9xRlKAfnyRMz6Z8ly3yr3KseBTai+/EFwdLPb8zCIw0i+J
fapnEd9WhKBDPP1H+QWlgVXOIJGxIN6rzh0gKS0v3PACxu7EFQz/yvVxJVoW6qgv
ZWUXQAeSnME7We1laxc4F95vxt9rdBQT31dSWldF12pq9fBF/qBxgOzfsGQEX4L/
hIYa2rXHW03wQS9u/BzWDvOnk42ty1Gy9KMtFWV2xI/GVhcH6HZDMJsMBICxTxv5
rcSX/6x2Zm7bjHPAZ6r34iHvMia51MTV2opcqGNjXPN7TOpgZfhB0d4WS0vg/4CB
ayUWoO9v49N3ogis1fpKG7FOi5ukMFoljY5QCOdwLjBSxNbtDdHEbzWl1v8YbcU3
sAfRal40wMhxescidHvlC9ruyUrnT0AL1icFVgz6W/a+483O9KqD3GUhzAkvjvz5
UZwPFoSgxfFRo144L/m1
=IZiZ
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-1' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
From Sascha Hauer:
ARM i.MX SoC updates for v3.8
* tag 'imx-soc-1' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM i.MX6: remove gate_mask from pllv3
ARM i.MX6: Fix ethernet PLL clocks
ARM i.MX6: rename PLLs according to datasheet
ARM i.MX6: Add pwm support
ARM i.MX51: Add pwm support
ARM i.MX53: Add pwm support
ARM: mx5: Replace clk_register_clkdev with clock DT lookup
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.18 (GNU/Linux)
iQEcBAABAgAGBQJQss0FAAoJEHm+PkMAQRiG6cEH/An3PYsWBBy27tzoLyVfJKF1
3m3vR8HS2tnHg6erxms+738jos59vrWXV0Ygnvw0DHbGR0HNb4rkwce/KXu/jgOD
MRYNYhlhMFJTEUFrSrcwKITrAV3kVPWXxPXgAR6Gzpr6NPKKM9TBzEv0ze56TFYz
asOxqeBcPSS7aFZlkoNsy1wG4l0Quo5ke8VZIxo9Me5qlqubAoZ6pING4wAGXqeE
tf81CevSdpe0nqr8/dlYyCvLjrurgpJQczxRCBI3mP6kLWGfUCVzZmcu86PfT9b+
35zNJwDneIoN+D9bVDHy6mrq9uQdmhWnQuhv1joTPn6RDn1nyBRBd+A5qLxSov4=
=CPoy
-----END PGP SIGNATURE-----
Merge tag 'v3.7-rc7' into next/cleanup
Merging in mainline back to next/cleanup since it has collected a few
conflicts between fixes going upstream and some of the cleanup patches.
Git doesn't auto-resolve some of them, and they're mostly noise so let's
take care of it locally.
Conflicts are in:
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
arch/arm/plat-omap/i2c.c
drivers/video/omap2/dss/dss.c
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
drivers/net/wireless/iwlwifi/pcie/tx.c
Minor iwlwifi conflict in TX queue disabling between 'net', which
removed a bogus warning, and 'net-next' which added some status
register poking code.
Signed-off-by: David S. Miller <davem@davemloft.net>
The RaidEngine is a new Freescale hardware that used for parity
computation offloading in RAID5/6.
This patch adds the device node in device tree and related binding
documentation.
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Naveen Burmi <naveenburmi@freescale.com>
Signed-off-by: Xuelin Shi <b29237@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch allows the STMPE driver to be successfully probed and
initialised when Device Tree support is enabled. Besides the usual
platform data changes, we also separate the process of filling in
the 'in use' pin bitmap, as we have to extract the information from
Device Tree in the DT boot case.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The Marvell 98DX412x SoC embed a kirkwood variant that does not have
pinctrl support yet. Even though this kirkwood is very similar to the
88f6281, on the MPP front a lot of pins are not available. That's why a
new kirkwood pinctrl variant is needed.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Given appropriate devicetree bindings, this driver registers a
pm_power_off function to set a GPIO line high/low to power down
your board.
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by:Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Based on previous work by Michael Walle and Jason Cooper.
Made their work actually work, which required added interrupt from DT
and auxdata, along with setting the dma_mask, which DT does not
currently do.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Pulling in a newer version of the depend branch from the gpio tree,
since there was some randconfig breakage introduced at the version we
had, and we want to keep those things as bisectable as possible. It's
not bad enough to warrant a rebase though, so there'll be a window of
exposure to this.
* depends/gpio-devel:
gpio: SPEAr: add spi chipselect control driver
gpio: gpio-max710x: Support device tree probing
gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration
gpio: tegra: read output value when gpio is set in direction_out
gpio: pca953x: Add compatible strings to gpio-pca953x driver
gpio: pca953x: Register an IRQ domain
gpio: mvebu: Set free callback for gpio_chip
gpio: tegra: Drop exporting static functions
gpio: tegra: Staticize non-exported symbols
gpio: tegra: fix suspend/resume apis
gpio-pch: Set parent dev for gpio chip
gpio: em: Fix build errors
Signed-off-by: Olof Johansson <olof@lixom.net>
This device doesn't have a pdata definition for legacy boards, and
unless anyone need to control the reset GPIO, it's not worth adding one.
So this feature is only available to DT users for now.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Previously a generic binding 'i2c-client-wake' was created which
enabled I2C devices to register themselves as wake-up devices.
This binding was later over-thrown by 'wakeup-source'. The STMPE
driver was fixed-up, but the document was neglected. This patch
aims to rectify that.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This patch allows the STMPE Touchscreen driver to be successfully probed and
initialised when Device Tree support is enabled. Bindings are mentioned in
Documentation too.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add support for encoding PWM properties in bit encoded form with
of_pwm_xlate_with_flags() function support. Platforms require platform
specific PWM properties has to populate in 3rd cell of the pwm-specifier
and PWM driver should also set .of_xlate support with this function.
Currently PWM property polarity encoded in bit position 0 of the third
cell in pwm-specifier.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Add support for PWM chips present on SPEAr platforms. These PWM
chips support 4 channel output with programmable duty cycle and
frequency.
More details on these PWM chips can be obtained from relevant
chapter of reference manual, present at following[1] location.
1. http://www.st.com/internet/mcu/product/251211.jsp
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
In current code the ethernet PLL is not handled correctly. The PLL runs at 500MHz
and has different outputs. Only the enet reference clock is implemented. This
patch changes the PLL so that it outputs 500MHz and adds the additional outputs
as dividers. This now matches the datasheet which says:
> This PLL synthesizes a low jitter clock from 24 MHz reference clock.
> The PLL outputs a 500 MHz clock. The reference clocks generated by this PLL are:
> • Ref_PCIe = 125 MHz
> • Ref_SATA = 100 MHz
> • Ref_ethernet, which is configurable based on the PLL_ENET[1:0] register field.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
In recent reference manuals the PLLs were renumbered. PLL8 now is
PLL6 and vice versa. Change the code according to the reference
manual to avoid confusion.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance
task for the clock devices easier.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to use gpio for chip select with no modification in the
driver binding
When use the cs-gpios, the gpio number will be passed via the cs_gpio field
and the number of chip select will automatically increased with max(hw cs, gpio cs).
So if for example the controller has 2 CS lines, and the cs-gpios
property looks like this:
cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
Then it should be configured so that num_chipselect = 4 with the
following mapping:
cs0 : &gpio1 0 0
cs1 : native
cs2 : &gpio1 1 0
cs3 : &gpio1 2 0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: spi-devel-general@lists.sourceforge.net
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[grant.likely: fixed up type of cs count so min() can do type checking]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The purpose of this patch set is to add hardware I/O Coherency support
for Armada 370 and Armada XP. Theses SoCs come with an unit called
coherency fabric. A beginning of the support for this unit have been
introduced with the SMP patch set. This series extend this support:
the coherency fabric unit allows to use the Armada XP and the Armada
370 as nearly coherent architectures.
The third patches enables this new feature and register our own set
of DMA ops, to benefit this hardware enhancement.
The first patches exports a dma operation function needed to register
our own set of dma ops.
The second patch introduces a new flag for the address decoding
configuration in order to be able to set the memory windows as
shared memory.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iEYEABECAAYFAlCs/LcACgkQCwYYjhRyO9WrOgCfeWpA9XdQnwexySw5tPXS7Qdp
aJEAn2ql07SECpTRWezTJptHL0oI1dFF
=b0T7
-----END PGP SIGNATURE-----
Merge tag 'marvell-hwiocc-for-3.8' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything
Add hardware I/O coherency support for Armada 370/XP
The purpose of this patch set is to add hardware I/O Coherency support
for Armada 370 and Armada XP. Theses SoCs come with an unit called
coherency fabric. A beginning of the support for this unit have been
introduced with the SMP patch set. This series extend this support:
the coherency fabric unit allows to use the Armada XP and the Armada
370 as nearly coherent architectures.
The third patches enables this new feature and register our own set
of DMA ops, to benefit this hardware enhancement.
The first patches exports a dma operation function needed to register
our own set of dma ops.
The second patch introduces a new flag for the address decoding
configuration in order to be able to set the memory windows as
shared memory.
The purpose of this series is to add the SMP support for the Armada XP
SoCs. Beside the SMP support itself brought by the last 3 commits,
this series also adds the support for the coherency fabric unit and
the power management service unit.
The coherency fabric is responsible for ensuring hardware coherency
between all CPUs and between CPUs and I/O masters. This unit is also
available for Armada 370 and will be used in an incoming patch set
for hardware I/O cache coherency.
The power management service unit is responsible for powering down and
waking up CPUs and other SOC units.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iEYEABECAAYFAlCs+5oACgkQCwYYjhRyO9UywACfVp3WPDHLxE8ypew3AWoTyxe3
JcMAoIjojnjWCd44cqDJ4uEpvi6KNquE
=BR8m
-----END PGP SIGNATURE-----
Merge tag 'marvell-armadaxp-smp-for-3.8' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything
SMP support for Armada XP
The purpose of this series is to add the SMP support for the Armada XP
SoCs. Beside the SMP support itself brought by the last 3 commits,
this series also adds the support for the coherency fabric unit and
the power management service unit.
The coherency fabric is responsible for ensuring hardware coherency
between all CPUs and between CPUs and I/O masters. This unit is also
available for Armada 370 and will be used in an incoming patch set
for hardware I/O cache coherency.
The power management service unit is responsible for powering down and
waking up CPUs and other SOC units.
From Michal Simek:
This branch depends on arm-soc devel/debug_ll_init branch because
we needed Rob's "ARM: implement debug_ll_io_init()"
(sha1: afaee03511ba8002b26a9c6b1fe7d6baf33eac86)
patch.
This branch also depends on zynq/dt branch because of previous major
zynq changes.
zynq/cleanup branch is subset of zynq/dt.
* 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze:
ARM: zynq: Remove all unused mach headers
ARM: zynq: add support for ARCH_MULTIPLATFORM
ARM: zynq: make use of debug_ll_io_init()
ARM: zynq: remove TTC early mapping
ARM: zynq: add clk binding support to the ttc
ARM: zynq: use zynq clk bindings
clk: Add support for fundamental zynq clks
ARM: zynq: dts: split up device tree
ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
ARM: zynq: dts: add description of the second uart
ARM: zynq: move arm-specific sys_timer out of ttc
zynq: move static peripheral mappings
zynq: remove use of CLKDEV_LOOKUP
zynq: use pl310 device tree bindings
zynq: use GIC device tree bindings
Add/add conflict in arch/arm/Kconfig.debug.
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.
As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.
* 'next/dt-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (32 commits)
ARM: EXYNOS: DT Support for SATA and SATA PHY
ARM: dts: Remove broken-voltage property from sdhci node for exynos4210-trats
ARM: dts: Add node for touchscreen for exynos4210-trats
ARM: dts: Add node for touchscreen voltage regulator for exynos4210-trats
ARM: dts: Add node for i2c3 bus for exynos4210-trats
ARM: dts: Add nodes for GPIO keys available on Trats
ARM: dts: Update for pinctrl-samsung driver for exynos4210-trats
ARM: dts: Add nodes for pin controllers for exynos4x12
pinctrl: samsung: Add support for EXYNOS4X12
gpio: samsung: Skip registration if pinctrl driver is present on EXYNOS4X12
ARM: EXYNOS: Skip wakeup-int setup if pinctrl driver is used on EXYNOS4X12
ARM: dts: add board dts file for EXYNOS4412 based SMDK board
ARM: dts: Add support for EXYNOS4X12 SoCs
ARM: EXYNOS: Add devicetree node for TMU driver for exynos5
ARM: EXYNOS: Add devicetree node for TMU driver for exynos4
ARM: EXYNOS: Add MFC device tree support
ARM: dts: Enable serial controllers on Origen and SMDKV310
Documentation: Update samsung-pinctrl device tree bindings documentation
pinctrl: samsung: Add GPIO to IRQ translation
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
...
Add/add conflicts in:
arch/arm/boot/dts/exynos5250-smdk5250.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/mach-exynos/mach-exynos5-dt.c
Signed-off-by: Olof Johansson <olof@lixom.net>
From Maxime Ripard:
Here is a pull request to add the support for Allwinner A10 SoCs.
* sunxi/soc2:
ARM: sunxi: Add sunxi restart function via onchip watchdog
ARM: sunxi: Add sun4i and cubieboard support
ARM: sunxi: Add earlyprintk support for UART0 (sun4i)
ARM: sunxi: Restructure sunxi dts/dtsi files
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
This includes supporting legacy i2c controller and ARM down clock
support for exynos5 and small changes.
[olof: It contains a dependency on samsung/hdmi for HDMI DT bindings, for some reason.]
* 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Clock settings for SATA and SATA PHY
ARM: EXYNOS: Add ARM down clock support
ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
ARM: EXYNOS: Add aliases for i2c controller
ARM: EXYNOS: Setup legacy i2c controller interrupts
ARM: EXYNOS: removing exynos-drm device registration from non-dt platforms
ARM: EXYNOS: add clocks for exynos5 hdmi
ARM: dts: add device tree support for exynos5 hdmiddc
ARM: dts: add device tree support for exynos5 hdmiphy
ARM: dts: add device tree support for exynos5 mixer
ARM: dts: add device tree support for exynos5 hdmi
ARM: EXYNOS: Add dp clock support for EXYNOS5
ARM: SAMSUNG: call clk_get_rate for debugfs rate files
ARM: SAMSUNG: add clock_tree debugfs file in clock
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.
As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.
* samsung/pinctrl:
pinctrl: samsung: Update error check for unsigned variables
pinctrl: samsung: Add support for EXYNOS4X12
Documentation: Update samsung-pinctrl device tree bindings documentation
pinctrl: samsung: Add GPIO to IRQ translation
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
pinctrl: samsung: Use one GPIO chip per pin bank
pinctrl: exynos: Use one IRQ domain per pin bank
pinctrl: samsung: Include bank-specific eint offset in bank struct
pinctrl: samsung: Hold pointer to driver data in bank struct
pinctrl: samsung: Match pin banks with their device nodes
ARM: dts: exynos4210-pinctrl: Add nodes for pin banks
pinctrl: samsung: Distinguish between pin group and bank nodes
pinctrl: samsung: Remove static pin enumerations
pinctrl: samsung: Assing pin numbers dynamically
pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank
pinctrl: samsung: Detect and handle unsupported configuration types
From Kukjin Kim:
This is for adding support for DT based exynos5250 hdmi and it adds
device node for hdmi, mixer, hdmiphy and hdmiddc.
* 'next/hdmi-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: removing exynos-drm device registration from non-dt platforms
ARM: EXYNOS: add clocks for exynos5 hdmi
ARM: dts: add device tree support for exynos5 hdmiddc
ARM: dts: add device tree support for exynos5 hdmiphy
ARM: dts: add device tree support for exynos5 mixer
ARM: dts: add device tree support for exynos5 hdmi
Armada 370 and XP come with an unit called coherency fabric. This unit
allows to use the Armada 370/XP as a nearly coherent architecture. The
coherency mechanism uses snoop filters to ensure the coherency between
caches, DRAM and devices. This mechanism needs a synchronization
barrier which guarantees that all the memory writes initiated by the
devices have reached their target and do not reside in intermediate
write buffers. That's why the architecture is not totally coherent and
we need to provide our own functions for some DMA operations.
Beside the use of the coherency fabric, the device units will have to
set the attribute flag of the decoding address window to select the
accurate coherency process for the memory transaction. This is done
each device driver programs the DRAM address windows. The value of the
attribute set by the driver is retrieved through the
orion_addr_map_cfg struct filled during the early initialization of
the platform.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
The documentation doesn't match the actual function prototype. This is a
trivial patch to fix it.
Signed-off-by: Alison Chaiken <alison_chaiken@mentor.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
There are several drivers that use LEDs and depend on exactly the same
device tree binding. However, the binding documentation has simply been
cut-and-paste into each of the binding documents. Rather than continue
to duplicate it, this patch adds a common led binding document that all
can reference.
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch enhances the IRQ controller driver to add support for
Inter-Processor-Interrupts that are needed to enable SMP support.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 370 and Armada XP SOCs have a power management service unit
which is responsible for powering down and waking up CPUs and other
SOC units. This patch adds support for this unit.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 370 and Armada XP SOCs have a coherency fabric unit which
is responsible for ensuring hardware coherency between all CPUs and
between CPUs and I/O masters. This patch provides the basic support
needed for SMP.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
This patch adds a way to specify bindings between devices and power
domains using device tree.
A device can be bound to particular power domain by adding a
power-domain property containing a phandle to the domain. The device
will be bound to the domain before binding a driver to it and unbound
after unbinding a driver from it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Initial state of power domains might vary on different boards and with
different bootloaders.
This patch adds detection of initial state of power domains when being
registered from DT.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Set tps65217 PMIC status to OFF if power enable toggle is supported.
By setting this bit to 1 to enter PMIC to OFF state when PWR_EN pin
is pulled low. Also adds a DT flag to specify that device pmic
supports shutdown control or not.
Signed-off-by: Colin Foe-Parker <colin.foeparker@logicpd.com>
[anilkumar@ti.com: move the additions to tps65217 MFD driver]
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
From Pawel Moll:
* 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux:
ARM: vexpress: Remove motherboard dependencies in the DTS files
ARM: vexpress: Start using new Versatile Express infrastructure
ARM: vexpress: Add config bus components and clocks to DTs
mfd: Versatile Express system registers driver
mfd: Versatile Express config infrastructure
From Stephen Warren:
ARM: bcm2835: core SoC enhancements
A machine restart/reboot implementation is added. The GPIO/pinmux
controller is instantiated, and dummy gpio.h added.
* tag 'bcm2835-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: enable GPIO/pinctrl
ARM: bcm2835: implement machine restart hook
Signed-off-by: Olof Johansson <olof@lixom.net>
A wide variety of device tree additions are made across many Tegra
boards:
* WiFi is supported on Seaboard, Ventana, and Cardhu.
* An I2C mux is added for Ventana, and Tamonten.
* SPI flash is added to Cardhu, and TrimSlice.
* Temperature sensors are added to Harmony, Tamonten, and Ventana.
* host1x (graphics/display controller) is added to the SoC include files.
* HDMI displays are enabled on Harmony, TrimSlice, Tamonten, Plutux, Tec,
and Whistler.
This pull request is based on tegra-for-3.8-soc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJQppFoAAoJEMzrak5tbycx1WsQALzqZBCebkEIo0CfuYlVtZrX
co2HBLsTis8KOI1lB5hZZdLvOD2sevwkw+YDtoG1k2ymZvR/Lpl3zdYdPCinA7gb
Qzs+OlwnAla7J5BkgV0v69lZHBYd8jvxsFt9MZo1XkHjw2IRPyrzLhdmBHGLVj3J
Tk7kk4OH64sDhDb+vZJXCtBJV0fvn10WNSskUHoQYZveGOCFGZXogrAht25tcoQO
TM89tasMdRq3IhOxuzHHo/7AegyuTZdDzV4blNr1xOMzyz1b3P3sBh2ZiK+aBztX
CCfpJ2ZUlRqTKSOU4qlM48dWffr/ZyP1u0VVi9Bu4Df/qBpS37NjagiVxMhiEasz
0f3SZTAkZGh7yxi/BTmqu6vvQ0FWYgtOJPezK19RMXistdQkA/uiQDKqeBMTLTeA
UXCnJdC05uBWhymy8DhJyryPQCJ1k3PJ+4pSmzemWIaAoQqpaH/q5yp4IAccr8wO
pxZPtddD030iVdT5oYqBoAhn2W/mKtG1fShhp7wpj/qRYecUQICocTavuFG3DK0N
k1OJ9rTxBZfnyeCBF/wdS/nNuI9xDk2WULVIya2cNu8I/te6QKp1fd4Jr3aPnZ/9
4hiw5+L2dw2z7447EwlryC4sHttjVYEDHqsedR39YNPIn55D3mfsNX2iCczk1ZDU
+OoRMiATrjILb1sOjJAs
=ytxh
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren:
ARM: tegra: device tree changes
A wide variety of device tree additions are made across many Tegra
boards:
* WiFi is supported on Seaboard, Ventana, and Cardhu.
* An I2C mux is added for Ventana, and Tamonten.
* SPI flash is added to Cardhu, and TrimSlice.
* Temperature sensors are added to Harmony, Tamonten, and Ventana.
* host1x (graphics/display controller) is added to the SoC include files.
* HDMI displays are enabled on Harmony, TrimSlice, Tamonten, Plutux, Tec,
and Whistler.
This pull request is based on tegra-for-3.8-soc.
* tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (47 commits)
ARM: tegra: whistler: enable HDMI port
ARM: tegra: tec: Enable HDMI output
ARM: tegra: plutux: Enable HDMI output
ARM: tegra: tamonten: Add host1x support
ARM: tegra: trimslice: enable HDMI port
ARM: tegra: harmony: enable HDMI port
ARM: tegra: Add Tegra30 host1x support
ARM: tegra: Add Tegra20 host1x support
ARM: tegra: trimslice: enable SPI flash
ARM: tegra: dts: add sflash controller dt entry
ARM: tegra: ventana: Add NCT1008 temperature sensor
ARM: tegra: tamonten: Add NCT1008 temperature sensor
ARM: tegra: harmony: Add ADT7641 temperature sensor
ARM: tegra: tec: Remove redundant DT properties
ARM: tegra: tamonten: Add DDC/PTA pinmux
ARM: tegra: dts: cardhu: enable SLINK4
ARM: tegra: dts: add slink controller dt entry
ARM: dt: tegra: ventana: define pinmux for ddc
ARM: dt: t30 cardhu: set pinmux and power for wlan
ARM: dt: t20 ventana: set pinmux and power for wlan
...
