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287191 commits

Author SHA1 Message Date
Namhyung Kim
fd45c15f13 perf: Don't call release_callchain_buffers() if allocation fails
When alloc_callchain_buffers() fails, it frees all of
entries before return. In addition, calling the
release_callchain_buffers() will cause a NULL pointer
dereference since callchain_cpu_entries is not set.

Signed-off-by: Namhyung Kim <namhyung.kim@lge.com>
Acked-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Namhyung Kim <namhyung@gmail.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Link: http://lkml.kernel.org/r/1327021966-27688-1-git-send-email-namhyung.kim@lge.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-21 09:33:41 +01:00
Lan Tianyu
93f770846e ACPI / PM: Add Sony Vaio VPCCW29FX to nonvs blacklist.
Sony Vaio VPCCW29FX does not resume correctly without
acpi_sleep=nonvs, so add it to the ACPI sleep blacklist.

https://bugzilla.kernel.org/show_bug.cgi?id=34722

Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2012-01-21 01:29:50 -05:00
Myron Stowe
1001a3a307 ACPI: Remove ./drivers/acpi/atomicio.[ch]
With the conversion of atomicio's routines in place (see commits
6f68c91c55 and 700130b41f), atomicio.[ch] can be removed, replacing
the APEI specific pre-mapping capabilities with the more generalized
versions that drivers/acpi/osl.c provides.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2012-01-21 01:09:00 -05:00
Myron Stowe
ba242d5b1a ACPI, APEI: Add RAM mapping support to ACPI
This patch adds support for RAM to ACPI's mapping capabilities in order
to support APEI error injection (EINJ) actions.

This patch re-factors similar functionality introduced in commit
76da3fb357, bringing it into osl.c in preparation for removing
./drivers/acpi/atomicio.[ch].

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2012-01-21 01:08:38 -05:00
Myron Stowe
e615bf5b55 ACPI, APEI: Add 64-bit read/write support for APEI on i386
Base ACPI (CA) currently does not support atomic 64-bit reads and writes
(acpi_read() and acpi_write() split 64-bit loads/stores into two
32-bit transfers) yet APEI expects 64-bit transfer capability, even
when running on 32-bit systems.

This patch implements 64-bit read and write routines for APEI usage.

This patch re-factors similar functionality introduced in commit
04c25997c9, bringing it into the ACPI subsystem in preparation for
removing ./drivers/acpi/atomicio.[ch].  In the implementation I have
replicated acpi_os_read_memory() and acpi_os_write_memory(), creating
64-bit versions for APEI to utilize, as opposed to something more
elegant.  My thinking is that we should attempt to see if we can get
ACPI's CA/OSL changed so that the existing acpi_read() and acpi_write()
interfaces are natively 64-bit capable and then subsequently remove the
replication.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2012-01-21 01:08:17 -05:00
Nicolas Pitre
a570067df9 ARM: big removal of now unused arch_idle()
When this is the only content remaining in mach/system.h then the
whole file is removed.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: David Brown <davidb@codeaurora.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-20 19:25:58 -05:00
Nicolas Pitre
ae94091303 ARM: substitute arch_idle()
Now that all implementations of arch_idle() are equivalent to cpu_do_idle()
we can just use the later directly and stop including mach/system.h.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-01-20 18:55:19 -05:00
Nicolas Pitre
daa14d5e60 ARM: mach-tegra: properly disable CPU idle call
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-01-20 18:55:19 -05:00
Nicolas Pitre
8bab421b0a ARM: mach-s3c64xx: use standard arch_idle() implementation
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20 18:55:18 -05:00
Nicolas Pitre
a5ad6fbadd ARM: mach-w90x900: properly disable CPU idle call
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:17 -05:00
Nicolas Pitre
e5ddf4e352 ARM: mach-shark: properly disable CPU idle call
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:17 -05:00
Nicolas Pitre
12d2b4e5f0 ARM: mach-ixp4xx: properly disable CPU idle call
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:16 -05:00
Nicolas Pitre
86ce0d2e6f ARM: mach-ixp23xx: properly disable CPU idle call
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:15 -05:00
Nicolas Pitre
25eb433ab1 ARM: mach-msm: hook special idle handlers to arm_pm_idle
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: David Brown <davidb@codeaurora.org>
2012-01-20 18:55:15 -05:00
Nicolas Pitre
4a3ea24405 ARM: plat-mxc: hook special idle handlers to arm_pm_idle
... and remove redundant include of <mach/system.h>.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:14 -05:00
Nicolas Pitre
92311272c1 ARM: s3c24xx: move special idle code to out of line
... and hook it to arm_pm_idle.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:13 -05:00
Nicolas Pitre
50edbf78f5 ARM: mach-h720x: move special idle code out of line
... and hook it to arm_pm_idle.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:12 -05:00
Nicolas Pitre
8925b0f88e ARM: mach-gemini: move special idle code out of line
... and hook it to arm_pm_idle.

Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:12 -05:00
Nicolas Pitre
1b7f72fc39 ARM: mach-ebsa110: move special idle code out of line
... and hook it to arm_pm_idle.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:11 -05:00
Nicolas Pitre
71e256c54d ARM: mach-clps711x: move special idle code out of line
... and hook it to arm_pm_idle.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:10 -05:00
Nicolas Pitre
c9dfafbaca ARM: mach-at91: move special idle code out of line
... and hook it to arm_pm_idle.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20 18:55:10 -05:00
Nicolas Pitre
8dd6718883 ARM: mach-exynos: use standard arch_idle()
This is equivalent and more similar to existing architectures.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20 18:55:08 -05:00
Nicolas Pitre
1ab4ef9112 ARM: mach-s5p64x0: move idle handler from pm_idle to arm_pm_idle
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20 18:55:08 -05:00
Nicolas Pitre
20a7b2c151 ARM: mach-s5pc100: use standard arch_idle()
This is equivalent and more similar to existing architectures.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20 18:55:07 -05:00
Nicolas Pitre
460863ac23 ARM: mach-s5pv210: use standard arch_idle()
This is equivalent and more similar to existing architectures.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20 18:55:07 -05:00
Nicolas Pitre
0bcd24b0f4 ARM: OMAP: convert idle handlers from pm_idle to arm_pm_idle
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
2012-01-20 18:55:06 -05:00
Nicolas Pitre
4fa20439a8 ARM: clean up idle handlers
Let's factor out the need_resched() check instead of having it duplicated
in every pm_idle implementations to avoid inconsistencies (omap2_pm_idle
is missing it already).

The forceful re-enablement of IRQs after pm_idle has returned can go.
The warning certainly doesn't trigger for existing users.

To get rid of the pm_idle calling convention oddity, let's introduce
arm_pm_idle() allowing for the local_irq_enable() to be factored out
from SOC specific implementations. The default pm_idle function becomes
a wrapper for arm_pm_idle and it takes care of enabling IRQs closer to
where they are initially disabled.

And finally move the comment explaining the reason for that turning off
of IRQs to a more proper location.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com>
2012-01-20 18:55:05 -05:00
Nicolas Pitre
3c0b2cef91 ARM: OMAP1: Fix pm_idle during suspend
Commit 9ccdac3662 ([ARM] idle:
clean up pm_idle calling, obey hlt_counter) removed a check
for NULL pm_idle.

Replace the NULL assignment in the OMAP1 code with disable_hlt()
to be in sync with the core code and restore the intended behavior.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
2012-01-20 18:55:05 -05:00
Neal Cardwell
5a45f0086a tcp: fix undo after RTO for CUBIC
This patch fixes CUBIC so that cwnd reductions made during RTOs can be
undone (just as they already can be undone when using the default/Reno
behavior).

When undoing cwnd reductions, BIC-derived congestion control modules
were restoring the cwnd from last_max_cwnd. There were two problems
with using last_max_cwnd to restore a cwnd during undo:

(a) last_max_cwnd was set to 0 on state transitions into TCP_CA_Loss
(by calling the module's reset() functions), so cwnd reductions from
RTOs could not be undone.

(b) when fast_covergence is enabled (which it is by default)
last_max_cwnd does not actually hold the value of snd_cwnd before the
loss; instead, it holds a scaled-down version of snd_cwnd.

This patch makes the following changes:

(1) upon undo, revert snd_cwnd to ca->loss_cwnd, which is already, as
the existing comment notes, the "congestion window at last loss"

(2) stop forgetting ca->loss_cwnd on TCP_CA_Loss events

(3) use ca->last_max_cwnd to check if we're in slow start

Signed-off-by: Neal Cardwell <ncardwell@google.com>
Acked-by: Stephen Hemminger <shemminger@vyatta.com>
Acked-by: Sangtae Ha <sangtae.ha@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-20 14:17:26 -05:00
Neal Cardwell
fc16dcd8c2 tcp: fix undo after RTO for BIC
This patch fixes BIC so that cwnd reductions made during RTOs can be
undone (just as they already can be undone when using the default/Reno
behavior).

When undoing cwnd reductions, BIC-derived congestion control modules
were restoring the cwnd from last_max_cwnd. There were two problems
with using last_max_cwnd to restore a cwnd during undo:

(a) last_max_cwnd was set to 0 on state transitions into TCP_CA_Loss
(by calling the module's reset() functions), so cwnd reductions from
RTOs could not be undone.

(b) when fast_covergence is enabled (which it is by default)
last_max_cwnd does not actually hold the value of snd_cwnd before the
loss; instead, it holds a scaled-down version of snd_cwnd.

This patch makes the following changes:

(1) upon undo, revert snd_cwnd to ca->loss_cwnd, which is already, as
the existing comment notes, the "congestion window at last loss"

(2) stop forgetting ca->loss_cwnd on TCP_CA_Loss events

(3) use ca->last_max_cwnd to check if we're in slow start

Signed-off-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-20 14:17:26 -05:00
Roopa Prabhu
b67f231ded enic: fix compile when CONFIG_PCI_IOV is not enabled
reverting back change that access enic->num_vfs outside
CONFIG_PCI_IOV

Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Roopa Prabhu <roprabhu@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-20 13:39:20 -05:00
Fabio Estevam
6b35f924b8 ASoC: mxs: Fix mxs-saif timeout
On a mx28evk board the following errors happens on mxs-sgtl5000 probe:

[    0.660000] saif0_clk_set_rate: divider writing timeout
[    0.670000] mxs-sgtl5000: probe of mxs-sgtl5000.0 failed with error -110
[    0.670000] ALSA device list:
[    0.680000]   No soundcards found.

This timeout happens because clk_set_rate will result in writing to the DIV bits
of register HW_CLKCTRL_SAIF0 with the saif clock gated (CLKGATE bit set to one).

MX28 Reference states the following about CLKGATE:

"The DIV field can change ONLY when this clock gate bit field is low."

So call clk_prepare_enable prior to clk_set_rate to fix this problem.

After this change the mxs-saif driver can be correctly probed and audio is functional.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20 18:38:44 +00:00
Keith Packard
8f0fc977f5 Revert "drm/i915: Work around gen7 BLT ring synchronization issues."
This reverts commit 42ff6572e5.

New forcewake voodoo makes this no longer necessary.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-20 10:20:44 -08:00
Russell King
9825022169 MFD: mcp-core: fix complaints from the genirq layer
The genirq layer complains if an interrupt handler returns with
interrupts enabled.  The UCB1x00 handler does just this, because
ucb1x00_enable() calls mcp_enable(), which uses spin_lock_irq()
rather than spin_lock_irqsave().  Convert this, and the divisor
setting functions to use spin_lock_irqsave().

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-20 17:57:35 +00:00
Russell King
65f2e753f1 Revert "ARM: sa11x0: Implement autoloading of codec and codec pdata for mcp bus."
This reverts commit 5dd7bf59e0.

Conflicts:

	scripts/mod/file2alias.c

This change is wrong on many levels.  First and foremost, it causes a
regression.  On boot on Assabet, which this patch gives a codec id of
'ucb1x00', it gives:

	ucb1x00 ID not found: 1005

0x1005 is a valid ID for the UCB1300 device.

Secondly, this patch is way over the top in terms of complexity.  The
only device which has been seen to be connected with this MCP code is
the UCB1x00 (UCB1200, UCB1300 etc) devices, and they all use the same
driver.  Adding a match table, requiring the codec string to match the
hardware ID read out of the ID register, etc is completely over the top
when we can just read the hardware ID register.
2012-01-20 17:38:58 +00:00
Russell King
216f63c41c Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources."
This reverts commit af9081ae64.

This revert is necessary to revert 5dd7bf59e0.
2012-01-20 17:37:21 +00:00
Jean Delvare
86b2bbfdbd hwmon: (f71805f) Fix clamping of temperature limits
Properly clamp temperature limits set by the user. Without this fix,
attempts to write temperature limits above the maximum supported by
the chip (255 degrees Celsius) would arbitrarily and unexpectedly
result in the limit being set to 0 degree Celsius.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: stable@vger.kernel.org
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2012-01-20 09:05:35 -08:00
Stephen Warren
546edd83ab pinctrl: fix pinconf_pins_show iteration
Commit 706e852 "pinctrl: correct a offset while enumerating pins"
modified the variable used by pinconf_pin_show()'s for loop, but didn't
update the for loop test expression.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-20 17:55:49 +01:00
Sumit Semwal
53b6b3e00b MAINTAINERS: Add dma-buf sharing framework maintainer
Adding maintainer info for dma-buf buffer sharing framework;
some mailing lists interested in this work are also added.

Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Dave Airlie <airlied@redhat.com>
2012-01-20 22:25:33 +05:30
Jean-Christophe PLAGNIOL-VILLARD
14f991a730 ARM: at91: Fix at91sam9g45 and at91cap9 reset
As on the other sam9 we need to cleanly shutdown the DDRAM before rebooting.

On those SoC the SDRAM/DDRAM controller is different. So, the assembly code
ends up being not cleanly combined with previous at91sam9_alt_restart function.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:22:50 +01:00
Jean-Christophe PLAGNIOL-VILLARD
e9f68b5cc6 ARM: at91: make rstc soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:22:38 +01:00
Jean-Christophe PLAGNIOL-VILLARD
c017759418 ARM: at91: introduce AT91_SAM9_ALT_RESET to select the at91sam9 alternative reset
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:20:29 +01:00
Jean-Christophe PLAGNIOL-VILLARD
17d2cc25f0 ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:20:23 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6522ecdcfa ARM: at91: fix cap9 ddrsdr register
fix AT91_DDRSDRC_MODE it's 3bit

add missing AT91_DDRSDRC_NR_14, AT91_DDRSDRC_DBW (16 and 32 bits support)

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:19:35 +01:00
Jean-Christophe PLAGNIOL-VILLARD
8134ff5564 ARM/USB: at91/ohci-at91: rename vbus_pin_inverted to vbus_pin_active_low
Allows to configure independently the vbus_pin associated with each port.
Matches usual naming scheme.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Cc: linux-usb@vger.kernel.org
2012-01-20 15:51:14 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6813463ceb USB: at91: fix clk_get error handling
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Cc: linux-usb@vger.kernel.org
2012-01-20 15:51:03 +01:00
Nicolas Ferre
08a52e1bef ARM: at91: removal of CAP9 SoC family
Atmel CAP9 family is not maintained well and products may be
difficult to find now. It will allow to save workforce and
remove LOC during current cleanup process.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-01-20 15:08:38 +01:00
Nicolas Ferre
3e90772f76 ARM: at91: fix at91rm9200 soc subtype handling
Currently setting it to PQFP changes subtype to BGA as subtypes are
swapped in at91rm9200_set_type().

Wrong subtype causes GPIO bank D not to work at all.

After this fix, subtype is still set as unknown. But board code should
fill it in with proper value. Another information is thus printed.

Bug discovery and first implementation made by Veli-Pekka Peltola.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: stable <stable@vger.kernel.org>
2012-01-20 14:58:13 +01:00
Mark Brown
fed2200711 ASoC: Disable register synchronisation for low frequency WM8996 SYSCLK
With a low frequency SYSCLK and a fast I2C clock register synchronisation
may occasionally take too long to take effect, causing I/O issues. Disable
synchronisation in order to avoid any issues.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
2012-01-20 13:54:34 +00:00
Mark Brown
495174a8ff ASoC: Don't go through cache when applying WM5100 rev A updates
These are all to either uncached registers or fixes to register defaults,
in the former case the cache won't do anything and in the latter case
we're fixing things so the cache sync will do the right thing.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
2012-01-20 13:54:33 +00:00