Add power management support to the VIC by registering
each VIC as a system device to get suspend/resume
events going.
Since the VIC registeration is done early, we need to
record the VICs in a static array which is used to add
the system devices later once the initcalls are run. This
means there is now a configuration value for the number
of VICs in the system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the GPIO suspend/resume support inline with the gpiolib support
so that it will work with both the S3C24XX and S3C64XX series.
The s3c_gpio_chip is extended to have a pm callback and a save block
to keep the state of the GPIO over suspend, and the code from the
s3c24xx implementation is added to a new common file.
The suspend process now uses the list of registered chips to go through
saving and restoring each one as appropriate, using the pm callback to
select the appropriate routine depending on the type of control register
present.
This change also means that any additional GPIO added should not require
changes to the PM.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add support for saving the state of the IRQ registers over suspend.
This requires moving the S3C64XX UART registers into <plat/regs-serial.h>
and adding irq-pm.c which saves the state of all the IRQ registers.
The irq-pm.c saves all the IRQ registers, including the IRQ_EINT and
IRQ_EINT_GROUP registers as it was easier than adding three different
files. Also ensuring that all the registers are restored to the same
state as before suspend is considered to be the best thing to do.
Note, we do not suspend the VIC here, this is done by the VIC driver
itself.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add an s3c64xx_sysclass and device for items that currently
want to bind to any s3c64xx processor. The first user of this
will be parts of the s3c64xx suspend support which need to
save device state over suspend/resume.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial support for the S3C64XX based systems to use
suspend-to-RAM to sleep.
Includes basic debugging for use with the SMDK6410 usign the
LEDs on the baseboard.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a simple debug message on saving the UART state and add a per-arch
pre-restore function to be used by the s3c64xx restore code to ensure
the UARTs control registers do not go through any illegal state changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The USB host base address is available on both the S3C24XX and S3C64XX
ranges.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add USB OHCI host capability to the SMDK6410 for either USB OtG or
a single/double USB host port.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add common definition for USB OHCI platform device, add a Kconfig
to selectively compile it and add update all the users.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The structure 'arch_mmu' accommodates the difference between omap1 and
omap2/3.
This patch provides omap2/3 specific functions
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
The i.MX31 ARM11 core is not a v6K core. Disable this option as it
is incompatible with non v6K cores.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before this patch I got the following line in my dmesg:
[ 0.000000] BUG: mapping for 0xd4000000 at 0xeb000000 overlaps vmalloc space
VMALLOC_END is 0xf4000000 and there are the following other mappings
defined for mx27ads:
(0xa0500000,+0x00001000) maps to 0xffff0000
(0x10000000,+0x00100000) maps to 0xf4000000
(0x80000000,+0x00100000) maps to 0xf4100000
(0xd8000000,+0x00100000) maps to 0xf4200000
So map PBC to 0xf4300000.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX31 I sometimes get spurious interrupts. There is no need
to crash the whole system when this happens. Instead, silently
ignore it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to have a mx31_defconfig file that builds a kernel that is able
to boot on all support mx31 systems and thus also can be better tested
by automatic build scripts. For these reasons, this config file is not
needed anymore.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX platforms support <linux/clk.h> calls and should select HAVE_CLK.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MX2 platforms imx_dma_request() calls request_irq() which may sleep
with interrupts disabled.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The sequence
imx_dma_request()
imx_dma_enable()
imx_dma_free()
left the dma channel in_use mode and did not release the timer.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)
[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data
[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is created
[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch
[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail
davinci: DM644x: NAND: update partitioning
davinci: update DM644x support in preparation for more SoCs
davinci: DM644x: rename board file
davinci: update pin-multiplexing support
davinci: serial: generalize for more SoCs
davinci: DM355 IRQ Definitions
davinci: DM646x: add interrupt number and priorities
davinci: PSC: Clear bits in MDCTL reg before setting new bits
davinci: gpio bugfixes
davinci: add EDMA driver
davinci: timers: use clk_get_rate()
[ARM] pxa/littleton: add missing da9034 touchscreen support
[ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expanders
[ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not working
[ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNC
[ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbol
...
This allows the S3C CPUfreq driver to do DVFS.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The alterations to the suspend code missed adding a
call to the cache flushing routines during the suspend
path of the S3C2412.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Change the name of S3C2410_DMA_CHANNELS to S3C_DMA_CHANNELS in the process.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The dma.h header does not need to include <mach/hardware.h> as there
is nothing it depends on. Remove the include and fixup the couple of
places where <mach/map.h> was not explicitly included (dragged in
via <mach/hardware.h>)
Note, we have to fix arch/arm/plat-s3c24xx/pm.c which seems to rely
on having <mach/hardware.h> included by this method.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the common information from the <mach/dma.h> header into a new
shareable <plat/dma.h> header for re-use on the s3c64xx.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The <plat/dma-regs.h> pre-date the invention of the TAB character,
so fix the indentation of the register defines.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The <mach/dma.h> is for the driver API for the DMA system and should
not have anything relying on the CPU specific registers.
Remove the registers to <plat/dma-regs.h> for the code that really
needs to know about them.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
calls
The S3C24XX DMA API channel configuration registers are being passed
values comprised of register values which makes it hard to move the
API to cover both the S3C24XX and S3C64XX.
These values can be calculated from knowing which device the channel
is connected to, so remove them from the two calls s3c2410_dma_config
and s3c2410_dma_devconfig.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the platform dma.h to dma-plat.h to ensure it doen't get
confused with plat/dma.h
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A&W6410 board uses Samsung S3C6410 SoC and it is registered with 2183.
Framebuffer and ethernet devices are supported currently.
Unnecessary header file is removed.
Fix to use __raw_writel() and __raw_readl() for accessing mapped address.
Thank you for your comments.
Signed-off-by: Kwangwoo Lee <kwangwoo.lee@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Since no consumers are currently configured for the SMDK6410 mark all
the supplies on the board as being always_on, ensuring interoperability
with future regulator API changes to disable unused regulators.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Using an active high IRQ ensures that the WM8350 interrupt handling
does not spin when used with a SMDK6410 which has not had R20 removed
and R21 fitted to connect EINT12 to the PMIC module rather thant the
fixed regulators on the CPU module.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This is a basic support for NCP board based on s3c6410.
Only enables the serial. also remove empty i2c device.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The SMDK6410 supports pluggable PMIC boards. One such board is the
Wolfson Microelectronics 1190-EV1 for the WM8350 PMICs. This patch
introduces initial support for this module. Further patches will
add additional integration with the system as support for the
S3C6410 and other devices on the system improves.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Ensure that the LCD output type is RGB and that
the modem interface is not bypassing the LCD
block. This ensures the LCD interface output
gets to the pins in the correct format.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds a workaround for the 458693 Cortex-A8 (r2p0)
erratum. It sets the corresponding bits in the auxiliary control
register so that the PLD instruction becomes a NOP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
