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6,429 commits

Author SHA1 Message Date
Johannes Berg
19d337dff9 rfkill: rewrite
This patch completely rewrites the rfkill core to address
the following deficiencies:

 * all rfkill drivers need to implement polling where necessary
   rather than having one central implementation

 * updating the rfkill state cannot be done from arbitrary
   contexts, forcing drivers to use schedule_work and requiring
   lots of code

 * rfkill drivers need to keep track of soft/hard blocked
   internally -- the core should do this

 * the rfkill API has many unexpected quirks, for example being
   asymmetric wrt. alloc/free and register/unregister

 * rfkill can call back into a driver from within a function the
   driver called -- this is prone to deadlocks and generally
   should be avoided

 * rfkill-input pointlessly is a separate module

 * drivers need to #ifdef rfkill functions (unless they want to
   depend on or select RFKILL) -- rfkill should provide inlines
   that do nothing if it isn't compiled in

 * the rfkill structure is not opaque -- drivers need to initialise
   it correctly (lots of sanity checking code required) -- instead
   force drivers to pass the right variables to rfkill_alloc()

 * the documentation is hard to read because it always assumes the
   reader is completely clueless and contains way TOO MANY CAPS

 * the rfkill code needlessly uses a lot of locks and atomic
   operations in locked sections

 * fix LED trigger to actually change the LED when the radio state
   changes -- this wasn't done before

Tested-by: Alan Jenkins <alan-jenkins@tuffmail.co.uk>
Signed-off-by: Henrique de Moraes Holschuh <hmh@hmh.eng.br> [thinkpad]
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2009-06-03 14:06:13 -04:00
Rabin Vincent
6b4bfb87b6 mx[23]: don't put clock lookups in __initdata
Remove the __initdata annotation for the clock lookups, since they will
be needed when loading modules which use clk_get().

Tested-by: Agustín Ferrín Pozuelo <gatoguan-os@yahoo.com>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-06-03 11:51:06 +02:00
Fabio Estevam
aefa1c6e7b MX35: Add basic support for MX35PDK board
Add basic support for MX35PDK board (www.freescale.com/imx35pdk).

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-06-03 11:44:50 +02:00
Russell King
1946d6ef9d [ARM] ARMv7 errata: only apply fixes when running on applicable CPU
Currently, whenever an erratum workaround is enabled, it will be
applied whether or not the erratum is relevent for the CPU.  This
patch changes this - we check the variant and revision fields in the
main ID register to determine which errata to apply.

We also avoid re-applying erratum 460075 if it has already been applied.
Applying this fix in non-secure mode results in the kernel failing to
boot (or even do anything.)

This fixes booting on some ARMv7 based platforms which otherwise
silently fail.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-02 22:36:20 +01:00
Martin Fuzzey
eb5f4ca953 [ARM] 5534/1: kmalloc must return a cache line aligned buffer
Define ARCH_KMALLOC_MINALIGN in asm/cache.h
At the request of Russell also move ARCH_SLAB_MINALIGN to this file.

Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-02 22:36:15 +01:00
Daniel Mack
8d9fb9bb89 Support for lilly-1131 modules and baseboards [v2]
On Thu, May 28, 2009 at 08:42:23PM +0200, Sascha Hauer wrote:
> > > Mail-Followup-To: Daniel Mack <daniel@caiaq.de>,
> > > 	linux-arm-kernel@lists.arm.linux.org.uk
> >
> > ... which causes my mutt to only reply to the list.
>
> Ah, ok. /me hacking in muttrc... Does it work now?

Yep :)

> >  	mxc_register_device(&mxc_uart_device0, &uart_pdata);
> > +	mxc_register_device(&mxc_uart_device1, &uart_pdata);
> > +	mxc_register_device(&mxc_uart_device2, &uart_pdata);
>
> What about the RXD3/TXD3 pins?

You're right - I got the IOMUX tables wrong and thought UART0 pins are
selected unconditionally. But as it turns out TXD1/RXD1 is for UART0
(mxc_uart_device0), TXD2/RXD2 for UART1 (mxc_uart_device1) etc.

Below is a new patch.

Thanks,
Daniel

From e7eb5fa0fed09d667a4b2f168fe466e2cc645abb Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@caiaq.de>
Date: Wed, 27 May 2009 12:22:51 +0200
Subject: [PATCH] ARM: MX3: add two more UARTs to lilly-1131-db

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-06-02 19:28:36 +02:00
Ingo Molnar
3d58f48ba0 Merge branch 'linus' into irq/numa
Conflicts:
	arch/mips/sibyte/bcm1480/irq.c
	arch/mips/sibyte/sb1250/irq.c

Merge reason: we gathered a few conflicts plus update to latest upstream fixes.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-06-01 21:06:21 +02:00
Russell King
c7f7ff179c Merge branch 'smp' into devel 2009-06-01 18:35:26 +01:00
Linus Walleij
eb366d4c95 [ARM] 5533/1: Add U300 series defconfig
This adds a defconfig for the U300 series ST-Ericsson mobile
platforms. It will be maintained to enable the maximum set of
drivers so as to provide a good regression testing target for
these platforms.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-01 10:03:10 +01:00
Russell King
a22f277bba [ARM] Kconfig: remove 'default n'
Kconfig entries default to n, so there's no need for this to be
explicitly specified.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 15:12:25 +01:00
Russell King
ed31b2dfad [ARM] make U300 clk_set_rate() return a _real_ errno
Another stupid instance of "return -1"-ism.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 15:08:11 +01:00
Marek Vašut
5a9d25150c [ARM] 5522/1: PalmLD: IDE support
Support for Palm LifeDrive's internal harddrive.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 14:50:40 +01:00
dmitry pervushin
98f420b23a [ARM] 5532/1: Freescale STMP: register definitions [3/3]
Replace HW_zzz register access macros by regular __raw_readl/__raw_writel calls

Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 13:55:56 +01:00
dmitry pervushin
3f52326a85 [ARM] 5531/1: Freescale STMP: get rid of HW_zzz macros [2/3]
Replace HW_zzz register access macros by regular __raw_readl/__raw_writel calls

Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 13:55:54 +01:00
dmitry pervushin
e0421bbe64 [ARM] 5530/1: Freescale STMP: get rid of HW_zzz macros [1/3]
Replace HW_zzz register access macros by regular __raw_readl/__raw_writel calls

Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 13:55:49 +01:00
Nelson Castillo
fb6ea32587 [MTD] [NAND] S3C2410: Small colon cleanup
checkpatch would complain with "disable_ecc : 1".

Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
[ben-linux@fluff.org: subject cleanup]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-05-30 17:54:40 +01:00
Catalin Marinas
85d6943af5 Fix the VFP handling on the Feroceon CPU
This CPU generates synchronous VFP exceptions in a non-standard way -
the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the
VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP
subarchitecture 2. The main problem is that the faulty instruction
(which needs to be emulated in software) will be restarted several times
(normally until a context switch disables the VFP). This patch ensures
that the VFP exception is treated as synchronous.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Nicolas Pitre <nico@cam.org>
2009-05-30 14:00:18 +01:00
Catalin Marinas
26584853a4 Add core support for ARMv6/v7 big-endian
Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
(byte-invariant). This patch adds the core support:

- setting of the BE-8 mode via the CPSR.E register for both kernel and
  user threads
- big-endian page table walking
- REV used to rotate instructions read from memory during fault
  processing as they are still little-endian format
- Kconfig and Makefile support for BE-8. The --be8 option must be passed
  to the final linking stage to convert the instructions to
  little-endian

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:18 +01:00
Catalin Marinas
ee8c957119 RealView: Move the IRQ_* definitions out of the board-*.h files
The IRQ_* macros need to be made visible via the mach/irqs.h file but
without the additional macros defined in the board-*.h files.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:17 +01:00
Catalin Marinas
8c7e65742f arm: Provide _sdata and __bss_stop in the vmlinux.lds.S file
_sdata and __bss_stop are common symbols defined by many architectures
and made available to the kernel via asm-generic/sections.h. Kmemleak
uses these symbols when scanning the data sections.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:17 +01:00
Catalin Marinas
23d1c515d8 ARMv7: Document the PRRR and NMRR registers setting
This patch adds a comment to the proc-v7.S file for the setting of the
PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0
(corresponding to the reserved TEX[0]CB encoding 110) to be consistent
with the documentation.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:16 +01:00
Catalin Marinas
213fb2a8ee ARMv7: Enable the SWP instruction
The SWP instruction has been deprecated starting with the ARMv6
architecture. On ARMv7 processors with the multiprocessor extensions
(like Cortex-A9), this instruction is disabled by default but it can be
enabled by setting bit 10 in the System Control register. Note that
setting this bit is safe even if the ARMv7 processor has the SWP
instruction enabled by default.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:16 +01:00
Catalin Marinas
d71e1352e2 Clear the IT state when invoking a Thumb-2 signal handler
If a process is interrupted during an If-Then block and a signal is
invoked, the ITSTATE bits must be cleared otherwise the handler would
not run correctly.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Joseph S. Myers <joseph@codesourcery.com>
2009-05-30 14:00:15 +01:00
Tony Thompson
ba3c02636a ARMv7: Mark the PTWs inner WBWA on SMP and WB on UP
There are additional bits to set for the ARMv7 SMP extensions in the
TTBR registers. The IRGN bits order is counter-intuitive but it allows
software built for the ARMv7 base architecture to run on an
implementation with the MP extensions.

Signed-off-by: Tony Thompson <Anthony.Thompson@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:15 +01:00
Catalin Marinas
faa7bc51c1 Check whether the TLB operations need broadcasting on SMP systems
ARMv7 SMP hardware can handle the TLB maintenance operations
broadcasting in hardware so that the software can avoid the costly IPIs.
This patch adds the necessary checks (the MMFR3 CPUID register) to avoid
the broadcasting if already supported by the hardware.

(this patch is based on the work done by Tony Thompson @ ARM)

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 14:00:14 +01:00
Catalin Marinas
da055eb52e RealView: Toggle one LED per CPU
If CONFIG_LEDS is enabled, it makes more sense to toggle one LED per CPU
in SMP systems rather than a single LED for all the CPUs.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 13:56:16 +01:00
Colin Tuckley
ff3042fb6f RealView: Allow CONFIG_LEDS on this platform
Signed-off-by: Colin Tuckley <Colin.Tuckley@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 13:56:13 +01:00
Catalin Marinas
af607747de RealView: Allow access to the secure flash memory block on PB1176
This patch adds a Kconfig option for specifying whether Linux will only
be run in secure mode on the RealView PB1176 platform. Enabling it will
make the secure flash memory block (64MB @ 0x3c000000) available to
Linux.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 13:56:13 +01:00
Colin Tuckley
1b504bbe7a RealView: Add support for the RealView/PBX platform
This is a RealView platform supporting core tiles with ARM11MPCore,
Cortex-A8 or Cortex-A9 (multicore) processors. It has support for MMC,
CompactFlash, PCI-E.

Signed-off-by: Colin Tuckley <colin.tuckley@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 13:56:12 +01:00
Catalin Marinas
412b400278 RealView: Allow SMP when the Cortex-A9 tile is enabled for EB
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-05-30 13:56:12 +01:00
Nicolas Pitre
c626e3f5ca [ARM] alternative copy_to_user: more precise fallback threshold
Previous size thresholds were guessed from various user space benchmarks
using a kernel with and without the alternative uaccess option.  This
is however not as precise as a kernel based test to measure the real
speed of each method.

This adds a simple test bench to show the time needed for each method.
With this, the optimal size treshold for the alternative implementation
can be determined with more confidence.  It appears that the optimal
threshold for both copy_to_user and clear_user is around 64 bytes. This
is not a surprise knowing that the memcpy and memset implementations
need at least 64 bytes to achieve maximum throughput.

One might suggest that such test be used to determine the optimal
threshold at run time instead, but results are near enough to 64 on
tested targets concerned by this alternative copy_to_user implementation,
so adding some overhead associated with a variable threshold is probably
not worth it for now.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-30 01:10:15 -04:00
Nicolas Pitre
cb9dc92c0a [ARM] lower overhead with alternative copy_to_user for small copies
Because the alternate copy_to_user implementation has a higher setup cost
than the standard implementation, the size of the memory area to copy
is tested and the standard implementation invoked instead when that size
is too small.  Still, that test is made after the processor has preserved
a bunch of registers on the stack which have to be reloaded right away
needlessly in that case, causing a measurable performance regression
compared to plain usage of the standard implementation only.

To make the size test overhead negligible, let's factorize it out of
the alternate copy_to_user function where it is clear to the compiler
that no stack frame is needed.  Thanks to CONFIG_ARM_UNWIND allowing
for frame pointers to be disabled and tail call optimization to kick in,
the overhead in the small copy case becomes only 3 assembly instructions.

A similar trick is applied to clear_user as well.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-29 22:38:33 -04:00
Lennert Buytenhek
39ec58f3fe [ARM] alternative copy_to_user/clear_user implementation
This implements {copy_to,clear}_user() by faulting in the userland
pages and then using the regular kernel mem{cpy,set}() to copy the
data (while holding the page table lock).  This is a win if the regular
mem{cpy,set}() implementations are faster than the user copy functions,
which is the case e.g. on Feroceon, where 8-word STMs (which memcpy()
uses under the right conditions) give significantly higher memory write
throughput than a sequence of individual 32bit stores.

Here are numbers for page sized buffers on some Feroceon cores:

 - copy_to_user on Orion5x goes from 51 MB/s to 83 MB/s
 - clear_user on Orion5x goes from 89MB/s to 314MB/s
 - copy_to_user on Kirkwood goes from 240 MB/s to 356 MB/s
 - clear_user on Kirkwood goes from 367 MB/s to 1108 MB/s
 - copy_to_user on Disco-Duo goes from 248 MB/s to 398 MB/s
 - clear_user on Disco-Duo goes from 328 MB/s to 1741 MB/s

Because the setup cost is non negligible, this is worthwhile only if
the amount of data to copy is large enough.  The operation falls back
to the standard implementation when the amount of data is below a certain
threshold. This threshold was determined empirically, however some targets
could benefit from a lower runtime determined value for optimal results
eventually.

In the copy_from_user() case, this technique does not provide any
worthwhile performance gain due to the fact that any kind of read access
allocates the cache and subsequent 32bit loads are just as fast as the
equivalent 8-word LDM.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Martin Michlmayr <tbm@cyrius.com>
2009-05-29 22:36:45 -04:00
Nicolas Pitre
a1f98849fd [ARM] allow for alternative __copy_to_user/__clear_user implementations
This allows for optional alternative implementations of __copy_to_user
and __clear_user, with a possible runtime fallback to the standard
version when the alternative provides no gain over that standard
version. This is done by making the standard __copy_to_user into a weak
alias for the symbol __copy_to_user_std.  Same thing for __clear_user.

Those two functions are particularly good candidates to have alternative
implementations for, since they rely on the STRT instruction which has
lower performances than STM instructions on some CPU cores such as
the ARM1176 and Marvell Feroceon.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-29 22:34:45 -04:00
Linus Torvalds
78b170f45b Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] update mach-types
  [ARM] Add cmpxchg support for ARMv6+ systems (v5)
  [ARM] barriers: improve xchg, bitops and atomic SMP barriers
  Gemini: Fix SRAM/ROM location after memory swap
  MAINTAINER: Add F: entries for Gemini and FA526
  [ARM] disable NX support for OABI-supporting kernels
  [ARM] add coherent DMA mask for mv643xx_eth
  [ARM] pxa/palm: fix PalmLD/T5/TX AC97 MFP
  [ARM] pxa: add parameter to clksrc_read() for pxa168/910
  [ARM] pxa: fix the incorrectly defined drive strength macros for pxa{168,910}
  [ARM] Orion: Remove explicit name for platform device resources
  [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP TS-119/TS-219.
  [ARM] pxa/ezx: fix pin configuration for low power mode
  [ARM] pxa/spitz: provide spitz_ohci_exit() that unregisters USB_HOST GPIO
  [ARM] pxa: enable GPIO receivers after configuring pins
  [ARM] pxa: allow gpio_reset drive high during normal work
  [ARM] pxa: save/restore PGSR on suspend/resume.
2009-05-29 16:07:39 -07:00
Sergey Lapin
6d36110e1c [ARM] 5525/1: AFEB9260: fix for MMC support
Proper pin configuration for MMC.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 20:17:40 +01:00
Dmitry Baryshkov
6953e47e11 [ARM] 5524/1: at91sam9g20ek: add i2c eeprom info
Add board information about on-board I2C eeprom AT24C512N at 0x50.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 20:17:39 +01:00
Hartley Sweeten
4070243250 [ARM] 5528/1: ep93xx: add defines for dma clock magic numbers
Update the dma clocks so that the magic numbers are named.

All the dma clocks have an enable bit to turn them on/off as
needed.  Currently these bits are in the code as "magic"
numbers.  This changes all of them to named defines to
improve code readability.

Also, the EP93XX_SYSCON_CLOCK_CONTROL register is improperly
named.  In the EP93xx User's Guide this register is called
PwrCnt (Power Control).  All of the uses of this register
are associated with the clock support so this patch also
modifies the names to match the User's Guide.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 20:16:31 +01:00
Hartley Sweeten
68ee3d83b2 [ARM] 5527/1: ep93xx: core.c: trivial spelling error
Fix trivial spelling error in arch/arm/mach-ep93xx/core.c

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 20:16:30 +01:00
Hartley Sweeten
e3a6d01932 [ARM] 5526/1: ep93xx: usb driver cleanup
Cleanup the ohci-ep93xx driver.

1) Use the usb.h dbg() macro instead of pr_debug() so that
   the source filename is prefixed to the message and it is
   terminated with a linefeed.

2) Add error handling for the clk_get() call.

3) Update clkdev support so that the usb clock is matched by
   the dev_id instead of the con_id.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 20:16:29 +01:00
Russell King
949abd84cd Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
Conflicts:
	arch/arm/Makefile
2009-05-29 20:03:43 +01:00
Kevin Hilman
b0958aed1e [ARM] 5529/1: davinci: MMC platform support: DMA_32BIT_MASK --> DMA_BIT_MASK(32)
Some DMA_32BIT_MASK usage snuck in with the MMC platform support.
Convert these to the new preferred DMA_BIT_MASK(32).

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 19:59:13 +01:00
Oskar Schirmer
c3dc5bec05 flat: fix data sections alignment
The flat loader uses an architecture's flat_stack_align() to align the
stack but assumes word-alignment is enough for the data sections.

However, on the Xtensa S6000 we have registers up to 128bit width
which can be used from userspace and therefor need userspace stack and
data-section alignment of at least this size.

This patch drops flat_stack_align() and uses the same alignment that
is required for slab caches, ARCH_SLAB_MINALIGN, or wordsize if it's
not defined by the architecture.

It also fixes m32r which was obviously kaput, aligning an
uninitialized stack entry instead of the stack pointer.

[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Oskar Schirmer <os@emlix.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Bryan Wu <cooloney@kernel.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Johannes Weiner <jw@emlix.com>
Acked-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-05-29 08:40:02 -07:00
Russell King
a35197a8be Merge branch 'for-rmk' of git://gitorious.org/linux-gemini/mainline 2009-05-29 10:19:22 +01:00
Russell King
6daad5c6c5 [ARM] update mach-types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 10:15:08 +01:00
Russell King
42f1d2e06a Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci into devel 2009-05-29 10:04:24 +01:00
Tony Lindgren
cd07ecc828 Merge branch 'omap4' into for-next 2009-05-28 15:45:14 -07:00
Tony Lindgren
4c50d22a0c Merge branch 'omap3-boards' into for-next 2009-05-28 15:45:07 -07:00
Tony Lindgren
970a724d91 Merge branch 'omap3-upstream' into for-next
Conflicts:
	arch/arm/mach-omap2/serial.c
2009-05-28 15:44:54 -07:00
Tony Lindgren
c81592ba1b Merge branch 'omap-upstream' into for-next
Conflicts:
	arch/arm/mach-omap2/Makefile
2009-05-28 15:41:03 -07:00