Board specific defconfigs are useful, however with the ability to do
multi-board defconfigs they aren't needed in the top level configs directory.
Move the 4xx board specific defconfigs to individual directories under
arch/powerpc/configs.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Now that we have the alpaca, the reg_save_ptr is no longer needed in the
paca. Eradicate all global uses of it and make it static in the iSeries
lpardata.c
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The iSeries HV only needs the first two fields of the paca statically
initialised, so create an alternate paca that contains only those and
switch to our real paca immediately after boot.
This is in order to make the 1024 cpu patches easier since they will no
longer have to statically initialise the pacas for iSeries.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The prpmc2800 platform requires a zImage formatted file with an
embedded dtb file. Rename the requested boot image file to
dtbImage.prpmc2800.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The mv643xx_eth driver is being modified to support multiple instances
of the ethernet silicon block on the same platform. Each block contains
a single register bank containing the registers for up to three ports
interleaved within that bank. This patch updates the PowerPC OF to
platform_device glue code to support multiple silicon blocks, each
with up to three ethernet ports. The main difference is that we now
allow multiple mv64x60_shared platform_devices to be registered and
we provide each port platform_device with a pointer to its associated
shared platform_device. The pointer will not be used until the
mv643xx_eth driver changes are committed.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Remove several unused (or software config only) properties.
Rename marvel node to "system-controller". Also, rename the
"block-index" property to "cell-index" to conform to current
practice.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Replace several device node absolute path lookups in the mv64x60
bootwrapper code with lookups by compatible or device_type
properties.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Compatible names should refer to a specific version of the hardware,
without wildcards. Change each instance of mv64x60 to mv64360, which
is the oldest version we currently support.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
After the conversion to dts v1 format, seeing the frequencies
in decimal made it obvious that some of them had been
incorrectly truncated. This fixes them. Note that the PCI
frequency comes from a different source and is documented
as 66MHz, so it was left at 66000000.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Update the prpmc2800 DTS file to version 1 and add labels.
I verified that there was no change in the resulting dtb file.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The allyesconfig (among others) build was giving this:
In file included from include/linux/gfp.h:4,
from include/linux/slab.h:14,
from include/linux/percpu.h:5,
from include2/asm/time.h:18,
from include2/asm/cputime.h:26,
from include/linux/sched.h:67,
from
arch/powerpc/kernel/asm-offsets.c:17:
include/linux/mmzone.h:791:2: error: #error Allocator MAX_ORDER exceeds SECTION_SIZE
Kconfig options are order depenendent, so move the setting of
FORCE_MAX_ZONEORDER to after the setting of PPC_64K_PAGES. Also add an
explicit !PPC_64K_PAGES.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Len Brown <len.brown@intel.com>
arch/x86/kernel/apm_32.c:1215: warning: label 'out' defined but not used
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Len Brown <len.brown@intel.com>
AFAICT pm_send_all is a nop when noone uses pm_register...
Hmm.. can we just force CONFIG_PM_LEGACY=n, and see what happens?
Or maybe this is better idea? It may break build somewhere, but it
should be easy to fix... (it builds here, i386 and x86-64).
Signed-off-by: Pavel Machek <pavel@suse.cz>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Len Brown <len.brown@intel.com>
d142b6e77d added clock source support,
now it's time for the clock event support.
Tested-by: Thomas Kunze <thommycheck@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These changes is the result of the discussion with Paul Walmsley.
His ideas are included into this patch.
Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks,
and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk).
omap2_get_dpll_rate() now returns the correct DPLL rate, as represented
by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along
with high-frequency bypass support.
Add support for DPLLs function in locked and bypass clock modes.
Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove old PRCM register access code that is no longer needed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch changes 24xx to use shared clock code and new register
access.
Note that patch adds some temporary OLD_CK defines to keep patch
more readable. These temporary defines will be removed in the next
patch. Also not all clocks are changed in this patch to limit the
size.
Also, the patch fixes few incorrect clock defines in clock24xx.h.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds a common clock framework for 24xx and 34xx.
Note that this patch does not add it to Makefile until in
next patch. Some functions are modified from earlier 24xx
clock framework code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch moves clock.h to clock24xx.c to make room for
adding common clock code for 24xx and 34xx.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch moves clock.h to clock24xx.h to make room for
adding common clock code for 24xx and 34xx.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch removes old 24xx PM code that does not really work for sleep
states, and uses old power management register access. Working PM code
will be added later.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch changes 24xx to use new register access, except for clock
framework. Clock framework register access will get updates in the
next patch.
Note that board-*.c files change GPMC (General Purpose Memory Controller)
access to use gpmc_cs_write_reg() instead of accessing the registers
directly. The code also uses gpmc_fck instead of it's parent clock
core_l3_ck for GPMC clock.
The H4 board file also adds h4_init_flash() function, which specify the
flash start and end addresses.
Also note that sleep.S removes some unused registers addresses.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds register access for 34xx power and clock management.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds common register access for 24xx and 34xx power
and clock management in order to share code between 24xx and 34xx.
Only change USB platform init code to use new register access, other
access will be changed in later patches.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Misc clean-up for the mux code and remove some unnecessary
ifdefs. Patch changes debug function so it can be used on
both 24xx and 34xx.
Changes are mostly for omap2, but patch also cleans up some
omap1 and common mux code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove MPU-timer based sched_clock() in favor of the common one based
on 32k sync timer which works across all OMAP1/2/3 platforms.
Using 32k based one also gives a valid sched_clock() very early in the
boot process.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These are no longer used and similar conversions are provided
by the clocksource/clockevent code.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move now OMAP1-specific timer32k code to mach-omap1 since OMAP2/3 32k
timers are done in gptimer code.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since 32k timer code is moving to OMAP1 specific dir, move the
32k-based sched_clock() into common code where it is based on the 32k
sync counter and can be used even when using MPU timer.
While moving, change the ticks-to-nsecs conversion to use the helper
functions provided by clocksource.h.
Also removed the unused ticks_to_usec, leaving only ticks_to_nsec.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP2/3, the gp-timer code can be used for a 32kHz timer simply by
setting the source to be the 32k clock instead of sys_clk.
This patch uses the mach-omap2/timer-gp.c code for 32kHz timer on
OMAP2, moving the logic into mach-omap2/timer-gp.c, and not using
plat-omap/timer32k.c which, for OMAP2, is redundant with the timer-gp
code.
Also, if CONFIG_OMAP_32K_TIMER is enabled, the gptimer-based
clocksource is not used. Instead the default 32k sync counter is used
as the clocksource (see the clocksource in plat-omap/common.c.) This
is important for sleep/suspend so there is a valid counter during
sleep. Note that the suspend/sleep code needs fixing to check for
overflows of this counter.
In addition, the OMAP2/3 details are removed from timer32k.c leaving
that with only OMAP1 specifics. A follow-up patch will move it from
plat-omap common code to mach-omap1.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use omap processor specific function depending on system type.
Based on an earlier patch by Klaus Pedersen <klaus.k.pedersen@nokia.com>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch changes pin multiplexing init to allow registering
custom function. The omap_cfg_reg() func will be split into
omap processor specific functions in later patch.
This is done to make adding omap3 pin multiplexing easier.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently, the GPIO interrupt handling is duplicating some of the work
done by the generic IRQ handlers (handle_edge_irq, handle_level_irq)
such as detecting nesting, handling re-triggers etc. Remove this
duplication and use generic hooks based on IRQ type.
Using generic IRQ handlers ensures correct behavior when using
threaded interrupts introduced by the -rt patch.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clearing was moved to the unmask hook because it is known to run
after the interrupt handler has actually run. Before this patch, if
interrupts are threaded, the clearing/unmasking of level triggered
interrupts would be done before the threaded handler actually ran.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert OSK board to use new tps65010 gpiolib support. This
includes moving its LED support from leds-osk to gpio-leds,
giving more trigger options and a net platform code shrink.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Start cleaning up GPIO handling for OMAP5912 OSK board:
- Initialize GPIOs using the cross-platform calls, not the old
OMAP-private ones.
- Move touchscreen setup out of ads7846 code into board-specfic
setup code, where it belongs.
This doesn't depend on the patches to update OMAP to use the
gpiolib implementation framework.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update OMAP to use the new GPIO implementation framework. This is just a
quick'n'dirty update ... more code could now be removed, ideally as part
of cleaning up the entire OMAP GPIO infrastructure ...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Correctly determine the address of an illegal instruction. The EPCR0 register
holds this value (masked by EPCR0_PC) if the validity bit is set (masked by
EPCR0_V). So the test as to whether the contents of the register are usable
should be involve checking the _V bit, not the _PC bits.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
If an SLB miss interrupt happens while the RI bit of MSR is zero, we
can't just return, because RI being zero indicates that SRR0/SRR1
potentially had live values in them, and the process of taking an
interrupt overwrites them.
This should never happen, but if it does, we try to print a nice oops
message. That doesn't work, however, because the code at unrecov_slb
assumes that the MMU has been turned on, but we call it with the MMU
off (and have done so since the SLB miss handler was rewritten to run
without turning the MMU on) -- except on iSeries, where everything runs
with the MMU on.
This fixes it by adding the necessary code to turn the MMU on if
necessary.
Signed-off-by: Paul Mackerras <paulus@samba.org>
There is a NUMA memory configuration issue in 2.6.24:
A 2-node machine of ours has got the following memory layout:
Node 0: 0 - 2 Gbytes
Node 0: 4 - 8 Gbytes
Node 1: 8 - 16 Gbytes
Node 0: 16 - 18 Gbytes
"efi_memmap_init()" merges the three last ranges into one.
"register_active_ranges()" is called as follows:
efi_memmap_walk(register_active_ranges, NULL);
i.e. once for the 4 - 18 Gbytes range. It picks up the node
number from the start address, and registers all the memory for
the node #0.
"register_active_ranges()" should be called as follows to
make sure there is no merged address range at its entry:
efi_memmap_walk(filter_memory, register_active_ranges);
"filter_memory()" is similar to "filter_rsvd_memory()",
but the reserved memory ranges are not filtered out.
Signed-off-by: Zoltan Menyhart <Zoltan.Menyhart@bull.net>
Signed-off-by: Tony Luck <tony.luck@intel.com>
