Instead of using a function local static e820 map in xen_memory_setup()
and calling various functions in the same source with the map as a
parameter use a map directly accessible by all functions in the source.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Konrad Rzeszutek Wilk <Konrad.wilk@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Direct Xen to place the initial P->M table outside of the initial
mapping, as otherwise the 1G (implementation) / 2G (theoretical)
restriction on the size of the initial mapping limits the amount
of memory a domain can be handed initially.
As the initial P->M table is copied rather early during boot to
domain private memory and it's initial virtual mapping is dropped,
the easiest way to avoid virtual address conflicts with other
addresses in the kernel is to use a user address area for the
virtual address of the initial P->M table. This allows us to just
throw away the page tables of the initial mapping after the copy
without having to care about address invalidation.
It should be noted that this patch won't enable a pv-domain to USE
more than 512 GB of RAM. It just enables it to be started with a
P->M table covering more memory. This is especially important for
being able to boot a Dom0 on a system with more than 512 GB memory.
Signed-off-by: Juergen Gross <jgross@suse.com>
Based-on-patch-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Konrad Rzeszutek Wilk <Konrad.wilk@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
In case the Xen tools indicate they don't need the p2m 3 level tree
as they support the virtual mapped linear p2m list, just omit building
the tree.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Konrad Rzeszutek Wilk <Konrad.wilk@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
The virtual address of the linear p2m list should be stored in the
shared info structure read by the Xen tools to be able to support
64 bit pv-domains larger than 512 GB. Additionally the linear p2m
list interface includes a generation count which is changed prior
to and after each mapping change of the p2m list. Reading the
generation count the Xen tools can detect changes of the mappings
and re-read the p2m list eventually.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Konrad Rzeszutek Wilk <Konrad.wilk@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Use the newest headers from the xen tree to get some new structure
layouts.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Konrad Rzeszutek Wilk <Konrad.wilk@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
The commit 6f6c15ef91 "xen/pvhvm: Remove
the xen_platform_pci int." makes the x86 version of
xen_pci_platform_unplug static.
Therefore we don't need anymore to define a dummy xen_pci_platform_unplug
for ARM.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Currently, the event channel rebind code is gated with the presence of
the vector callback.
The virtual interrupt controller on ARM has the concept of per-CPU
interrupt (PPI) which allow us to support per-VCPU event channel.
Therefore there is no need of vector callback for ARM.
Xen is already using a free PPI to notify the guest VCPU of an event.
Furthermore, the xen code initialization in Linux (see
arch/arm/xen/enlighten.c) is requesting correctly a per-CPU IRQ.
Introduce new helper xen_support_evtchn_rebind to allow architecture
decide whether rebind an event is support or not. It will always return
true on ARM and keep the same behavior on x86.
This is also allow us to drop the usage of xen_have_vector_callback
entirely in the ARM code.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
xen_has_pv_devices() has no parameters, so use the normal void
parameter convention to make it match the prototype in the header file
include/xen/platform_pci.h.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Since commit feb44f1f7a (x86/xen:
Provide a "Xen PV" APIC driver to support >255 VCPUs) Xen guests need
a full APIC driver and thus should depend on X86_LOCAL_APIC.
This fixes an i386 build failure with !SMP && !CONFIG_X86_UP_APIC by
disabling Xen support in this configuration.
Users needing Xen support in a non-SMP i386 kernel will need to enable
CONFIG_X86_UP_APIC.
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Cc: <stable@vger.kernel.org>
On powernv secondary cpus are returned to OPAL, and will then enter
the target kernel in big-endian. However if it is set the HILE bit
will persist, causing the first exception in the target kernel to be
delivered in litte-endian regardless of the current endianness.
If running on top of OPAL make sure the HILE bit is reset once we've
finished waiting for all of the secondaries to be returned to OPAL.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
If the target kernel does not inlcude the FIXUP_ENDIAN check, coming
from a different-endian kernel will cause the target kernel to panic.
All ppc64 kernels can handle starting in big-endian mode, so return to
big-endian before branching into the target kernel.
This mainly affects pseries as secondaries on powernv are returned to
OPAL.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This patch adds platform devices for leds. Also export LED related
OPAL API's so that led driver can use these APIs.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This patch registers the following two new OPAL interfaces calls
for the platform LED subsystem. With the help of these new OPAL calls,
the kernel will be able to get or set the state of various individual
LEDs on the system at any given location code which is passed through
the LED specific device tree nodes.
(1) OPAL_LEDS_GET_INDICATOR opal_leds_get_ind
(2) OPAL_LEDS_SET_INDICATOR opal_leds_set_ind
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Acked-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Tested-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
On powernv platform, IOV BAR would be shifted if necessary. While the log
message is not correct when disabling VFs.
This patch fixes this by print correct message based on the offset value.
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
The conversion of the wakeupgen irqchip to hierarchical irq domains
failed to provide a mechanism to properly set the trigger type of an
interrupt.
The wakeupgen irq chip itself has no mechanism and therefor no
irq_set_type() callback. The code before the conversion relayed the
trigger configuration directly to the underlying GIC.
Restore the correct behaviour by setting the wakeupgen irq_set_type
callback to irq_chip_set_type_parent(). This propagates the
set_trigger() call to the underlying GIC irqchip.
[ tglx: Massaged changelog ]
Fixes: 7136d457f3 ('ARM: omap: convert wakeupgen to stacked domains')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: <linux@arm.linux.org.uk>
Cc: <nsekhar@ti.com>
Cc: <jason@lakedaemon.net>
Cc: <balbi@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: <marc.zyngier@arm.com>
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1439554830-19502-5-git-send-email-grygorii.strashko@ti.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
After enhancing arm64 FP/SIMD exit handling, ARMv7 VFP exit branch is moved
to guest trap handling. This allows us to keep exit handling flow between both
architectures consistent.
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch only saves and restores FP/SIMD registers on Guest access. To do
this cptr_el2 FP/SIMD trap is set on Guest entry and later checked on exit.
lmbench, hackbench show significant improvements, for 30-50% exits FP/SIMD
context is not saved/restored
[chazy/maz: fixed save/restore logic for 32bit guests]
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Move the poison pointer offset to 0xdead000000000000, a
recognized value that is not mappable by user-space exploits.
Cc: <stable@vger.kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Thierry Strudel <tstrudel@google.com>
Signed-off-by: Jeff Vander Stoep <jeffv@google.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
With the removal of the dynamic reallocation of page tables for
KVM (see git commit 0b46e0a3ec)
the page table allocation / freeing code can be simplified.
The page table free code can now use the alloc_pgste bit in the
mm context to decide if a page table is 2K or 4K, there is no mix
of different sized page tables anymore. This eliminates the need
to use "page->_mapcount == 0" to check for 4K page table.
Use the lower two bits in page->_mapcount to indicate which
2K fragments of the 4K page are in use.
As 31-bit support is gone, remove the two defines ALLOC_ORDER
and FRAG_MASK and use the constants directly where appropriate.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The error messages in pci_insn are for debug purposes only. Move
them to the debugfs.
Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Change machine_check_init() to an early_initcall(). This makes sure it will
be called before all other cpus are online and therfore saves us a lot of
pointless smp_call_function() calls.
The control register settings will be forwarded to the other cpus when they
will be brought online.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The novx parameter disables the vector facility but the HWCAP_S390_VXRS
bit in the ELf hardware capabilies is always set if the machine has
the vector facility. If the user space program uses the "vx" string
in the features field of /proc/cpuinfo to utilize vector instruction
it will crash if the novx kernel paramter is set.
Convert setup_hwcaps to an arch_initcall and use MACHINE_HAS_VX to
decide if the HWCAPS_S390_VXRS bit needs to be set.
Cc: stable@vger.kernel.org # 3.18+
Reported-by: Ulrich Weigand <uweigand@de.ibm.com>
Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
get_user() and put_user() are inline functions in the meantime
again. Both will generate the mvcos instruction if compiled
with -march=z10 (or greater).
The kernel parameter "uaccess_primary" can only change the behavior
of out-of-line uaccess functions like copy_from_user() to not use
the mvcos instruction, but not for the above named inlined functions.
Therefore it is quite useless and the parameter can be removed.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Remove two more statements which always evaluate to 'false'.
These are more leftovers from the 31 bit era.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Remove the two facility bits
50 - constrained transactional-execution facility
74 - transactional-execution facility
from the required facilities if the kernel is built with -march=zEC12.
E.g. z/VM 6.3 doesn't virtualize the TX facility yet. Therefore a kernel
built with -march=zEC12 and ipl'ed on a zEC12 machine as a z/VM 6.3 guest
will emit a message about the missing facilities and stop working.
The kernel however doesn't make use of the TX facility, therefore remove
the two TX related facility bits and fix this unpleasant behavior.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
By accident this level has been removed by the NUMA infrastructure patch.
For non-NUMA systems with CPUs that span more than one book, this makes
the scheduler only use one of the books and the other books remain idle.
Fix this and re-add the missing level.
For NUMA and non-NUMA we have the following scheduling domains and groups:
- SMT (Groups: CPU threads)
- MC (Groups: Cores)
- BOOK (Groups: Books)
For the non-NUMA case we have one last level scheduling domain:
- DIE (Groups: Whole system, has all CPUs -> cpu_cpu_mask)
For the NUMA case we have the following two last level scheduling domains:
- DIE (Groups: NUMA nodes -> cpu_cpu_mask -> returns node siblings)
- NUMA (Groups: Whole system, has all CPUs -> created in sched_init_numa())
Fixes: e8054b654b ("s390/numa: add topology tree infrastructure")
Reported-and-tested-by: Evgeny Cherkashin <Eugene.Crosser@ru.ibm.com>
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
the PPC_MPC512x config automatically selected USB_EHCI_BIG_ENDIAN_*
switches, which made Kconfig warn about "unmet direct dependencies":
scripts/kconfig/conf --silentoldconfig Kconfig
warning: (PPC_MPC512x && 440EPX) selects USB_EHCI_BIG_ENDIAN_DESC which has unmet direct dependencies (USB_SUPPORT && USB && USB_EHCI_HCD)
warning: (PPC_MPC512x && PPC_PS3 && PPC_CELLEB && 440EPX) selects USB_EHCI_BIG_ENDIAN_MMIO which has unmet direct dependencies (USB_SUPPORT && USB && USB_EHCI_HCD)
warning: (PPC_MPC512x && 440EPX) selects USB_EHCI_BIG_ENDIAN_DESC which has unmet direct dependencies (USB_SUPPORT && USB && USB_EHCI_HCD)
warning: (PPC_MPC512x && PPC_PS3 && PPC_CELLEB && 440EPX) selects USB_EHCI_BIG_ENDIAN_MMIO which has unmet direct dependencies (USB_SUPPORT && USB && USB_EHCI_HCD)
make the selected entries additionally depend on USB_EHCI_HCD which
silences the warning
Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Pstore only supports one backend at a time. The preferred
pstore backend is set by passing the pstore.backend=<name>
argument to the kernel at boot time. Currently, while trying
to register with pstore, nvram throws an error message even
when "pstore.backend != nvram", which is unnecessary. This
patch removes the error message in case "pstore.backend != nvram".
Signed-off-by: Hari Bathini <hbathini@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
We currently register a platform device for e820 type-12 memory and
register a nvdimm bus beneath it. Registering the platform device
triggers the device-core machinery to probe for a driver, but that
search currently comes up empty. Building the nvdimm-bus registration
into the e820_pmem platform device registration in this way forces
libnvdimm to be built-in. Instead, convert the built-in portion of
CONFIG_X86_PMEM_LEGACY to simply register a platform device and move the
rest of the logic to the driver for e820_pmem, for the following
reasons:
1/ Letting e820_pmem support be a module allows building and testing
libnvdimm.ko changes without rebooting
2/ All the normal policy around modules can be applied to e820_pmem
(unbind to disable and/or blacklisting the module from loading by
default)
3/ Moving the driver to a generic location and converting it to scan
"iomem_resource" rather than "e820.map" means any other architecture can
take advantage of this simple nvdimm resource discovery mechanism by
registering a resource named "Persistent Memory (legacy)"
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Without this, the multi_v7_defconfig kernel cannot boot all CPUs
nor do deep cpuidle power saving on a TC2 board.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
DPLL for am4372 cpsw Ethernet driver. Also add ARM global and
local timers for am4372.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVzFS9AAoJEBvUPslcq6VzJWMP/irEBMaf+UXSSC6L52kwIYEv
SABK4S2vYMVnW8dRpkc/o2ZWA/dc4CcMxUh8g0BQtAg/BwB/1BUBGTkHPKPfo4bA
rja6i9PtTwRKPgmZtLdEpNbEbPm7fDwoBVvFjre9Yn6XRItoLprVadClZnPJuXxX
R4D/Xupjxr4XFoMPYfKaVFlWmwdfOWnVfU2vloewF4PCKkMZWh+OzHLep6Of1lqJ
BJcv7xHTb1OFLYeVAWYCDQDKSw5i7zKgkSdq2FzSafBPpB8ScsDiLFay7Nn79OoB
HZfNTiyvwhJAeYjwEE560atD4ZSAO6Etyn1E02ynG4WkXQGpSwVoeH8NeTOquVta
4oZvQbAPvWEtMIzCXjI088QUKS4dg/h6b9RYwgevQEllUQIUDwBiGvTiKby57f3t
LHs/xuBKvZKll6KJWSIqmsn7ujXuXA6RAiBekzANg8Dzv7hL/S9krEoLgfqG4pbx
0HRMrsfogBj4CYuCnPK3ZpvMXImhHW7QVb+7FOBtQ7LYjiI9p2gnbsoT0pkUAa+3
+5CGwYAwKV4aiFBYhJ44dn7TI8CISUakc7Unhk6IvydkUaj9KSVtNryTUNdFcVLB
QxJ7hiBEhQbJDZf5n3g/XeGTw1UMCWfUBFCQctS2PP4y2Bqm2U9yNX5IHfytcX+i
cgSCwWSJfaWXt8JusUAT
=4z1B
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.3/dt-pt4-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Fix up bogus RTC compatible change for am4372 and add missing
DPLL for am4372 cpsw Ethernet driver. Also add ARM global and
local timers for am4372.
* tag 'omap-for-v4.3/dt-pt4-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: boot: dts: am4372: add ARM timers and SCU nodes
ARM: dts: AM4372: Add the am4372-rtc compatible string
ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock
ARM: dts: AM437X: add dpll_clksel_mac_clk node
Signed-off-by: Olof Johansson <olof@lixom.net>
for GPMC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVzE/7AAoJEBvUPslcq6VzMOAQAKC6tFYngR2OwBKrHpcTt58s
LD2XBo+fPcQjNUR0woPxQAD2wIoR8OHwAu37hhHuN83SnYm2rYjMQv5lwXZHwY2y
5XPFzKYeoVpM4lLbgu1Z4KIqEBwQgwofZRGZuJaekcmSloeAbNr5iqXWwk5dMHzE
NIbpJA8Lz1/af93dB0YZm8AoSr4kyyGD4EFAeo6XbiEsbjIgwHyAod2rzXb7PqxZ
EDqDkv74eqrCpCf6O1IISNYp9PAif80b04ZpyxREO4WiVNe62K4oWgY0oWPERm2C
8lJBwEa9174dg2q0oOxckeguqNrOGvz6TbK4zlXfeSqHijJrYfdTYbXGuN+LxbiT
ZbN4uIETysIJJ282HpENJyrY/yon1q9D9u/pYTwZjxIx3HLeRjy5kdL5UwdfRIH7
qg9fZEx5emUtEJhpyu1YxuGYyI9i0ElfI1k57w6NYpElvbyENMwhZf+fBwAFhnQu
MaUGk6NQq+h8Z4h4siH+ejTvp1B0gnW/AU/nTGOxWZVIPkget8V+ytU8o4lkGFwm
MBWSI7FxI632NbkmsT6rnU3YSi+JpZtDBJkzTWEyFZo9pNVAjCp3EcGCDZPhqAGw
dRrJIybx5RCBGMwgtY/V4Eidgk25DAiZxnQpAUyVd+FXgItr5g+lsuloddU42K1n
yok4gw6EvB7dY/ltkmHX
=ok+S
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.3/soc-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Fix omap PM regression in Linux next and kill set_irq_flags usage
for GPMC.
* tag 'omap-for-v4.3/soc-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
memory: kill off set_irq_flags usage
ARM: OMAP2+: Fix power domain operations regression caused by 81xx
Signed-off-by: Olof Johansson <olof@lixom.net>
The sp810 clk driver is calling the clk consumer APIs from
clk_prepare ops to change the parent to a 1 MHz fixed rate clock
for each of the clocks that the driver provides. Use
assigned-clock-parents for this instead of doing it in the driver
to avoid using the consumer API in provider code. This also
allows us to remove the usage of clk provider APIs that take a
struct clk as an argument from the sp810 driver.
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The sp810 clk driver is calling the clk consumer APIs from
clk_prepare ops to change the parent to a 1 MHz fixed rate clock
for each of the clocks that the driver provides. Use
assigned-clock-parents for this instead of doing it in the driver
to avoid using the consumer API in provider code. This also
allows us to remove the usage of clk provider APIs that take a
struct clk as an argument from the sp810 driver.
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add audio and eTSEC device support and update dspi node for LS1021A.
- Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
a bunch of device support for i.MX6UL, including RTC, power key, USB,
QSPI, and dual FEC.
- Enable HDMI and LVDS dual display support for a few imx6qdl boards.
- Support of imx6sl-warp board rev1.12, the version which will be
publicly available for the customers.
- A few i.MX7D device additions, watchdog, cortex-a7 coresight
components, RTC, power key, power off.
- Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
update ADC node, and define stdout-path property.
- A few random updates for i.MX27 and i.MX53 devices.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJVyhktAAoJEFBXWFqHsHzOjQwH/0CXyzRUCJjHqxAHsnvHzOZG
AvjYWqaimxP5PD6TRG1bRxfWWXNL7zZGqj9Jd/l5HIWdWfUxnOLeMy40yfcs+AsH
9CHUunu0rahIDY6YF4gA7F5jyfnSIzxwE8Bkva7nmXvf0XmazTwhCXxYPzdBjMSG
Cf39datyTj9ZS3DD/DAKzRN//zebQCJmPuAdmIlRZljBkoLVPeEZrVxkSN0trRin
vKPQIpamM2DXIMmdiPK52J0j8Vwq4qbiGvvAwUKsaRCUVYfpunpVcZSYgMqm8iEa
7PKuurbVeuvZLzS0Bdq05tCkwVXt0upk0ayf0i8DkHFExX79TNTbONOLJwmigjo=
=iAvA
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree updates for 4.3:
- Add audio and eTSEC device support and update dspi node for LS1021A.
- Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
a bunch of device support for i.MX6UL, including RTC, power key, USB,
QSPI, and dual FEC.
- Enable HDMI and LVDS dual display support for a few imx6qdl boards.
- Support of imx6sl-warp board rev1.12, the version which will be
publicly available for the customers.
- A few i.MX7D device additions, watchdog, cortex-a7 coresight
components, RTC, power key, power off.
- Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
update ADC node, and define stdout-path property.
- A few random updates for i.MX27 and i.MX53 devices.
* tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits)
ARM: dts: imx6ul: add snvs power key support
ARM: dts: imx6ul: add RTC support
ARM: dts: imx6ul: enable GPC as extended interrupt controller
ARM: dts: imx6sx: correct property name for wakeup source
ARM: dts: add property for maximum ADC clock frequencies
ARM: dts: imx7d: enable snvs rtc, onoffkey and power off
ARM: dts: imx6ul-14x14-evk: add fec1 and fec2 support
ARM: dts: imx: add fec1 and fec2 nodes for SOC i.MX6UL
ARM: dts: imx27: add support of internal rtc
ARM: dts: vf-colibri: define stdout-path property
ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR
ARM: dts: ls1021a: Add the eTSEC controller nodes
ARM: dts: imx6ul: add qspi support
ARM: dts: imx6ul: fix low case define in imx6ul-pinfunc.h
ARM: dts: imx6ul: add usb host and function support
ARM: dts: vfxxx: Add io-channel-cells property for ADC node
ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
ARM: imx6qdl-sabreauto.dtsi: enable USB support
ARM: dts: imx: update snvs to use syscon access register
ARM: dts: imx: add imx6ul and imx6ul evk board support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add i.MX6 Ultralite SoC support, which is the newest addition to
i.MX6 family. It integrates a single Cortex-A7 core and a power
management module that reduces the complexity of external power
supply and simplifies power sequencing.
- Change SNVS RTC driver to use syscon interface for register access,
and add SNVS power key driver support.
- Add a second clock for mxc rtc driver, and support device tree probe
for the driver.
- Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
platform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJVyg8nAAoJEFBXWFqHsHzOQC8H/iY+cdNfAWIxYmt2CeF607su
fLaycUSUPqPAERUTcHpjKyiKkRg2NWV7vFVWCkKaQ3RZ+IW6xNntkqMxzocS1sh2
+70Ckp+B0orGuo96PkEXua9fNPf8/yaGiDhuJpK966VRRSSXRD15uOuqHAJ2Jz/v
HEnEm3KANSSYS1heEJRqiiCsqhADRWl2RzgfV327aXtScP9zXlbJGlEc/jUVAY65
wbqjsXdySeS3rECNMAYXnPU7IlK4NkRqrOi1JmTJCBlXqV2b6dBfjgIu9jOa91UG
yRj7IEBJemqT4Ap1ee2NR3H1lDngt2JKg9XqRDL3j9alYvhAWGvhSY2UH2iPrFg=
=emep
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
The i.MX SoC changes for 4.3:
- Add i.MX6 Ultralite SoC support, which is the newest addition to
i.MX6 family. It integrates a single Cortex-A7 core and a power
management module that reduces the complexity of external power
supply and simplifies power sequencing.
- Change SNVS RTC driver to use syscon interface for register access,
and add SNVS power key driver support.
- Add a second clock for mxc rtc driver, and support device tree probe
for the driver.
- Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
platform.
* tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
rtc: snvs: select option REGMAP_MMIO
ARM: imx6ul: add fec MAC refrence clock and phy fixup init
ARM: imx6ul: add fec bits to GPR syscon definition
rtc: mxc: add support of device tree
dt-binding: document the binding for mxc rtc
rtc: mxc: use a second rtc clock
input: snvs_pwrkey: use "wakeup-source" as deivce tree property name
Document: devicetree: input: imx: i.mx snvs power device tree bindings
input: keyboard: imx: add snvs power key driver
Document: dt: fsl: snvs: change support syscon
rtc: snvs: use syscon to access register
ARM: imx: add low-level debug support for i.mx6ul
ARM: imx: add i.mx6ul msl support
Signed-off-by: Olof Johansson <olof@lixom.net>
Alex Deucher, Mark Rustad and Alexander Holler reported a regression
with the latest v4.2-rc4 kernel, which breaks some SATA controllers.
With multi-MSI capable SATA controllers, only the first port works,
all other ports time out when executing SATA commands.
This happens because the first argument to assign_irq_vector_policy()
is always the base linux irq number of the multi MSI interrupt block,
so all subsequent vector assignments operate on the base linux irq
number, so all MSI irqs are handled as the first irq number. Therefor
the other MSI irqs of a device are never set up correctly and never
fire.
Add the loop iterator to the base irq number so all vectors are
assigned correctly.
Fixes: b5dc8e6c21 "x86/irq: Use hierarchical irqdomain to manage CPU interrupt vectors"
Reported-and-tested-by: Alex Deucher <alexdeucher@gmail.com>
Reported-and-tested-by: Mark Rustad <mrustad@gmail.com>
Reported-and-tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Link: http://lkml.kernel.org/r/1439911228-9880-1-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
All architectures except arm that define DMA_ERROR_CODE are casting it
to (dma_addr_t) - as it is always compared to dma_addr_t in arm as well
this could be harmonized.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use BIT_MASK() and BIT_WORD() rather than hard-coding the size
of the "long" type.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The chain of of_address_to_resource() and ioremap() can be replaced
with of_iomap().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add early fixmap support, initially to support permanent, fixed
mapping support for early console. A temporary, early pte is
created which is migrated to a permanent mapping in paging_init.
This is also needed since the attributes may change as the memory
types are initialized. The 3MiB range of fixmap spans two pte
tables, but currently only one pte is created for early fixmap
support.
Re-add FIX_KMAP_BEGIN to the index calculation in highmem.c since
the index for kmap does not start at zero anymore. This reverts
4221e2e6b3 ("ARM: 8031/1: fixmap: remove FIX_KMAP_BEGIN and
FIX_KMAP_END") to some extent.
Cc: Mark Salter <msalter@redhat.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Laura Abbott <lauraa@codeaurora.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
U-Boot is often used to boot the kernel on ARM boards, but uImage
is not built by "make all", so we are often inclined to do
"make all uImage" to generate DTBs, modules and uImage in a single
command, but we should notice a pitfall behind it. In fact,
"make all uImage" could generate an invalid uImage if it is run with
the parallel option (-j).
You can reproduce this problem with the following procedure:
[1] First, build "all" and "uImage" separately.
You will get a valid uImage
$ git clean -f -x -d
$ export CROSS_COMPILE=<your-tools-prefix>
$ make -s -j8 ARCH=arm multi_v7_defconfig
$ make -s -j8 ARCH=arm all
$ make -j8 ARCH=arm UIMAGE_LOADADDR=0x80208000 uImage
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
make[1]: `include/generated/mach-types.h' is up to date.
CHK include/generated/timeconst.h
CHK include/generated/bounds.h
CHK include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
CHK include/generated/compile.h
Kernel: arch/arm/boot/Image is ready
Kernel: arch/arm/boot/zImage is ready
UIMAGE arch/arm/boot/uImage
Image Name: Linux-4.2.0-rc5-00156-gdd2384a-d
Created: Sat Aug 8 23:21:35 2015
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 6138648 Bytes = 5994.77 kB = 5.85 MB
Load Address: 80208000
Entry Point: 80208000
Image arch/arm/boot/uImage is ready
$ ls -l arch/arm/boot/*Image
-rwxrwxr-x 1 masahiro masahiro 13766656 Aug 8 23:20 arch/arm/boot/Image
-rw-rw-r-- 1 masahiro masahiro 6138712 Aug 8 23:21 arch/arm/boot/uImage
-rwxrwxr-x 1 masahiro masahiro 6138648 Aug 8 23:20 arch/arm/boot/zImage
[2] Update some source file(s)
$ touch init/main.c
[3] Then, re-build "all" and "uImage" simultaneously.
You will get an invalid uImage at random.
$ make -j8 ARCH=arm UIMAGE_LOADADDR=0x80208000 all uImage
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
make[1]: `include/generated/mach-types.h' is up to date.
CHK include/generated/timeconst.h
CHK include/generated/bounds.h
CHK include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
CC init/main.o
CHK include/generated/compile.h
LD init/built-in.o
LINK vmlinux
LD vmlinux.o
MODPOST vmlinux.o
GEN .version
CHK include/generated/compile.h
UPD include/generated/compile.h
CC init/version.o
LD init/built-in.o
KSYM .tmp_kallsyms1.o
KSYM .tmp_kallsyms2.o
LD vmlinux
SORTEX vmlinux
SYSMAP System.map
OBJCOPY arch/arm/boot/Image
Building modules, stage 2.
Kernel: arch/arm/boot/Image is ready
GZIP arch/arm/boot/compressed/piggy.gzip
AS arch/arm/boot/compressed/piggy.gzip.o
Kernel: arch/arm/boot/Image is ready
LD arch/arm/boot/compressed/vmlinux
GZIP arch/arm/boot/compressed/piggy.gzip
OBJCOPY arch/arm/boot/zImage
Kernel: arch/arm/boot/zImage is ready
UIMAGE arch/arm/boot/uImage
Image Name: Linux-4.2.0-rc5-00156-gdd2384a-d
Created: Sat Aug 8 23:23:14 2015
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 26472 Bytes = 25.85 kB = 0.03 MB
Load Address: 80208000
Entry Point: 80208000
Image arch/arm/boot/uImage is ready
MODPOST 192 modules
AS arch/arm/boot/compressed/piggy.gzip.o
LD arch/arm/boot/compressed/vmlinux
OBJCOPY arch/arm/boot/zImage
Kernel: arch/arm/boot/zImage is ready
$ ls -l arch/arm/boot/*Image
-rwxrwxr-x 1 masahiro masahiro 13766656 Aug 8 23:23 arch/arm/boot/Image
-rw-rw-r-- 1 masahiro masahiro 26536 Aug 8 23:23 arch/arm/boot/uImage
-rwxrwxr-x 1 masahiro masahiro 6138648 Aug 8 23:23 arch/arm/boot/zImage
Please notice the uImage is extremely small when this issue is
encountered. Besides, "Kernel: arch/arm/boot/zImage is ready" is
displayed twice, before and after the uImage log.
The root cause of this is the race condition between zImage and
uImage. Actually, uImage depends on zImage, but the dependency
between the two is only described in arch/arm/boot/Makefile.
Because arch/arm/boot/Makefile is not included from the top-level
Makefile, it cannot know the dependency between zImage and uImage.
Consequently, when we run make with the parallel option, Kbuild
updates vmlinux first, and then two different threads descends into
the arch/arm/boot/Makefile almost at the same time, one for updating
zImage and the other for uImage. While one thread is re-generating
zImage, the other also tries to update zImage before creating uImage
on top of that. zImage is overwritten by the slower thread and then
uImage is created based on the half-written zImage.
This is the reason why "Kernel: arch/arm/boot/zImage is ready" is
displayed twice, and a broken uImage is created.
The same problem could happen on bootpImage.
This commit adds dependencies among Image, zImage, uImage, and
bootpImage to arch/arm/Makefile, which is included from the
top-level Makefile.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The mmap semaphore should not be taken when page faults are disabled.
Since pagefault_disable() no longer disables preemption, we now need
to use faulthandler_disabled() in place of in_atomic().
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Matthew Fortune <Matthew.Fortune@imgtec.com> reports:
The genex.S file appears to mix the case of a macro between its definition and
use. A cut down example of this is below. The macro __build_clear_none has
lower case 'build' but ends up being instantiated with upper case BUILD. Can
this be fixed on master. It has been picked up by the LLVM integrated assembler
which is currently case sensitive. We are likely to fix the assembler as well
but the code is currently inconsistent in the kernel.
.macro __build_clear_none
.endm
.macro __BUILD_HANDLER exception handler clear verbose ext
.align 5
.globl handle_\exception; .align 2; .type handle_\exception, @function; .ent
handle_\exception, 0; handle_\exception: .frame $29, 184, $29
.set noat
.globl handle_\exception\ext; .type handle_\exception\ext, @function;
handle_\exception\ext:
__BUILD_clear_\clear
.endm
.macro BUILD_HANDLER exception handler clear verbose
__BUILD_HANDLER \exception \handler \clear \verbose _int
.endm
BUILD_HANDLER ftlb ftlb none silent
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reported-by: Matthew Fortune <Matthew.Fortune@imgtec.com>