Commit graph

11 commits

Author SHA1 Message Date
Stephane Viau
87ed66c414 drm/msm/mdp5: Update headers (add CTL flush bits)
Some upcoming targets have more bits to set in CTL_FLUSH
registers.

Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-04-01 19:29:36 -04:00
Stephane Viau
de50d351b3 drm/msm/mdp5: Update headers (remove enum mdp5_client_id)
This patch contains the generated header file of the following
change "drm/msm/mdp5: Get SMP client list from mdp5_cfg".

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-04-01 19:29:36 -04:00
Stephane Viau
ba474a02cb drm/msm/mdp5: Update headers (introduce MDP5 domain)
This change contains the generated header file for the following
change "drm/msm/mdp5: Separate MDP5 domain from MDSS domain".

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-04-01 19:29:35 -04:00
Hai Li
81c71ad324 drm/msm/mdp5: Update generated mdp5 header file with DSI support
This change adds the registers in mdp5 ping pong blocks
and split display control registers.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-04-01 19:29:35 -04:00
Stephane Viau
a13cebabc8 drm/msm/mdp5: Update generated header files
Prepare for pipeline operation mode configuration, in particular
for DSI and WB modes.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
[Throw in a #define temporarily to keep things bisectable -Rob]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-04-01 19:29:33 -04:00
Stephane Viau
8a4247d645 drm/msm: update generated headers (add 6th lm.base entry)
Some target have up to 6 layer mixers (LM).
Let the header file access the last LM's base address.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-03-04 18:23:39 -05:00
Rob Clark
8a264743b7 drm/msm: update generated headers
Resync from rnndb database, to pull in register defines for:
 * eDP
 * HDMI/HDCP
 * mdp4/mdp5 YUV support
 * mdp5 hw cursor support

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-02-01 15:30:33 -05:00
Rob Clark
bc00ae02e4 drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16 14:22:42 -05:00
Stephane Viau
3d47fd47f2 drm/msm/mdp5: add support for MDP5 v1.3
MDP5 has several functional blocks (ie: VIG/RGB pipes, LMs, ...).
From one revision to another, these blocks' base addresses might
change due to the number of instances present in the MDP5 hw.
A way of dealing with these offset changes is to introduce
dynamic offsets 'per block'.

This change adds support for the new revision of MDP5: v1.3.
The idea is to define one hw config per MDP version and select
either one of them at runtime, after reading the MDP5 version.

Once the MDP version is known, 'per block' dynamic offsets
are initialized through a global pointer, which is then used for
read/write register access.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04 11:55:30 -04:00
Rob Clark
89301471e6 drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04 11:55:28 -04:00
Rob Clark
facb4f4e7f drm/msm: resync generated headers
resync to latest envytools db, add mdp5 registers

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:38:59 -05:00