Renesas R-Car sound (= rsnd) needs 2 DMAC which are called as
Audio DMAC (= 1st DMAC) and Audio DMAC peri peri (2nd DMAC).
And rsnd had assumed that 1st / 2nd DMACs are implemented as DMAEngine.
But, in result of DMA ML discussion, 2nd DMAC was concluded that it is
not a general purpose DMAC (2nd DMAC is for Device to Device inside
sound system). Additionally, current DMAEngine can't support Device to
Device, and we don't have correct DT bindings for it at this point.
So the easiest solution for it is that move it from DMAEngine to rsnd
driver.
Audio DMAC peri peri DMAEngine is no longer needed.
Remove all CONFIG_RCAR_AUDMAC_PP from ARM defconfigs
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add DMA sound support to r8a7791 and r8a7790 SoCs
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Merge tag 'renesas-dt3-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Third Round of Renesas ARM Based SoC DT Updates for v4.1" from Simon
Horman:
* Add DMA sound support to r8a7791 and r8a7790 SoCs
* tag 'renesas-dt3-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: sound enables Audio DMAC entry on DTSI
ARM: shmobile: r8a7790: sound enables Audio DMAC entry on DTSI
ARM: shmobile: r8a7791: enable Audio DMAC peri peri via sound driver
ARM: shmobile: r8a7790: enable Audio DMAC peri peri via sound driver
ARM: shmobile: r8a7791: add reg-names for sound
ARM: shmobile: r8a7790: add reg-names for sound
Signed-off-by: Olof Johansson <olof@lixom.net>
the gmac on the firefly board. A new board the Popmetal-rk3288 is also
added. And finally the pmic supplies for act8846 based boards are added,
as the act8865/act8846 driver gained supply handling in the regulator tree.
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Merge tag 'v4.1-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.1" from Heiko Stuebner:
This adds and enables the usbphy nodes on the rk3288 boards and enables
the gmac on the firefly board. A new board the Popmetal-rk3288 is also
added. And finally the pmic supplies for act8846 based boards are added,
as the act8865/act8846 driver gained supply handling in the regulator tree.
* tag 'v4.1-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: complete rk3288-evb pmic supplies
ARM: dts: rockchip: add input supplies for the act8846 on Radxa Rock
ARM: dts: add rk3288 PopMetal board
dt-bindings: add root compatible property for PopMetal board
ARM: dts: rockchip: enable gmac on rk3288-firefly
ARM: dts: rockchip: enable usbphy on rk3288-firefly
ARM: dts: rockchip: Enable usb PHY on rk3288-evb board
ARM: dts: rockchip: add rk3288 usb PHY
Signed-off-by: Olof Johansson <olof@lixom.net>
watchdog does not reset after 12 hours and a change to constify and
staticize some smp parts.
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Merge tag 'v4.1-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "ARM: rockchip: soc code changes for 4.1" from Heiko Stuebner:
Some suspend improvements reducing resume time and making sure the
watchdog does not reset after 12 hours and a change to constify and
staticize some smp parts.
* tag 'v4.1-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: disable watchdog during suspend
ARM: rockchip: decrease the wait time for resume
ARM: rockchip: Constify struct regmap_config and staticize local function
Signed-off-by: Olof Johansson <olof@lixom.net>
* Merged the based Qualcomm SCM and SCM boot support
* Cleaned up SCM interface to only expose functional SCM APIs
* Moved Qualcomm SCM code into drivers/firmware
* Updated the SCM APIs for setting cpu cold and warm boot addresses
* Added support for ADM CRCI muxing
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Merge tag 'qcom-soc-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/drivers
Merge "qcom SoC changes for v4.1" from Kumar Gala:
Qualcomm ARM Based SoC Updates for v4.1
* Merged the based Qualcomm SCM and SCM boot support
* Cleaned up SCM interface to only expose functional SCM APIs
* Moved Qualcomm SCM code into drivers/firmware
* Updated the SCM APIs for setting cpu cold and warm boot addresses
* Added support for ADM CRCI muxing
* tag 'qcom-soc-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
soc: qcom: gsbi: Add support for ADM CRCI muxing
firmware: qcom: scm: Support cpu power down through SCM
firmware: qcom: scm: Add qcom_scm_set_warm_boot_addr function
firmware: qcom: scm: Clean cold boot entry to export only the API
firmware: qcom: scm: Move the scm driver to drivers/firmware
ARM: qcom: Prep scm code for move to drivers/firmware
ARM: qcom: Cleanup scm interface to only export what is needed
ARM: qcom: Merge scm and scm boot code together
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add multiplatform support to sh73a0 and its kzm9g board
* Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
* Add PM domain support to multiplatform sh73a0
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Merge tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/multiplatform
Merge "Renesas ARM Based SoC sh73a0 Multiplatform Updates for v4.1" from Simon
Horman:
* Add multiplatform support to sh73a0 and its kzm9g board
* Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
* Add PM domain support to multiplatform sh73a0
* tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
ARM: shmobile: sh73a0: Remove restart callback
ARM: shmobile: sh73a0 dtsi: Add PM domain support
ARM: shmobile: sh73a0: Remove unused sh73a0_add_standard_devices_dt()
ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD node
ARM: shmobile: kzm9g-reference: Remove board C code and DT file
ARM: shmobile: kzm9g dts: Move Ethernet node to BSC
ARM: shmobile: sh73a0 dtsi: Add Bus State Controller node
ARM: shmobile: kzm9g: Build DTS for Multiplatform
ARM: shmobile: kzm9g dts: Sync with kzm9g-reference dts
ARM: shmobile: sh73a0: Add Multiplatform support
ARM: shmobile: sh73a0: Introduce generic setup callback
ARM: shmobile: r8a7794: add SDHI DT support
ARM: shmobile: r8a7790: add ADSP clocks
ARM: shmobile: r8a7791: add ADSP clocks
ARM: shmobile: henninger: add CAN0 DT support
ARM: shmobile: r8a7791: add CAN DT support
ARM: shmobile: r8a7791: add CAN clocks
ARM: shmobile: r8a7790: add CAN DT support
ARM: shmobile: r8a7790: add CAN clocks
ARM: shmobile: emev2-kzm9d dts: Add PFC information for uart1
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Following the introduction of the Marvell Armada 39x support, let's
enable this support by default in multi_v7_defconfig.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <arm@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Use the new tick_suspend/resume_local() and get rid of the
homebrewn implementation of these in the ARM bL switcher. The
check for the cpumask is completely pointless. There is no harm
to suspend a per cpu tick device unconditionally. If that's a
real issue then we fix it proper at the core level and not with
some completely undocumented hacks in some random core code.
Move the tick internals to the core code, now that this nuisance
is gone.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
[ rjw: Rebase, changelog ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/1655112.Ws17YsMfN7@vostro.rjw.lan
Signed-off-by: Ingo Molnar <mingo@kernel.org>
OMAP4, OMAP5 and DRA7 now parse DT entries for control module address spaces,
and set up syscon mappings appropriately. Low level IO init is updated to
remove the legacy control module mappings for these devices also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates the l4_cfg and l4_wkup interconnects for DRA7, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates the l4_cfg and l4_wkup interconnects for OMAP5, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
omap4_ctrl_pad_readl/writel are no longer used by anybody, so remove
these. Syscon / pinctrl should be used to access the padconf area
instead.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
The legacy control module APIs will be gone, thus convert the display
driver to use syscon. This change should eventually be moved to
display driver from the board directory.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Tony Lindgren <tony@atomide.com>
This patch creates an l4_wkup interconnect for AM43xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM nodea as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Pinmux node should be a reference to the base one, not a complete re-write
of it. Having the node like this also prevents modifying the node layout
in the base am4372.dtsi file, which is needed for control module changes.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates an l4_wkup interconnect for AM33xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM node as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates an l4_core interconnect for OMAP3, and moves some
of the generic peripherals under it. System control module nodes are
moved under this new interconnect also, and the SCM clock layout
is changed to use the renamed SCM node as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Tony Lindgren <tony@atomide.com>
This patch creates an l4 / l4-wkup interconnects for omap2420 / omap2430
SoCs, and moves some of the generic peripherals under it. System control
module nodes are moved under this new interconnect also, and the SCM
clock layout is changed to use the new SCM node as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Control module driver needs to support syscon for register accesses, as
the DT hierarchy for control module driver is going to be changed. All
the control module related features will be moved under control module
node, including clocks, pinctrl, and generic configuration register
access. Temporary iomap is still provided very early in the boot for
access while syscon is not yet ready.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
There is no need to read the register with every invocation of the function,
as the value is constant. Thus, cache the value in a static variable.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Some of the TI clock providers will be converted to use syscon, thus
low-level regmap support is needed for the clock drivers also. This
patch adds this support, which can be enabled for individual drivers
in later patches.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
The compatible DT node is now passed with the prm init, so there is no
need to do node matching here again. Added a new flag to the init data
also, to detect default IRQ support for OMAP4. Also, any booting omap4
DT setup always has a PRM node, so there is no need to check against
the special case where it would be missing.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Currently some cpu_is_X checks are used to setup prm_features, however
the same can be accomplished by just passing these flags from the PRM
init data. This is done in preparation to make PRM a separate driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This gets rid of need for some exported driver APIs, and simplifies the
initialization of the CM driver. Done in preparation to make CM a
separate driver. The init data is now also passed to the SoC specific
implementations, allowing future expansion to add feature flags etc.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
PRM device instance offset is now provided through the prm_init_data.
This gets rid of some cpu_is_X / soc_is_X calls from PRM core code,
preparing for PRM to be its own separate driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This gets rid of need for some exported driver APIs, and simplifies the
initialization of the PRM driver. Done in preparation to make PRM a
separate driver. The init data is now also passed to the SoC specific
implementations, allowing future expansion to add feature flags etc.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
On Armada 38x SoCs, under heavy I/O load, the system hangs when CPU
Idle is enabled. Waiting for a solution to this issue, this patch
disables the CPU Idle support for this SoC.
As CPU Hot plug support also uses some of the CPU Idle functions it is
also affected by the same issue. This patch disables it also for the
Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.17 +
Flag all ARMv8 AES helper ciphers as internal ciphers to prevent
them from being called by normal users.
Signed-off-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Flag all NEON bit sliced AES helper ciphers as internal ciphers to
prevent them from being called by normal users.
Signed-off-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Flag all GHASH ARMv8 vmull.p64 helper ciphers as internal ciphers
to prevent them from being called by normal users.
Signed-off-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
As the infrastructure for eventfd has now been merged, report the
ioeventfd capability as being supported.
Signed-off-by: Nikolay Nikolaev <n.nikolaev@virtualopensystems.com>
[maz: grouped the case entry with the others, fixed commit log]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Currently we have struct kvm_exit_mmio for encapsulating MMIO abort
data to be passed on from syndrome decoding all the way down to the
VGIC register handlers. Now as we switch the MMIO handling to be
routed through the KVM MMIO bus, it does not make sense anymore to
use that structure already from the beginning. So we keep the data in
local variables until we put them into the kvm_io_bus framework.
Then we fill kvm_exit_mmio in the VGIC only, making it a VGIC private
structure. On that way we replace the data buffer in that structure
with a pointer pointing to a single location in a local variable, so
we get rid of some copying on the way.
With all of the virtual GIC emulation code now being registered with
the kvm_io_bus, we can remove all of the old MMIO handling code and
its dispatching functionality.
I didn't bother to rename kvm_exit_mmio (to vgic_mmio or something),
because that touches a lot of code lines without any good reason.
This is based on an original patch by Nikolay.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Cc: Nikolay Nikolaev <n.nikolaev@virtualopensystems.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add the DT description for the SGTL5000 found on the Hummingboard Pro
model.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds some not yet defined pinfunctions. It also adds two
comments about mistakes in the i.MX25 reference manual so it is easier
to spot the difference between reference manual and pinfunction
definitions.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
While adding the MSCM interrupt router, all interrupts have been moved
to vfxxx.dtsi again. However, some properties got lost. Readd the
missing interrupt properties.
Fixes: 97e6466ab9d0 ("ARM: dts: vf610: add Miscellaneous System Control
Module (MSCM)")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The Cubox has a recessed button between the HDMI and RJ-45 connectors
that wasn't mapped in the device tree, so I've mapped it to gpio-keys
BTN_0.
Signed-off-by: George Joseph <george.joseph@fairview5.com>
Tested-by: George Joseph <george.joseph@fairview5.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds a new file, tegra124-nyan-blaze-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main device tree file for the Nyan Blaze.
The frequency 528MHz is missing because we don't currently have a timing
configuration that works.
Additionally, only the timings for the ram-code 1 is present as that's
what could be tested currently, though downstream has timings for more
ram-codes.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds a new file, tegra124-nyan-big-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main device tree file for the Nyan Big.
The frequency 528MHz is missing because we don't currently have a timing
configuration that works.
Additionally, only the timings for the ram-code 1 is present as that's
what could be tested currently, though downstream has timings for more
ram-codes.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds a new file, tegra124-jetson-tk1-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main Jetson TK1 device tree.
The data is generated from the V5.0.17 version of the DVFS tables.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds a node for the EMC memory controller. It is always enabled, but only
provides read-only functionality without board-specific timing tables.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Setup pwm lines as follows -
pwm1: In case HummingBoard base carrier; this pin drives through a serial
capacitor the mono out of the audio jack.
In case HummingBoard pro the this pad can be reached by wiring to
C8 capacitors on the board.
pwm2: Setup pwm2 on gpio-1 but leave the default function of the iopad as
a gpio.
The user can change the io pad mux in user space and therefore use
this function on gpio-1 (pin number 7 on the 26 pin header).
pwm3,pwm4: unused
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
[tweaked alias for pwm pinctrl group --rmk]
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
