at91_ioremap_matrix and the at91_matrix.h header are not used anymore, remove
them.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The mach/io.h header on at91 is used to support a nonstandard I/O space
window for the cf card driver. This changes the driver to use pci_ioremap_io
in order to have the standard location, and then removes the custom
mach/io.h.
[alexandre.belloni@free-electrons.com: Added PCI dependency]
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
We should use dt to retrieve the IIM base address.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mx25_clocks_init() is only used to register the clocks for non-dt platforms.
As mx25 has been converted to a dt-only platform, we can safely remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Depend the MXC debug board on machines which actually support it.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It is used for max7310 gpio expandor which is used at imx6qdl
sabreauto board.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Flush data cache, and clean, invalidate and disable the L2 cache before going to suspend.
Restore the L2 cache configuration and re-enable the L2 cache after waking up.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the WFI instruction to make the cpu to the idle state.
In the meanwhile, disable the processor's clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Because the standby mode use the same sram function as the suspend to memory
mode, void (*at91_pm_standby)(void) doesn't need, remove it.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As the file name is renamed, rename the function name at91_slow_clock()
--> at91_pm_suspend_sram_fn(), rename the function handler's name at the
same time.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
[nicolas.ferre@atmel.com: little update of the commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Because the sram function is used for both suspend to memory and the suspend
to standby mode, renaming is more elegant.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
To simply the PM code, the suspend to standby mode uses same sram function
as the suspend to memory mode, running in the internal SRAM, instead of the
respective code for each mode.
For the suspend to standby mode, the master clock doesn't switch to the slow
clock, and PLLA and the main oscillator doesn't turn off as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
To decrease the suspend time, move copying the sram function to the sram
initialization phase, instead of every time go to suspend.
In the meanwhile, substitute fncpy() for memcpy().
If there is no sram allocated for PM, the PM is not supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
To decrease the duplicated code, create the procedure
to contain both activing and exiting the sdram self-refresh mode.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Assume USB PLL and PLL B are already stopped before entering sleep mode.
Removed PLL B from slow clock code, all drivers are supposed to properly
unprepare clocks.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Wenyou.Yang <wenyou.yang@atmel.com>
[nicolas.ferre@atmel.com: remove the warning printed in pm.c]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The slow clock always exists, selecting CONFIG_AT91_SLOW_CLOCK config
is unnecessary for the suspend to memory mode.
For this mode the master clock should always switch to the slow clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
To simply the PM config the CONFIG_AT91_SLOW_CLOCK option will be removed,
so move "select SRAM" from under AT91_SLOW_CLOCK, add "select SRAM if PM"
under SOC_AT91SAM9 and SOC_SAMA5
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The SLOWDOWN_MASTER_CLOCK definition is not used, remove the redundant code.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The semantic patch that fixes this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@r@
type T;
identifier f;
@@
static T f (...) { ... }
@@
identifier r.f;
declarer name EXPORT_SYMBOL;
@@
-EXPORT_SYMBOL(f);
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
Ingo requested this function be renamed to improve readability,
so I've renamed __clocksource_updatefreq_scale() as well as the
__clocksource_updatefreq_hz/khz() functions to avoid
squishedtogethernames.
This touches some of the sh clocksources, which I've not tested.
The arch/arm/plat-omap change is just a comment change for
consistency.
Signed-off-by: John Stultz <john.stultz@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Dave Jones <davej@codemonkey.org.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1426133800-29329-13-git-send-email-john.stultz@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This adds the static vcc_sys regulator to the rk3288-evb, the missing
rk808 supplies from it and all the supplies of the act8846 evb-variant.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Now that we have page aging in Stage-2, it becomes obvious that
we're doing way too much work handling the fault.
The page is not going anywhere (it is still mapped), the page
tables are already allocated, and all we want is to flip a bit
in the PMD or PTE. Also, we can avoid any form of TLB invalidation,
since a page with the AF bit off is not allowed to be cached.
An obvious solution is to have a separate handler for FSC_ACCESS,
where we pride ourselves to only do the very minimum amount of
work.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Until now, KVM/arm didn't care much for page aging (who was swapping
anyway?), and simply provided empty hooks to the core KVM code. With
server-type systems now being available, things are quite different.
This patch implements very simple support for page aging, by clearing
the Access flag in the Stage-2 page tables. On access fault, the current
fault handling will write the PTE or PMD again, putting the Access flag
back on.
It should be possible to implement a much faster handling for Access
faults, but that's left for a later patch.
With this in place, performance in VMs is degraded much more gracefully.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
So far, handle_hva_to_gpa was never required to return a value.
As we prepare to age pages at Stage-2, we need to be able to
return a value from the iterator (kvm_test_age_hva).
Adapt the code to handle this situation. No semantic change.
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
arm_iommu_create_mapping() has size parameter of size_t and
arm_setup_iommu_dma_ops() can take a value higher than that
when this is called from the OF code. So limit the size to
SIZE_MAX.
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> (AMD Seattle)
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Joerg Roedel <joro@8bytes.org>
CC: Grant Likely <grant.likely@linaro.org>
CC: Rob Herring <robh+dt@kernel.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
Since at91_pm_set_standby() will not be used out of the pm.c file,
change its attribute from extern to static, remove its declaration as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Commit 2b0ba96cea ("net: phy: micrel: disable NAND-tree for KSZ8021,
KSZ8031, KSZ8051, KSZ8081") automated the NAND-tree mode deactivation
process, thus making this phy fixup useless.
Remove it along with the associated headers inclusion.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: remove selection of PHYLIB in at91 Kconfig]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
- clock fixes for USB
- compatible string changes for handling USB IP differences
(+ needed AHB matrix syscon)
- fix of a compilation error in PM code
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Merge tag 'at91-fixes3' into at91-4.1-cleanup
Third fixes batch for AT91 on 4.0:
- clock fixes for USB
- compatible string changes for handling USB IP differences
(+ needed AHB matrix syscon)
- fix of a compilation error in PM code
- little fix for !MMU debug: may also help for randconfig
- fix of 2 errors in LCD clock definitions
- in PM code, not writing the key leads to not execute the action
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Merge tag 'at91-fixes2' into at91-4.1-cleanup
Second fixes batch for AT91 on 4.0:
- little fix for !MMU debug: may also help for randconfig
- fix of 2 errors in LCD clock definitions
- in PM code, not writing the key leads to not execute the action
- PM slowclock fixes for DDR and timeouts
- fix some DT entries
- little defconfig updates
- the removal of a harmful watchdog option + its detailed documentation
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Merge tag 'at91-fixes' into at91-4.1-cleanup
First fixes batch for AT91 on 4.0:
- PM slowclock fixes for DDR and timeouts
- fix some DT entries
- little defconfig updates
- the removal of a harmful watchdog option + its detailed documentation
This patch enables irqfd on arm/arm64.
Both irqfd and resamplefd are supported. Injection is implemented
in vgic.c without routing.
This patch enables CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQFD.
KVM_CAP_IRQFD is now advertised. KVM_CAP_IRQFD_RESAMPLE capability
automatically is advertised as soon as CONFIG_HAVE_KVM_IRQFD is set.
Irqfd injection is restricted to SPI. The rationale behind not
supporting PPI irqfd injection is that any device using a PPI would
be a private-to-the-CPU device (timer for instance), so its state
would have to be context-switched along with the VCPU and would
require in-kernel wiring anyhow. It is not a relevant use case for
irqfds.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
On arm/arm64 the VGIC is dynamically instantiated and it is useful
to expose its state, especially for irqfd setup.
This patch defines __KVM_HAVE_ARCH_INTC_INITIALIZED and
implements kvm_arch_intc_initialized.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
CONFIG_HAVE_KVM_IRQCHIP is needed to support IRQ routing (along
with irq_comm.c and irqchip.c usage). This is not the case for
arm/arm64 currently.
This patch unsets the flag for both arm and arm64.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
We can definitely decide at run-time whether to use the GIC and timers
or not, and the extra code and data structures that we allocate space
for is really negligable with this config option, so I don't think it's
worth the extra complexity of always having to define stub static
inlines. The !CONFIG_KVM_ARM_VGIC/TIMER case is pretty much an untested
code path anyway, so we're better off just getting rid of it.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
This implements the GHASH hash algorithm (as used by the GCM AEAD
chaining mode) using the AArch32 version of the 64x64 to 128 bit
polynomial multiplication instruction (vmull.p64) that is part of
the ARMv8 Crypto Extensions.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This implements the ECB, CBC, CTR and XTS asynchronous block ciphers
using the AArch32 versions of the ARMv8 Crypto Extensions for AES.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This implements the SHA-224/256 secure hash algorithm using the AArch32
versions of the ARMv8 Crypto Extensions for SHA2.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This implements the SHA1 secure hash algorithm using the AArch32
versions of the ARMv8 Crypto Extensions for SHA1.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This moves all Kconfig symbols defined in crypto/Kconfig that depend
on CONFIG_ARM to a dedicated Kconfig file in arch/arm/crypto, which is
where the code that implements those features resides as well.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Remove the restart handling hack from the r8a7740 generic multiplatform
case.
Restart on DT-based r8a7740 platforms is now handled through the
R-Mobile reset driver.
This reverts commit 1174c712af ("ARM: shmobile: r8a7740: Add
restart callback").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since commit e042681894 ("ARM: shmobile: r8a7790: Remove legacy
code"), all R-Car Gen2 SoCs are supported by multiplatform kernels only.
As CONFIG_COMMON_CLK is always set for multiplatform kernels, we can
remove related #ifdefs in code specific to R-Car Gen2 SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove the stray closing parenthesis in the config description for the
DEBUG_RCAR_GEN2_SCIF0 option.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since commit 035a61c314 ("clk: Make clk API return per-user struct clk
instances"), clk API users can no longer check if two struct clk
pointers are pointing to the same hardware clock, i.e. struct clk_hw, by
simply comparing two pointers. That's because with the per-user clk
change, a brand new struct clk is created whenever clients try to look
up the clock by calling clk_get() or sister functions like clk_get_sys()
and of_clk_get(). This changes the original behavior where the struct
clk is only created for once when clock driver registers the clock to
CCF in the first place. The net change here is before commit
035a61c314 the struct clk pointer is unique for given hardware
clock, while after the commit the pointers returned by clk lookup calls
become different for the same hardware clock.
That said, the struct clk pointer comparing in the code doesn't work any
more. Call helper function clk_is_match() instead to fix the problem.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
- Add support for a new SoC: Armada 39x
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Merge tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu soc changes for v4.1 (part #1)" from Gregory CLEMENT:
- Add support for a new SoC: Armada 39x
* tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu:
Documentation: arm: update supported Marvell EBU processors
ARM: mvebu: add core support for Armada 39x
devicetree: bindings: add new SMP enable method for Marvell Armada 39x
devicetree: bindings: add DT binding for the Marvell Armada 39x SoC family
- add the new Armada 39x SoC in mvebu_v7_defconfig
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Merge tag 'mvebu-defconfig-4.1' of git://git.infradead.org/linux-mvebu into next/defconfig
Pull "mvebu defconfig changes for v4.1 (part #1)" from Gregory CLEMENT:
- add the new Armada 39x SoC in mvebu_v7_defconfig
* tag 'mvebu-defconfig-4.1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: enable Armada 39x in mvebu_v7_defconfig
- Constify the dt_compat table in DT_MACHINE_START
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Merge tag 'mvebu-cleanup-4.1' of git://git.infradead.org/linux-mvebu into next/cleanup
Pull "mvebu clean-up changes for v4.1 (part #1)" from Gregory CLEMENT:
- Constify the dt_compat table in DT_MACHINE_START
* tag 'mvebu-cleanup-4.1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add __initconst specifiers on DT_MACHINE_START dt_compat tables
- fix SDHCI nodes on Armada 38x
- add Linksys WRT1900AC (Mamba) support (including the Ethernet switch)
- add several fixes and improvement for dove
- enable GPIO fan alarm support for 2Big Network v2
- add several fixes about unit address
- add support for Armada 39x SoC and board
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Merge tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt changes for v4.1 (part #1)" from Gregory CLEMENT:
- fix SDHCI nodes on Armada 38x
- add Linksys WRT1900AC (Mamba) support (including the Ethernet switch)
- add several fixes and improvement for dove
- enable GPIO fan alarm support for 2Big Network v2
- add several fixes about unit address
- add support for Armada 39x SoC and board
* tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add Device Tree files for Armada 39x SoC and board
ARM: mvebu: fix unit address of MPIC nodes
ARM: mvebu: use stdout-path in all armada-*.dts
ARM: mvebu: add serial port aliases on Armada 370/375/38x/XP
ARM: mvebu: remove aliases for Ethernet devices on Armada 370/375/38x/XP
ARM: mvebu: add UART labels to Armada 375
ARM: mvebu: add missing UART labels on Armada 38x
ARM: mvebu: fix usb@ unit address on Armada 38x to match register address
ARM: mvebu: a385-db-ap: Enable the NAND
ARM: ARMADA XP: WRT1900AC: Add support for the Ethernet switch
ARM: Kirkwood: enable GPIO fan alarm support for 2Big Network v2
ARM: mvebu: Fix MPIC unit address
ARM: dts: dove: Add some more common pinctrl settings
ARM: dts: dove: Add node labels for PCIe ports 0 and 1
ARM: dts: dove: Always include gpio and interrupt-controller headers
ARM: dts: dove: Fix uart[23] reg property
ARM: mvebu: add Linksys WRT1900AC (Mamba) support
ARM: mvebu: Add Device Tree description of SDHCI for Armada 388 RD
ARM: mvebu: Update the SDHCI node on Armada 38x
ARM: mvebu: Use macros for interrupt flags on Armada 38x sdhci node
Pull "Broadcom Device Tree changes for 4.1 #1" from Florian Fainelli:
This pull request contains the following Broadcom SoCs Device Tree changes:
- Jonathan adds support for the Broadcom Cygnus BCM958305K board
- Rafal adds support for Netgear R8000 and fixes the default for power LEDs
on Netgear R6250
* tag 'arm-soc/for-4.1/devicetree' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Fix default state of power LEDs on Netgear R6250
ARM: BCM5301X: Add DT for Netgear R8000
ARM: dts: Enable Broadcom Cygnus BCM958305K
