Three compatible strings have been added to the at91_udc driver.
Update the documentation accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The at91_udc driver request 2 clocks, and thus need them to be defined in
the device tree.
Document the clocks and clock-names properties so that everybody use the
correct names.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The SMC registers are used to configure Atmel EBI (External Bus Interface)
to interface with standard memory devices (NAND, NOR, SRAM or specialized
devices like FPGAs).
Declare this memory region as a syscon, so that different drivers can
configure the SMC interface (mostly timing configuration) according to
their need.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be accessed by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Call clk_prepare_enable() and clk_disable_unprepare() for cpu dai
clock and codec dai clock in dai statup and shutdown callbacks. This
to make sure the related clock are enabled when the audio device is
used.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- Add Armada 388 General Purpose Development Board support
- Add Device Tree description of the Armada 388 SoC
- Document the Device Tree binding for the Armada 388 SoC
- a38x: Add missing labels
- a38x: Add more pinctrl functions
- Add Armada 385 Access Point Development Board support
- Add a number of pinctrl functions
- A38x: Remove redundant pinctrl informations
- a38x: Fix node names
- Add support for Seagate BlackArmor NAS220
- kirkwood: enable phy driver for SATA controller on 88f6192
- gpio_poweroff support for Iomega ix2-200
- Use all remaining MTD space foor rootfs of Iomega ix2-200
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Merge tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu: dt for v3.20" from Andrew Lunn:
mvebu dt changes for v3.20 (part #1)
- Add Armada 388 General Purpose Development Board support
- Add Device Tree description of the Armada 388 SoC
- Document the Device Tree binding for the Armada 388 SoC
- a38x: Add missing labels
- a38x: Add more pinctrl functions
- Add Armada 385 Access Point Development Board support
- Add a number of pinctrl functions
- A38x: Remove redundant pinctrl informations
- a38x: Fix node names
- Add support for Seagate BlackArmor NAS220
- kirkwood: enable phy driver for SATA controller on 88f6192
- gpio_poweroff support for Iomega ix2-200
- Use all remaining MTD space foor rootfs of Iomega ix2-200
* tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add Armada 388 General Purpose Development Board support
ARM: mvebu: Add Device Tree description of the Armada 388 SoC
ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
ARM: mvebu: a38x: Add missing labels
ARM: mvebu: a38x: Add more pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: a38x: Fix node names
Kirkwood: add support for Seagate BlackArmor NAS220
ARM: dts: kirkwood: enable phy driver for SATA controller on 88f6192
ARM: dts: add gpio_poweroff support for Iomega ix2-200
ARM: dts: use all remaining MTD space foor rootfs of Iomega ix2-200
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add DT bindings for Renesas R-Mobile and SH-Mobile memory controllers.
Currently memory controller device nodes are used only to reference PM
domains, and prevent these PM domains from being powered down, which
would crash the system.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The new DT properties required for the I2S device node to be referred
as a clock provider and corresponding clock indices definition is added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Addition of a LED Flash class extension entails the need for flash LED
specific device tree properties. The properties being added are:
max-microamp, flash-max-microamp, flash-timeout-microsec.
(cooloney@gmail.com: remove white spaces)
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
The A31s is a stripped down version of the A31, as such it is missing some
pins and some functions on some pins.
The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c
with the missing pins and functions removed.
Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the
prcm pins are identical between the A31 and the A31s.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we have proper support to use the generic phase API in our clock
driver, switch the MMC driver to use it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Instead of having three different clocks for the main MMC clock and the two
phase sub-clocks, which involved having three different drivers sharing the
same register, rework it to have the same single driver registering three
different clocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
This patch adds the Device Tree bindings for the Hisilicon hip04
Ethernet controller, including 100M / 1000M controller.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
- mt8135
- mt8127
- mt6598
For mt6592 only the sysirq support was added.
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Merge tag 'v3.20-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Merge "ARM: mediatek: DT changes for v3.20 (round 1)" from Matthias Brugger:
This adds support for the mediatek sysirq and the uarts for the following SoCs:
- mt8135
- mt8127
- mt6598
For mt6592 only the sysirq support was added.
* tag 'v3.20-next-dts' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: dts: Add uart to Aquaris5
ARM: mediatek: dts: Add uart to mt6589
dt-bindings: add mt6592 compatible string for mediatek sysirq
ARM: mediatek: Add sysirq device node to mt6592 dtsi
ARM: mediatek: dts: Add UART dts for MT8127 and MT8135 boards
DTS: serial: Add bindings document for the Mediatek UARTs
ARM: mediatek: add UART dts for mt8127 and mt8135
ARM: mediatek: Add sysirq in mt6589/mt8135/mt8127 dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes DT vendor-prefixes.txt documentation to reference
isil (NASDAQ symbol and the most used prefix inside the kernel) for
Intersil.
It reverts 7c75c1d5e7 ("dt-bindings: Document deprecated device
vendor name to fix related warning").
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Rob Herring <robh@kernel.org>
AD Holdings design and manufacture IP Camera technology in the UK.
http://www.ad-group.co.uk/
Signed-off-by: Ian Molton <imolton@ad-holdings.co.uk>
Signed-off-by: Rob Herring <robh@kernel.org>
Add vendor prefix for Silicon Mitus. Currently there is binding for
sm5502 extcon driver ("siliconmitus,sm5502-muic").
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
After the Nomadik pin controller was force migrated to generic pin
control bindings, some leftovers in the documentation need to be
cleaned up. The code and device trees are already migrated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Everspin is a vendor of MRAM devices. Add them to the list
of Vendors.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
New bindings document for Altera fpga manager.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
The QEMU open source machine emulator and virtualizer presents firmware
and operating systems running in virtual machines ("guests") with purely
virtual hardware (ie. hardware that has never existed in physical form).
Since QEMU exposes some of these devices in a DTB, it makes sense to
define "qemu" and "virtio" as vendor prefixes.
The qemu definition is from [1], revision 4451 (22:24, 25 November 2014).
The virtio definition is composed from [2] and [3].
[1] http://wiki.qemu.org/Main_Page
[2] http://docs.oasis-open.org/virtio/virtio/v1.0/csprd01/virtio-v1.0-csprd01.html
[3] http://en.wikipedia.org/wiki/OASIS_%28organization%29
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Peter Maydell suggested that we describe new devices / DTB nodes in the
kernel Documentation tree that we expose to arm "virt" guests in QEMU.
Although the kernel is not required to access the fw_cfg interface,
"Documentation/devicetree/bindings/arm" is probably the best central spot
to keep the fw_cfg description in.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Just fix a minor typo about the example path.
Signed-off-by: Kaixu Xia <xiakaixu@huawei.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Current vendor-prefixes.txt already has "ak" prefix for Asahi Kasei Corp
by ae8c4209af2c(of: Add vendor prefix for Asahi Kasei Corp.)
It went through the appropriate review process. But, almost all
Asahi Kasei chip drivers are using "asahi-kasei" prefix today.
(arch/arm/boot/dts/tegra20-seaboard.dts only is using "ak,ak8975",
but there are instances of "asahi-kasei,ak8975" in other dts files.
And drivers/iio/magnetometer/ak8975.c doesn't support "ak,ak8975" prefix)
So, we made a mistake there.
In addition, checkpatch.pl reports WARNING if it is using "asahi-kasei"
prerfix in DT file.
(DT compatible string vendor "asahi-kasei" appears un-documented)
Marking it deprecated and warning with checkpatch is certainly
preferable. So, this patch replace "ak" to "asahi-kasei" in
vendor-prefixes.txt. (and fixup tegra20-seaboard)
OTOH, Asahi Kasei is usually referred to as "AKM", but this patch
doesn't care about it. Because no DT is using that today.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
This patch fixes I2C trivial-devices.txt DT documentation file to
reference isil (NASDAQ symbol and the most used prefix inside the
kernel) for Intersil.
It reverts 7c75c1d5e7 ("dt-bindings: Document deprecated device
vendor name to fix related warning").
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
On Rockchip I2C the controller drops SDA low slightly too soon to meet
the "repeated start" requirements.
>From my own experimentation over a number of rates:
- controller appears to drop SDA at .875x (7/8) programmed clk high.
- controller appears to keep SCL high for 2x programmed clk high.
The first rule isn't enough to meet tSU;STA requirements in
Standard-mode on the system I tested on. The second rule is probably
enough to meet tHD;STA requirements in nearly all cases (especially
after accounting for the first), but it doesn't hurt to account for it
anyway just in case.
Even though the repeated start requirement only need to be accounted
for during a small part of the transfer, we'll adjust the timings for
the whole transfer to meet it. I believe that adjusting the timings
in just the right place to switch things up for repeated start would
require several extra interrupts and that doesn't seem terribly worth
it.
With this change and worst case rise/fall times, I see 100kHz i2c
going to ~85kHz. With slightly optimized rise/fall (800ns / 50ns) I
see i2c going to ~89kHz. Fast-mode isn't affected much because
tSU;STA is shorter relative to tHD;STA there.
As part of this change we needed to account for the SDA falling time.
The specification indicates that this should be the same, but we'll
follow Designware's lead and add a binding. Note that we deviate from
Designware and assign the default SDA falling time to be the same as
the SCL falling time, which is incredibly likely.
Signed-off-by: Doug Anderson <dianders@chromium.org>
[wsa: rebased to i2c/for-next]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The number of clock cycles to be written into the CLKDIV register
that determines the I2C clk high phase includes the rise time.
So to meet the timing requirements defined in the I2C specification
which defines the minimal time SCL has to be high, the rise time
has to taken into account. The same applies to the low phase with
falling time.
In my test on RK3288-Pink2 board, which is not an upstream board yet,
if external pull-up resistor is 4.7K, rise_ns is about 700ns.
So the measured high_ns is about 3900ns, which is less than 4000ns
(the minimum high_ns in I2C specification for Standard-mode).
To fix this bug min_low_ns should include fall time and min_high_ns
should include rise time.
This patch merged the patch from chromium project which can get the
rise and fall times for signals from the device tree. This allows us
to more accurately calculate timings. see:
https://chromium-review.googlesource.com/#/c/232774/
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
[wsa: fixed a typo in the docs]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens
of MARCOs, in each MARCO, there are dozens of hardware modules.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Hao Liu <Hao.Liu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
The Renesas R-Mobile System Controller provides a.o. power management
support, following the generic PM domain bindings in
Documentation/devicetree/bindings/power/power_domain.txt.
For now this supports the R-Mobile A1 (r8a7740) only, but it should be
sufficiently generic to handle other members of the SH-Mobile/R-Mobile
family in the future.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Indicate if gadget driver must use dma for usb transfers.
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Enhance the phy documentation by adding 2 new optional bindings :
- the vbus gpio, which detects usb insertion
- the vbus regulator, which provides current drawn from the usb cable
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Felipe Balbi <balbi@ti.com>
at91sam9rl SoC has an erratum forcing us to toggle the BIAS on USB
suspend/resume events.
This specific handling is only activated when CONFIG_ARCH_AT91SAM9RL is
set and this option is only set when building a non-DT kernel, which is
problematic since non-DT support for at91sam9rl SoC has been removed.
Rework the toggle_bias implementation to attach it to the "at91sam9rl-udc"
compatible string.
Add new compatible strings to avoid executing at91sam9rl erratum handling
on other SoCs.
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Since bd27fa44e1 ("usb: phy: generic: Don't use regulator framework for
RESET line") we no longer model the reset line as a regulator supply, so
adapt the documentation accordingly.
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This driver provides UIO access to memory of a peripheral connected
to the Freescale enhanced local bus controller (eLBC) interface
using the general purpose chip-select mode (GPCM).
Signed-off-by: John Ogness <john.ogness@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Exynos SoC's DT files are using Chipid device nodes, but it's binding
information is missing. This patch adds exynos-chipid binding information.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
we should not be mixing address spaces in the reg property like this driver
currently does. This patch updates the driver, dt docs and also the existing
dt nodes to pass the sysconfig offset in the syscon dt property.
This patch breaks DT compatibility! But this platform is considered WIP,
and is only used by a few developers who are upstreaming support for it.
This change has been done as a single atomic commit to ensure it is
bisectable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the miphy365 phy driver to access sysconfig register offsets via
syscfg dt property.
This is because the reg property should not be mixing address spaces
like it does currently for miphy365. This change then also aligns us
to how other platforms such as keystone and bcm7445 pass there syscon
offsets via DT.
This patch breaks DT compatibility, but this platform is considered WIP,
and is only used by a few developers who are upstreaming support for it.
This change has been done as a single atomic commit to ensure it is
bisectable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the phy driver to not use the reg property to access the sysconfig
register offsets.
This is because other phy's (miphy28, miphy365) have a combination of
memory mapped registers and sysconfig control regs, and we shouldn't
be mixing address spaces in the reg property. In addition we would
ideally like the sysconfig offsets to be passed via DT in a uniform way.
This new method will also allow us to support devices which have sysconfig
registers in different banks more easily and it is also analagous to how
keystone and bcm7745 platforms pass there syscon offsets in DT.
This breaks DT compatibility, but this platform is considered WIP, and
is only used by a few developers who are upstreaming support for it.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add documentation for the devicetree binding for the Zynq pincontroller.
Changes since v1:
- fix typo
- add USB related documentation
- remove 'pinctrl-' prefix for pinctrl sub-nodes
- update documentation to enforce strict separation of pinmux
and pinconf nodes
- update example accordingly
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
After the Nomadik pin controller was force migrated to generic pin
control bindings, some leftovers in the documentation need to be
cleaned up. The code and device trees are already migrated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
UBI needs to know the physical erase block size, even on read-only
devices, since it defines the on-device layout. Use a device-tree
provided value to support previously written UBI on read-only NOR.
UBI also needs a non-zero writebufsize, so we set it to one.
Note: This was implemented because hardware write-protected CFI
NOR cannot be probed for the physical erase block size.
Signed-off-by: Joe Schultz <jschultz@xes-inc.ccom>
Signed-off-by: Aaron Sierra <asierra@xes-inc.ccom>
[Brian: removed unneeded #ifdef, note 'optional' erase-size property]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
