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3 commits

Author SHA1 Message Date
Vineet Gupta
795f455856 ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency) 
L2 cache on ARCHS processors is called SLC (System Level Cache)
For working DMA (in absence of hardware assisted IO Coherency) we need
to manage SLC explicitly when buffers transition between cpu and
controllers.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2015-06-25 06:00:19 +05:30
Vineet Gupta
454bfda9ac ARC: remove the unused platform helpers from dma mapping API 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2015-06-19 18:09:23 +05:30
Vineet Gupta
1162b0701b ARC: I/O and DMA Mappings 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2013-02-15 23:15:54 +05:30