Commit graph

33,915 commits

Author SHA1 Message Date
Nobuhiro Iwamatsu
02ebd32f52 sh: Disable get_dma_error_irq for non-SH4 targets.
dma-sh's get_dma_error_irq() is only used by SH4, as the SH3
doesn't have the DMA Error interrupt.

Disable it out for non-SH4 builds.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16 19:49:01 +09:00
Francesco VIRLINZI
a83c0b739f sh: PMB hibernation support
This implements preliminary suspend/resume support for the PMB.

Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16 19:46:17 +09:00
Nobuhiro Iwamatsu
039a718ebb sh: Revert CONFIG_NR_ONCHIP_DMA_CHANNELS to MAX_DMA_CHANNELS
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16 19:43:08 +09:00
Kuninori Morimoto
4c3f450ba4 sh: Add OHCI USB support for SH7786
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16 19:40:34 +09:00
Stephen Rothwell
a6bc3262c5 sparseirq, powerpc/cell: fix unused variable warning in interrupt.c
This new compiler warning:

   arch/powerpc/platforms/cell/interrupt.c: In function 'handle_iic_irq':
   arch/powerpc/platforms/cell/interrupt.c:240: warning: unused variable 'cpu'

Triggers because the local variable 'cpu' became unused due to commit:

   dee4102: sparseirq: use kstat_irqs_cpu instead

Remove the variable.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: ppc-dev <linuxppc-dev@ozlabs.org>
LKML-Reference: <20090316185256.4a160374.sfr@canb.auug.org.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 09:21:57 +01:00
Ingo Molnar
edb35028e4 Merge branches 'irq/genirq' and 'linus' into irq/core 2009-03-16 09:20:13 +01:00
Hidetoshi Seto
514ec49a5f x86, mce: remove incorrect __cpuinit for intel_init_cmci()
Impact: Bug fix on UP

Referring commit cc3ca22063,
Peter removed __cpuinit annotations for mce_cpu_features()
and its successor functions, which caused troubles on UP
configurations.

However the intel_init_cmci() was introduced after that and
it also has __cpuinit annotation even though it is called from
mce_cpu_features(). Remove the annotation from that function
too.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 09:15:32 +01:00
Ingo Molnar
7243f2145a Merge branches 'tracing/ftrace', 'tracing/syscalls' and 'linus' into tracing/core
Conflicts:
	arch/parisc/kernel/irq.c
2009-03-16 09:12:42 +01:00
Greg Ungerer
a05ef46731 m68k: merge the non-MMU and MMU versions of sigcontext.h
It is trivial to merge the non-MMU and MMU versions of sigcontext.h.
Without a single file "make headers_install" is broken for m68k
(since each of the sub-varients of sigconext.h are not installed).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-03-16 18:00:25 +10:00
Greg Ungerer
9863a0babc m68k: merge the non-MMU and MMU versions of swab.h
It is trivial to merge the non-MMU and MMU versions of swab.h.
Without a single file "make headers_install" is broken for m68k
(since each of the sub-varients of swab.h are not installed).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-03-16 17:54:49 +10:00
Greg Ungerer
f9847004bf m68k: merge the non-MMU and MMU versions of param.h
It is trivial to merge the non-MMU and MMU versions of param.h.
Without a single file "make headers_install" is broken for m68k
(since each of the sub-varients of param.h are not installed).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-03-16 17:52:16 +10:00
Rusty Russell
81f1adf012 cpumask: use mm_cpumask() wrapper: sparc
Makes code futureproof against the impending change to mm->cpu_vm_mask.

It's also a chance to use the new cpumask_ ops which take a pointer
(the older ones are deprecated, but there's no hurry for arch code).

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:40:39 +10:30
Rusty Russell
e9b375120b cpumask: remove dangerous CPU_MASK_ALL_PTR, &CPU_MASK_ALL.: sparc
Impact: cleanup

(Thanks to Al Viro for reminding me of this, via Ingo)

CPU_MASK_ALL is the (deprecated) "all bits set" cpumask, defined as so:

	#define CPU_MASK_ALL (cpumask_t) { { ... } }

Taking the address of such a temporary is questionable at best,
unfortunately 321a8e9d (cpumask: add CPU_MASK_ALL_PTR macro) added
CPU_MASK_ALL_PTR:

	#define CPU_MASK_ALL_PTR (&CPU_MASK_ALL)

Which formalizes this practice.  One day gcc could bite us over this
usage (though we seem to have gotten away with it so far).

So replace everywhere which used &CPU_MASK_ALL or CPU_MASK_ALL_PTR
with the modern "cpu_all_mask" (a real struct cpumask *), and remove
CPU_MASK_ALL_PTR altogether.

Also remove the confusing and deprecated large-NR_CPUS-only
"cpu_mask_all".

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Ingo Molnar <mingo@elte.hu>
Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Mike Travis <travis@sgi.com>
2009-03-16 14:40:38 +10:30
Rusty Russell
cc301d261f cpumask: remove the now-obsoleted pcibus_to_cpumask(): sparc
Impact: reduce stack usage for large NR_CPUS

cpumask_of_pcibus() is the new version.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:40:28 +10:30
Rusty Russell
7b45101d09 cpumask: remove cpu_coregroup_map: sparc
Impact: cleanup

cpu_coregroup_mask is the New Hotness.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:40:25 +10:30
Rusty Russell
ec7c14bde8 cpumask: prepare for iterators to only go to nr_cpu_ids/nr_cpumask_bits.: sparc
Impact: cleanup, futureproof

In fact, all cpumask ops will only be valid (in general) for bit
numbers < nr_cpu_ids.  So use that instead of NR_CPUS in various
places.

This is always safe: no cpu number can be >= nr_cpu_ids, and
nr_cpu_ids is initialized to NR_CPUS at boot.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 14:40:24 +10:30
Rusty Russell
e305cb8f09 cpumask: prepare for iterators to only go to nr_cpu_ids/nr_cpumask_bits.: sparc64
Impact: cleanup, futureproof

In fact, all cpumask ops will only be valid (in general) for bit
numbers < nr_cpu_ids.  So use that instead of NR_CPUS in various
places.

This is always safe: no cpu number can be >= nr_cpu_ids, and
nr_cpu_ids is initialized to NR_CPUS at boot.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 14:40:23 +10:30
Rusty Russell
89229071c0 cpumask: Use accessors code.: sparc64
Impact: use new API

Use the accessors rather than frobbing bits directly.  Most of this is
in arch code I haven't even compiled, but is straightforward.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
2009-03-16 14:40:23 +10:30
Rusty Russell
fe73971cdd cpumask: Use accessors code: sparc
Impact: use new API

Use the accessors rather than frobbing bits directly.  Most of this is
in arch code I haven't even compiled, but it is mostly straightforward.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
2009-03-16 14:40:22 +10:30
Rusty Russell
f46df02a57 cpumask: arch_send_call_function_ipi_mask: sparc
We're weaning the core code off handing cpumask's around on-stack.
This introduces arch_send_call_function_ipi_mask(), and by defining
it, the old arch_send_call_function_ipi is defined by the core code.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:40:22 +10:30
Rusty Russell
fd8e18e9f4 cpumask: Use smp_call_function_many(): sparc64
Impact: Use new API

Change smp_call_function_mask() callers to smp_call_function_many().

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
2009-03-16 14:40:22 +10:30
Rusty Russell
9bc181d8d7 cpumask: Use accessors code.: parisc
Impact: use new API

Use the accessors rather than frobbing bits directly.  Most of this is
in arch code I haven't even compiled, but it is mostly straightforward.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
2009-03-16 14:19:38 +10:30
Rusty Russell
bd071e1a37 cpumask: prepare for iterators to only go to nr_cpu_ids/nr_cpumask_bits.: parisc
Impact: cleanup, futureproof

In fact, all cpumask ops will only be valid (in general) for bit
numbers < nr_cpu_ids.  So use that instead of NR_CPUS in various
places.

This is always safe: no cpu number can be >= nr_cpu_ids, and
nr_cpu_ids is initialized to NR_CPUS at boot.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 14:19:37 +10:30
Rusty Russell
91887a3629 cpumask: arch_send_call_function_ipi_mask: parisc
We're weaning the core code off handing cpumask's around on-stack.
This introduces arch_send_call_function_ipi_mask(), and by defining
it, the old arch_send_call_function_ipi is defined by the core code.

We also take the chance to change send_IPI_mask() and use the new
for_each_cpu() iterator.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:19:37 +10:30
Rusty Russell
5d8c39f68e cpumask: use mm_cpumask() wrapper: ia64
Makes code futureproof against the impending change to mm->cpu_vm_mask.

It's also a chance to use the new cpumask_ ops which take a pointer
(the older ones are deprecated, but there's no hurry for arch code).

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:12:48 +10:30
Rusty Russell
2af51a3f81 cpumask: Use accessors code.: ia64
Impact: use new API

Use the accessors rather than frobbing bits directly.  Most of this is
in arch code I haven't even compiled, but is straightforward.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
2009-03-16 14:12:43 +10:30
Rusty Russell
5dd3c9949a cpumask: prepare for iterators to only go to nr_cpu_ids/nr_cpumask_bits.: ia64
Impact: cleanup, futureproof

In fact, all cpumask ops will only be valid (in general) for bit
numbers < nr_cpu_ids.  So use that instead of NR_CPUS in various
places.

This is always safe: no cpu number can be >= nr_cpu_ids, and
nr_cpu_ids is initialized to NR_CPUS at boot.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 14:12:42 +10:30
Rusty Russell
40fe697a17 cpumask: arch_send_call_function_ipi_mask: ia64
We're weaning the core code off handing cpumask's around on-stack.
This introduces arch_send_call_function_ipi_mask().

We also take the chance to wean send_IPI_mask off the obsolescent
for_each_cpu_mask(): making it take the pointer seemed the most
natural way.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:12:41 +10:30
Rusty Russell
d4e3676dba cpumask: remove the now-obsoleted pcibus_to_cpumask(): ia64
Impact: reduce stack usage for large NR_CPUS

cpumask_of_pcibus() is the new version.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:12:40 +10:30
Rusty Russell
b9d65c0477 cpumask: use mm_cpumask() wrapper: cris
Makes code futureproof against the impending change to mm->cpu_vm_mask.

It's also a chance to use the new cpumask_ ops which take a pointer
(the older ones are deprecated, but there's no hurry for arch code).

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-03-16 14:11:47 +10:30
Rusty Russell
afc6ca01f6 cpumask: Use accessors code.: cris
Impact: use new API

Use the accessors rather than frobbing bits directly.  Most of this is
in arch code I haven't even compiled, but is straightforward.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
2009-03-16 14:11:47 +10:30
Rusty Russell
3e7be3fb40 cpumask: prepare for iterators to only go to nr_cpu_ids/nr_cpumask_bits.: cris
Impact: cleanup, futureproof

In fact, all cpumask ops will only be valid (in general) for bit
numbers < nr_cpu_ids.  So use that instead of NR_CPUS in various
places.

This is always safe: no cpu number can be >= nr_cpu_ids, and
nr_cpu_ids is initialized to NR_CPUS at boot.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2009-03-16 14:11:46 +10:30
Lennert Buytenhek
569106c70e [ARM] mv78xx0: Add Marvell RD-78x00-mASA Reference Design support
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:21:25 -04:00
Nicolas Pitre
698fe13b21 [ARM] Kirkwood: update defconfig
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:09:40 -04:00
Nicolas Pitre
e96c33d9ed [ARM] Kirkwood: SheevaPlug LED support
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:09:09 -04:00
Nicolas Pitre
3ec0d47427 [ARM] Kirkwood: SheevaPlug USB Power Enable setup
Ideally, the default should be set to 0 and let the EHCI driver turn
it on as needed.  This makes USB usable in the mean time.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:08:33 -04:00
Shadi Ammouri
4640fa606b [ARM] Kirkwood: Marvell SheevaPlug support
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:04:54 -04:00
Nicolas Pitre
d6f818f71f Merge commit '305b07680f' into orion/master 2009-03-15 21:41:23 -04:00
Nicolas Pitre
053a96ca11 [ARM] add CONFIG_HIGHMEM option
Here it is... HIGHMEM for the ARM architecture.  :-)

If you don't have enough ram for highmem pages to be allocated and still
want to test this, then the cmdline option "vmalloc=" can be used with
a value large enough to force the highmem threshold down.

Successfully tested on a Marvell DB-78x00-BP Development Board with
2 GB of RAM.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:22 -04:00
Nicolas Pitre
3f973e2216 [ARM] ignore high memory with VIPT aliasing caches
VIPT aliasing caches have issues of their own which are not yet handled.
Usage of discard_old_kernel_data() in copypage-v6.c is not highmem ready,
kmap/fixmap stuff doesn't take account of cache colouring, etc.
If/when those issues are handled then this could be reverted.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:22 -04:00
Nicolas Pitre
3902a15e78 [ARM] xsc3: add highmem support to L2 cache handling code
On xsc3, L2 cache ops are possible only on virtual addresses.  The code
is rearranged so to have a linear progression requiring the least amount
of pte setups in the highmem case.  To protect the virtual mapping so
created, interrupts must be disabled currently up to a page worth of
address range.

The interrupt disabling is done in a way to minimize the overhead within
the inner loop.  The alternative would consist in separate code for
the highmem and non highmem compilation which is less preferable.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:21 -04:00
Nicolas Pitre
1bb772679f [ARM] Feroceon: add highmem support to L2 cache handling code
The choice is between looping over the physical range and performing
single cache line operations, or to map highmem pages somewhere, as
cache range ops are possible only on virtual addresses.

Because L2 range ops are much faster, we go with the later by factoring
the physical-to-virtual address conversion and use a fixmap entry for it
in the HIGHMEM case.

Possible future optimizations to avoid the pte setup cost:

 - do the pte setup for highmem pages only

 - determine a threshold for doing a line-by-line processing on physical
   addresses when the range is small

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:21 -04:00
Nicolas Pitre
58edb51572 [ARM] make page_to_dma() highmem aware
If a machine class has a custom __virt_to_bus() implementation then it
must provide a __arch_page_to_dma() implementation as well which is
_not_ based on page_address() to support highmem.

This patch fixes existing __arch_page_to_dma() and provide a default
implementation otherwise.  The default implementation for highmem is
based on __pfn_to_bus() which is defined only when no custom
__virt_to_bus() is provided by the machine class.

That leaves only ebsa110 and footbridge which cannot support highmem
until they provide their own __arch_page_to_dma() implementation.
But highmem support on those legacy platforms with limited memory is
certainly not a priority.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:21 -04:00
Nicolas Pitre
43377453af [ARM] introduce dma_cache_maint_page()
This is a helper to be used by the DMA mapping API to handle cache
maintenance for memory identified by a page structure instead of a
virtual address.  Those pages may or may not be highmem pages, and
when they're highmem pages, they may or may not be virtually mapped.
When they're not mapped then there is no L1 cache to worry about. But
even in that case the L2 cache must be processed since unmapped highmem
pages can still be L2 cached.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:21 -04:00
Nicolas Pitre
3835f6cb64 [ARM] mem_init(): make highmem pages available for use
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:21 -04:00
Nicolas Pitre
d73cd42893 [ARM] kmap support
The kmap virtual area borrows a 2MB range at the top of the 16MB area
below PAGE_OFFSET currently reserved for kernel modules and/or the
XIP kernel.  This 2MB corresponds to the range covered by 2 consecutive
second-level page tables, or a single pmd entry as seen by the Linux
page table abstraction.  Because XIP kernels are unlikely to be seen
on systems needing highmem support, there shouldn't be any shortage of
VM space for modules (14 MB for modules is still way more than twice the
typical usage).

Because the virtual mapping of highmem pages can go away at any moment
after kunmap() is called on them, we need to bypass the delayed cache
flushing provided by flush_dcache_page() in that case.

The atomic kmap versions are based on fixmaps, and
__cpuc_flush_dcache_page() is used directly in that case.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:20 -04:00
Nicolas Pitre
5f0fbf9eca [ARM] fixmap support
This is the minimum fixmap interface expected to be implemented by
architectures supporting highmem.

We have a second level page table already allocated and covering
0xfff00000-0xffffffff because the exception vector page is located
at 0xffff0000, and various cache tricks already use some entries above
0xffff0000.  Therefore the PTEs covering 0xfff00000-0xfffeffff are free
to be used.

However the XScale cache flushing code already uses virtual addresses
between 0xfffe0000 and 0xfffeffff.

So this reserves the 0xfff00000-0xfffdffff range for fixmap stuff.

The Documentation/arm/memory.txt information is updated accordingly,
including the information about the actual top of DMA memory mapping
region which didn't match the code.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 21:01:20 -04:00
Linus Torvalds
fbd8104c2e Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
  [ARM] Fix virtual to physical translation macro corner cases
  [ARM] update mach-types
  [ARM] 5421/1: ftrace: fix crash due to tracing of __naked functions
  MX1 fix include
  [ARM] 5419/1: ep93xx: fix build warnings about struct i2c_board_info
  [ARM] 5418/1: restore lr before leaving mcount
  ARM: OMAP: board-omap3beagle: set i2c-3 to 100kHz
  ARM: OMAP: Allow I2C bus driver to be compiled as a module
  ARM: OMAP: sched_clock() corrected
  ARM: OMAP: Fix compile error if pm.h is included
  [ARM] orion5x: pass dram mbus data to xor driver
  [ARM] S3C64XX: Fix s3c64xx_setrate_clksrc
  [ARM] S3C64XX: sparse warnings in arch/arm/plat-s3c64xx/irq.c
  [ARM] S3C64XX: sparse warnings in arch/arm/plat-s3c64xx/s3c6400-clock.c
  [ARM] S3C64XX: Fix USB host clock mux list
  [ARM] S3C64XX: Fix name of USB host clock.
  [ARM] S3C64XX: Rename IRQ_UHOST to IRQ_USBH
  [ARM] S3C64XX: Do gpiolib configuration earlier
  [ARM] S3C64XX: Staticise s3c64xx_init_irq_eint()
  [ARM] SMDK6410: Declare iodesc table static
  ...
2009-03-15 13:34:56 -07:00
Dmitry Artamonow
607b067e16 [ARM] 5427/1: h3600: ipaq_model_ops final cleanup
Since now ipaq_model_ops used only for accessing h3600 EGPIOs,
drop it completely and use assign_h3600_egpio() directly.

Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-03-15 20:08:20 +00:00
Dmitry Artamonow
104a416d80 [ARM] 5426/1: h3600: remove clr_h3600_egpio/set_h3600_egpio helpers
Replace all occurences with assign_h3600_egpio.
Also simplify code a bit by replacing couple of if-else
statements with one-line equivalents.

Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-03-15 20:08:18 +00:00