This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds ARCH_S5P64X0 which can support S5P6440 and S5P6450 with
one kernel image. So moved some files of mach-s5p6440 into the new ARCH
directory mach-s5p64x0.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The ebt_ip6.h and ebt_nflog.h headers are not not known to Kbuild and
therefore not installed by make headers_install. Fix that up.
Signed-off-by: Nick Bowler <nbowler@elliptictech.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
This patch introduces a variable "clear_intf" that hold the bits that
should be cleared. Only read-modify-write register if "clear_intf"
is set.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
Use read-modify-write instead of a simple write to change the register
contents, to close existing the race window between the original manual
read and write.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
This patch bases on work done earlier by David Jander.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: David Jander <david@protonic.nl>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
This patch replaces netif_rx() with netif_rx_ni() which has to be used
from the threaded interrupt i.e. process context context.
Thanks to Christian Pellegrin for pointing at the right fix:
481a819914 by Oliver Hartkopp.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
This should be a _restore() instead of a _save().
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is essentially cosmetic. At this point the IRQs are already
disabled because we called spin_lock_irq(&dev->rx_info.lock).
The real bug here was fixed back in 2006 in 3a10ccebe: "[PATCH] lock
validator: fix ns83820.c irq-flags bug". Prior to that patch, it was
a "spin_lock_irq is not nestable" type bug. The 2006 patch changes the
unlock to not re-enable IRQs, which eliminates the potential deadlock.
But this bit was missed. We should change the lock function as well so
it balances nicely.
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Optimize processing in TIPC's bearer shutdown code, including:
1. Remove an unnecessary check to see if TIPC bearer's can exist.
2. Don't release spinlocks before calling a media-specific disabling
routine, since the routine can't sleep.
3. Make bearer_disable() operate directly on a struct bearer, instead
of needlessly taking a name and then mapping that to the struct.
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Reviewed-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
It's completely unused and exporting a static symbol
makes no sense and breaks the build.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
For the Blackfin port, we can use much of the asm-generic/io.h header,
but we still need to declare some of our own versions of functions.
Like the __raw_read* and in/out "string" helpers. So let people do
this easily for many of these funcs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Some systems using this bus sometimes have very basic devices on them
such as regulators. So we need to be loaded even earlier in case the
devices are used by things such as early board init code. Therefore
register in subsys_initcall().
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Currently, if the bits_per_word when doing a transfer is not 8bits, we
always treat it as 16bits when we should actually be returning an error.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the hardware is controlling the CS, there are some SPI options
we are unable to support. So issue a warning in the hopes that the
user will change to a SPI mode where we can support things sanely.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang. So use the nosync variant here.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly. When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.
Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This reduces duplication between the setup/transfer functions and keeps
values cached during setup from overriding values changed on a transfer
basis (like bits_per_word).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang. So use the nosync variant here.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled. So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS. This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS". But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.
To make both work, we introduce an offset define. This represents the
max number of hardware CS values that the SPI peripheral supports. If
the CS is below this limit, we know we can use the hardware CS. If it's
above, we treat it as a GPIO CS. This keeps the CS unique as seen by
the common code and prevents conflicts.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Expand the BIT_CTL defines to use the naming convention of the hardware,
and expand the masks to cover all documented bits.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The driver that we based ours on uses a little extra memory behind the
normal driver state, but we don't. So drop this useless bit of memory.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current structure names are a bit confusing as to what they represent,
so use better names.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than having to look up the same 3 sets of functions at the same
time, just use an ops structure so we only need to set one pointer.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
No point in creating our own version of true/false defines when there is
already a standard stdbool available to us.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The chip ops should always be initialized, so having null fallback
functions are useless.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
As David points out, the cs_change_per_word option isn't standard, nor is
anyone actually using it. So punt all of the dead code considering it
makes up ~10% of the code size.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CS helper functions were toggling both the Flag Enable and the Flag
Value bits, but the Flag Value bit is ignored if the corresponding Flag
Enable bit is cleared. So under high speed transactions, the CS sometimes
would not toggle properly.
Since it makes no sense to toggle the Flag Enable bit dynamically when we
actually want to control the Flag Value, do this when setting up the device
and then only handle toggling of the CS value during runtime.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current behavior in PIO mode is to poll the SPI status registers which
can obviously lead to higher latencies when doing a lot of SPI traffic.
There is a SPI interrupt which can be used instead to signal individual
completion of transactions.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We should make sure the SPI controller is in a sane state in case the
boot loader left it in a crappy state. Such as DMA pending which causes
interrupts to fire on us.
When setting a sane initial state, do not default to slave mode. If we
do, then the SPI peripheral may implicitly take over the SPISS pin which
other things might be using.
For example, the BF533-STAMP uses this pin as a GPIO to control switching
between ethernet and flash. If the SPI peripheral controls the output
state instead, the ethernet is no longer accessible.
URL: http://blackfin.uclinux.org/gf/tracker/5630
Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Anomaly 05000119 states that the DMA_RUN bit with peripherals isn't
reliable. However, the way the driver is currently written (DMA IRQ
callback), we don't need the polling in the first place, so drop it.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Re-order setup() a bit so we don't leak memory/dma/gpio resources upon
errors. Also make sure we don't call kfree() twice on the same object.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Rename shpchp_wq to shpchp_ordered_wq and add non-ordered shpchp_wq
which is used instead of the system workqueue. This is to remove
the use of flush_scheduled_work() which is deprecated and scheduled
for removal.
* With cmwq in place, there's no point in creating workqueues lazily.
Create both shpchp_wq and shpchp_ordered_wq upfront.
* Include workqueue.h from shpchp.h.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Rename pciehp_wq to pciehp_ordered_wq and add non-ordered pciehp_wq
which is used instead of the system workqueue. This is to remove
the use of flush_scheduled_work() which is deprecated and scheduled
for removal.
* With cmwq in place, there's no point in creating workqueues lazily.
Create both pciehp_wq and pciehp_ordered_wq upfront.
* Include workqueue.h from pciehp.h.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
machines. It also updates arch/arm/ Kconfig and Makefile to include for
support ARCH_S5P64X0 with one kernel image.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch moves some initial maps from plat-s5p to machine,
so that can merge mach-s5p6440 and mach-s5p6450.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch moves OneNAND device definitions from mach-s5pv210 to plat-s5p
so that can support it commonly.
Note: S5PC110 and S5PC210 have same OneNAND driver.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
...and make it non-inlined in preparation for the move of most of
cifs_close to it.
Signed-off-by: Jeff Layton <jlayton@redhat.com>
Reviewed-by: Suresh Jayaraman <sjayaraman@suse.de>
Signed-off-by: Steve French <sfrench@us.ibm.com>
