On allocation failure, return early so the main body of the function
doesn't have to be indented as the body of an "if" statement. No
functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Trivial changes to IOV:
1) use new PCI interfaces to simplify IOV implementation
2) fix some reference count related race windows
[bhelgaas: fix virtfn_add() add bus/alloc dev error paths]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Donald Dutile <ddutile@redhat.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Ram Pai <linuxram@us.ibm.com>
The flag pci_bus->is_added is used to guard invocation of
pcibios_fixup_bus(pci_bus). When virtfn_add_bus() is called, the
pci_bus->is_added flag has already been set, so remove the redundant
bus->is_added = 1;
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Donald Dutile <ddutile@redhat.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Ram Pai <linuxram@us.ibm.com>
Make acpi_pci_set_power_state() print the name of the ACPI device
power state the device has been actually put into instead of printing
the name of the requested PCI device power state, which need not be
the same.
[bhelgaas: use ACPI_STATE_D3_COLD (ACPI_STATE_D3 == ACPI_STATE_D3_COLD)]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
There are two tool-stack that can instruct the Xen PCI frontend
and backend to change states: 'xm' (Python code with a daemon),
and 'xl' (C library - does not keep state changes).
With the 'xm', the path to disconnect a single PCI device (xm pci-detach
<guest> <BDF>) is:
4(Connected)->7(Reconfiguring*)-> 8(Reconfigured)-> 4(Connected)->5(Closing*).
The * is for states that the tool-stack sets. For 'xl', it is similar:
4(Connected)->7(Reconfiguring*)-> 8(Reconfigured)-> 4(Connected)
Both of them also tear down the XenBus structure, so the backend
state ends up going in the 3(Initialised) and calls pcifront_xenbus_remove.
When a PCI device is plugged back in (xm pci-attach <guest> <BDF>)
both of them follow the same pattern:
2(InitWait*), 3(Initialized*), 4(Connected*)->4(Connected).
[xen-pcifront ignores the 2,3 state changes and only acts when
4 (Connected) has been reached]
Note that this is for a _single_ PCI device. If there were two
PCI devices and only one was disconnected 'xm' would show the same
state changes.
The problem is that git commit 3d925320e9
("xen/pcifront: Use Xen-SWIOTLB when initting if required") introduced
a mechanism to initialize the SWIOTLB when the Xen PCI front moves to
Connected state. It also had some aggressive seatbelt code check that
would warn the user if one tried to change to Connected state without
hitting first the Closing state:
pcifront pci-0: PCI frontend already installed!
However, that code can be relaxed and we can continue on working
even if the frontend is instructed to be the 'Connected' state with
no devices and then gets tickled to be in 'Connected' state again.
In other words, this 4(Connected)->5(Closing)->4(Connected) state
was expected, while 4(Connected)->.... anything but 5(Closing)->4(Connected)
was not. This patch removes that aggressive check and allows
Xen pcifront to work with the 'xl' toolstack (for one or more
PCI devices) and with 'xm' toolstack (for more than two PCI
devices).
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Cc: stable@vger.kernel.org
[v2: Added in the description about two PCI devices]
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
From Alexander Shiyan, this is a series of cleanups of clps711x, movig it
closer to multiplatform and cleans up a bunch of old code.
* clps711x/soc:
ARM: clps711x: Update defconfig
ARM: clps711x: Add support for SYSCON driver
ARM: clps711x: edb7211: Control LCD backlight via PWM
ARM: clps711x: edb7211: Add support for I2C
ARM: clps711x: Optimize interrupt handling
ARM: clps711x: Add clocksource framework
ARM: clps711x: Replace "arch_initcall" in common code with ".init_early"
ARM: clps711x: Move specific definitions from hardware.h to boards files
ARM: clps711x: p720t: Define PLD registers as GPIOs
ARM: clps711x: autcpu12: Move remaining specific definitions to board file
ARM: clps711x: autcpu12: Special driver for handling memory is removed
ARM: clps711x: autcpu12: Add support for NOR flash
ARM: clps711x: autcpu12: Move LCD DPOT definitions to board file
ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
ARM: clps711x: Remove NEED_MACH_MEMORY_H dependency
ARM: clps711x: Re-add GPIO support
GPIO: clps711x: Add DT support
GPIO: clps711x: Rewrite driver for using generic GPIO code
+ Linux 3.10-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
This renames pci_release_bus_bridge_dev() to pci_release_host_bridge_dev()
and moves it next to pci_alloc_host_bridge(). No functional change.
[bhelgaas: split rename & move out of create/destroy symmetry patch]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
After calling device_register(&bridge->dev), the bridge is reference-
counted, and it is illegal to call kfree() on it except in the release
function.
[bhelgaas: changelog, use put_device() after device_register() failure]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
* pci/betty-aer-v3:
PCI/AER: Reset link for devices below Root Port or Downstream Port
ACPI / APEI: Force fatal AER severity when component has been reset
PCI/AER: Remove "extern" from function declarations
PCI/AER: Move AER severity defines to aer.h
PCI/AER: Set dev->__aer_firmware_first only for matching devices
PCI/AER: Factor out HEST device type matching
PCI/AER: Don't parse HEST table for non-PCIe devices
When a PCIe device reports a fatal error, we reset the link leading
to it. Previously we only did this for devices below Downstream Ports,
not for devices directly below Root Ports.
This patch changes that so we reset the link leading to devices below
Root Ports just like we do for those below Downstream Ports.
[bhelgaas: changelog, keep dev_printk(KERN_DEBUG)]
Signed-off-by: Betty Dall <betty.dall@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The function aer_recover_queue() is a public interface and the
severity argument uses #defines that are in the private header
pci/pcie/aer/aerdrv.h.
This patch moves the #defines from pci/pcie/aer/aerdrv.h to
include/linux/aer.h.
[bhelgaas: split "remove 'extern' from declarations" to another patch]
Signed-off-by: Betty Dall <betty.dall@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Previously, we always updated info->firmware_first, even for HEST entries
that didn't match the device. Therefore, if the last HEST descriptor was
a PCIe structure that didn't match the device, we always cleared
dev->__aer_firmware_first.
Tested-by: Betty Dall <betty.dall@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This factors out the matching of HEST structure type and PCIe device type
to improve readability. No functional change.
Tested-by: Betty Dall <betty.dall@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
AER is a PCIe-only capability, so there's no point in trying to match
a HEST PCIe structure with a non-PCIe device.
Previously, a HEST global AER bridge entry (type 8) could incorrectly
match *any* bridge, even a legacy PCI-PCI bridge, and a non-global
HEST entry could match a legacy PCI device.
Tested-by: Betty Dall <betty.dall@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use the new pci_alloc_dev(bus) to replace the existing using of
alloc_pci_dev(void).
[bhelgaas: drop pci_bus ref later in pci_release_dev()]
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: David Airlie <airlied@linux.ie>
Cc: Neela Syam Kolli <megaraidlinux@lsi.com>
Cc: "James E.J. Bottomley" <JBottomley@parallels.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
PCI devices for SR-IOV virtual functions should only be created/
destroyed by pci_enable_sriov()/pci_disable_sriov() because special
data structures are associated with SR-IOV virtual functions.
So hide hotplug related sysfs interfaces "remove" and "rescan" for
SR-IOV virtual functions, otherwise it may cause memory leakage
and other issues.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Donald Dutile <ddutile@redhat.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Ram Pai <linuxram@us.ibm.com>
Platforms may want to provide architecture-specific functionality when
a PCI device is released. Add a pcibios_release_device() call that
architectures can override to do so.
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Ever since commit 45f035ab9b ("CONFIG_HOTPLUG should be always on"),
it has been basically impossible to build a kernel with CONFIG_HOTPLUG
turned off. Remove all the remaining references to it.
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Doug Thompson <dougthompson@xmission.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Steven Whitehouse <swhiteho@redhat.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The "runtime idle" helper routine, rpm_idle(), currently ignores
return values from .runtime_idle() callbacks executed by it.
However, it turns out that many subsystems use
pm_generic_runtime_idle() which checks the return value of the
driver's callback and executes pm_runtime_suspend() for the device
unless that value is not 0. If that logic is moved to rpm_idle()
instead, pm_generic_runtime_idle() can be dropped and its users
will not need any .runtime_idle() callbacks any more.
Moreover, the PCI, SCSI, and SATA subsystems' .runtime_idle()
routines, pci_pm_runtime_idle(), scsi_runtime_idle(), and
ata_port_runtime_idle(), respectively, as well as a few drivers'
ones may be simplified if rpm_idle() calls rpm_suspend() after 0 has
been returned by the .runtime_idle() callback executed by it.
To reduce overall code bloat, make the changes described above.
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
To add AMD CZ SATA controller device ID of IDE mode.
[bhelgaas: drop pci_ids.h update]
Signed-off-by: Shane Huang <shane.huang@amd.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
The usage of strict_strtoul() is not preferred, because
strict_strtoul() is obsolete. Thus, kstrtoul() should be
used.
[bhelgaas: "#define strict_strtoul kstrtoul", so no functional change]
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
- mvebu
- allow enumeration of devices beyond physical bridges
- remove faking the slot location
- fix status register emulation
depends
- mvebu/pcie
-mvebu/of_pci
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRpP2uAAoJEAi3KVZQDZAean8IAKvwIK5TzLB289GKL26NLgMs
c7FxMseuTLzlc036BU85UhDJ62bjVcUCukWzGhF1YxGGr+46gdJ2/aRZ8cvAz3pu
VDZCFo8V7A9VjoTZZ/MX3bzmdJbtgJD9G9PI69LX1sf+4WqlybVBhR9wFlyh9Zws
iolfLGDpCqDwkI5YH1R3XI6KCcP5P+QC52gXb4Due0lRMULTfDiWUqfJs7nqSAnH
AyM4SjImgXwWNVdKvK73uxbUmfG2pguvN20tq+ox5UHfSIfHOd9Uuj2EIEAC2SE7
eWbr7YV+Ba6fD/2Mfhuia7bCD8LrwrTPz8c7A4Xvjp7tMUW20K53PRAn+W4W6Wo=
=TTX4
-----END PGP SIGNATURE-----
Merge tag 'pcie_bridge-3.11' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper:
mvebu pcie driver (bridge) for v3.11
- mvebu
- allow enumeration of devices beyond physical bridges
- remove faking the slot location
- fix status register emulation
Signed-off-by: Olof Johansson <olof@lixom.net>
* tag 'pcie_bridge-3.11' of git://git.infradead.org/users/jcooper/linux:
pci: mvebu: fix the emulation of the status register
pci: mvebu: allow the enumeration of devices beyond physical bridges
pci: mvebu: no longer fake the slot location of downstream devices
- kirkwood
- enable pcie driver
- migrate boards over to pcie dt init
depends
- mvebu/pcie
- mvebu/of_pci
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRpP1WAAoJEAi3KVZQDZAeItIH/1QVHhqYSpOnXGu4zQHswvIM
SRQoy4hiCJm+yywTnIDJPMQdBKD1vURRRdGWQouNsFoBaHki4v2BBxfBNFoDN+rx
VtECH7F1SbJ/Pb7XLVnswqRXVNqrY5fOY5mW42ALFBT9VxcKoD1FyqCaXfaU9JA4
VQCzR7DjFhr8bppZknQ5ZT/qI66Wj1oNiJtBdItmxT0pVfElvAOV6FHzfMGrrDrM
+v8T8KdFIdmH1Ny5J5KLQSE9qBLqae0vlDNgsfwfh1DY/Lye3rDHqPDKrh7YZjHR
xNc6JU+zEdP3tK1f1jgmjn/giY7HqpAFm46p9k/pF9gsE5SE0L/e0Dh9apOcq24=
=qUyf
-----END PGP SIGNATURE-----
Merge tag 'pcie_kw-3.11' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper:
mvebu pcie driver (kirkwood) for v3.11
- kirkwood
- enable pcie driver
- migrate boards over to pcie dt init
depends
- mvebu/pcie
- mvebu/of_pci
Signed-off-by: Olof Johansson <olof@lixom.net>
* tag 'pcie_kw-3.11' of git://git.infradead.org/users/jcooper/linux:
arm: kirkwood: convert db-88f6281/db-88f6282 to the Device Tree
arm: kirkwood: convert QNAP TS219 to use DT for the PCIe interface
arm: kirkwood: convert ZyXEL NSA310 to use DT for the PCIe interface
arm: kirkwood: convert MPL CEC4 to use DT for the PCIe interface
arm: kirkwood: convert Iomega Iconnect to use DT for the PCIe interface
arm: kirkwood: add SoC-level Device Tree data for PCIe interfaces
arm: kirkwood: move PCIe window init to legacy driver
pci: mvebu: enable driver usage on Kirkwood
- mvebu pcie
- fix return value check in mvebu_pcie_probe()
depends
- mvebu/of_pci
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRpPzyAAoJEAi3KVZQDZAeuf0H/2FsmnLgvJh24z1B1HLuWm52
TYgoORahPsuoP7L2RZBU6n3++UuX4NGbVcagqRDe1Asou0oG0fu6oXbdn0d4avff
hoIuRq3LWhQ6DYaeV34vV8vM8x79HYM7FT92zX7VZKJ6TL6KGSHHSvVKhqWo7y65
++Ogtl5hzjyMzcQo5LoDQ+bqVLZpbfF7D/dreCCzzmlODqCNZGoBeZOwTqyR9kDW
aO65yDcsFIky2YAGz+uT0ItNpAtGzshJU/d6QTHNlvKeae2NjMqv2X7hP4161uQ4
NGyCsm7Aif5WnBQGQsvgCIPnuxTaYaGOSZQLMG7pN7TJQgx0sgF93HmX/gUI/WQ=
=ye72
-----END PGP SIGNATURE-----
Merge tag 'pcie-3.11-2' of git://git.infradead.org/users/jcooper/linux into next/soc
PCI-e driver for mvebu.
* tag 'pcie-3.11-2' of git://git.infradead.org/users/jcooper/linux:
pci: mvebu: fix return value check in mvebu_pcie_probe()
arm: mvebu: PCIe support is now available on mvebu
pci: PCIe driver for Marvell Armada 370/XP systems
clk: mvebu: add more PCIe clocks for Armada XP
clk: mvebu: create parent-child relation for PCIe clocks on Armada 370
of/pci: Add of_pci_parse_bus_range() function
of/pci: Add of_pci_get_devfn() function
of/pci: Provide support for parsing PCI DT ranges property
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 4f535093cf "PCI: Put pci_dev in device tree as early as possible"
moves device registering from pci_bus_add_devices() to pci_device_add().
That causes problems for virtual functions because device_add(&virtfn->dev)
is called before setting the virtfn->is_virtfn flag, which then causes Xen
to report PCI virtual functions as PCI physical functions.
Fix it by setting virtfn->is_virtfn before calling pci_device_add().
[Jiang Liu]: Move the setting of virtfn->is_virtfn ahead further for better
readability and modify changelog.
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org # v3.9+
The following warning was seen on 3.9 when a corrected PCIe error was being
handled by the AER subsystem.
WARNING: at .../drivers/pci/search.c:214 pci_get_dev_by_id+0x8a/0x90()
This occurred because a call to pci_get_domain_bus_and_slot() was added to
cper_print_pcie() to setup for the call to cper_print_aer(). The warning
showed up because cper_print_pcie() is called in an interrupt context and
pci_get* functions are not supposed to be called in that context.
The solution is to move the cper_print_aer() call out of the interrupt
context and into aer_recover_work_func() to avoid any warnings when calling
pci_get* functions.
Signed-off-by: Lance Ortiz <lance.ortiz@hp.com>
Acked-by: Borislav Petkov <bp@suse.de>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Because of the encoding of the "Multiple Message Capable" and "Multiple
Message Enable" fields, a device can only advertise that it's capable of a
power-of-two number of vectors, and the OS can only enable a power-of-two
number.
For example, a device that's limited internally to using 18 vectors would
have to advertise that it's capable of 32. The 14 extra vectors consume
vector numbers and IRQ descriptors even though the device can't actually
use them.
This fix introduces a 'msi_desc::nvec_used' field to address this issue.
When non-zero, it is the actual number of MSIs the device will send, as
requested by the device driver. This value should be used by architectures
to set up and tear down only as many interrupt resources as the device will
actually use.
Note, although the existing 'msi_desc::multiple' field might seem
redundant, in fact it is not. The number of MSIs advertised need not be
the smallest power-of-two larger than the number of MSIs the device will
send. Thus, it is not always possible to derive the former from the
latter, so we need to keep them both to handle this case.
[bhelgaas: changelog, rename to "nvec_used"]
Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Replace deprecated printk(KERN_ERR...) with pr_err() in pci-acpi.c
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The INTx pin should be INIT[ABCD]. Fix the typo "3=INTC".
Signed-off-by: Wang Sheng-Hui <shhuiw@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Here we introduce a new interface to replace alloc_pci_dev():
struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
It takes a "struct pci_bus *" argument, so we can alloc a PCI device
on a target PCI bus, and it acquires a reference on the pci_bus.
We use pci_alloc_dev(NULL) to simplify the old alloc_pci_dev(),
and keep it for a while but mark it as __deprecated.
Holding a reference to the pci_bus ensures that referencing
pci_dev->bus is valid as long as the pci_dev is valid.
[bhelgaas: keep existing "return error early" structure in pci_alloc_dev()]
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
We allow the pci-mvebu driver to be compiled on the Kirkwood platform,
and add the 'marvell,kirkwood-pcie' as a compatible string supported
by the driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The status register of the PCI configuration space of PCI-to-PCI
bridges contain some read-only bits, and so write-1-to-clear bits. So,
the Linux PCI core sometimes writes 0xffff to this status register,
and in the current PCI-to-PCI bridge emulation code of the Marvell
driver, we do take all those 1s being written. Even the read-only bits
are being overwritten.
For now, all the read-only bits should be emulated to have the zero
value.
The other bits, that are write-1-to-clear bits are used to report
various kind of errors, and are never set by the emulated bridge, so
there is no need to support this write-1-to-clear bits mechanism.
As a conclusion, the easiest solution is to simply emulate this status
register by returning zero when read, and ignore the writes to it.
This has two visible effects:
* The devsel is no longer 'unknown' in, i.e
Flags: bus master, 66MHz, user-definable features, ?? devsel, latency 0
becomes:
Flags: bus master, 66MHz, user-definable features, fast devsel, latency 0
in lspci -v.
This was caused by a value of 11b being read for devsel, which is
an invalid value. This 11b value being read was due to a previous
write of 0xffff into the status register.
* The capability list is no longer broken, because we indicate to the
Linux PCI core that we don't have a Capabilities Pointer in the PCI
configuration space of this bridge. The following message is
therefore no longer visible in lspci -v:
Capabilities: [fc] <chain broken>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Until now, the Marvell PCIe driver was only allowing the enumeration
of the devices in the secondary bus of the emulated PCI-to-PCI
bridge. This works fine when a PCIe device is directly connected into
a PCIe slot of the Marvell board.
However, when the device connected in the PCIe slot is a physical PCIe
bridge, beyond which a real PCIe device is connected, it no longer
worked, as the driver was preventing the Linux PCI core from seeing
such devices.
This commit fixes that by ensuring that configuration transactions on
subordinate busses are properly forwarded on the right PCIe interface.
Thanks to this patch, a PCIe card beyond a PCIe bridge, itself beyond
the emulated PCI-to-PCI bridge is properly detected, with the
following layout:
-[0000:00]-+-01.0-[01]----00.0
+-09.0-[02-07]----00.0-[03-07]--+-01.0-[04]--
| +-05.0-[05]--
| +-07.0-[06]--
| \-09.0-[07]----00.0
\-0a.0-[08]----00.0
Where the PCIe interface that sits beyond the emulated PCI-to-PCI
bridge at 09.0 allows to access the secondary bus 02, on which there
is a PCIe bridge that allows to access the 3 to 7 busses, that are
subordinates to this bridge. And on one of this bus (bus 7), there is
one real PCIe device connected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
By default, the Marvell hardware, for each PCIe interface, exhibits
the following devices:
* On slot 0, a "Marvell Memory controller", identical on all PCIe
interfaces, and which isn't useful when the Marvell SoC is the PCIe
root complex (i.e, the normal case when we run Linux on the Marvell
SoC).
* On slot 1, the real PCIe card connected into the PCIe slot of the
board.
So, what the Marvell PCIe driver was doing in its PCI-to-PCI bridge
emulation is that when the Linux PCI core was trying to access the
device in slot 0, we were in fact forwarding the configuration
transaction to the device in slot 1. For all other slots, we were
telling the Linux PCI core that there was no device connected.
However, new versions of bootloaders from Marvell change the default
PCIe configuration, and make the real device appear in slot 0, and the
"Marvell Memory controller" in slot 1.
Therefore, this commit modifies the Marvell PCIe driver to adjust the
PCIe hardware configuration to make sure that this behavior (real
device in slot 0, "Marvell Memory controller" in slot 1) is the one
we'll see regardless of what the bootloader has done. It allows to
remove the little hack that was forwarding configuration transactions
on slot 0 to slot 1, which is nice.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In case of error, function of_clk_get_by_name() returns
ERR_PTR() never returns NULL. The NULL test in the return
value check should be replaced with IS_ERR().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* pci/kevin-bus-to-resource:
PCI: Unset resource if initial BAR value is invalid
PCI: Consolidate calls to pcibios_bus_to_resource() in __pci_read_base()
PCI: Add 0x prefix to BAR register position in __pci_read_base()
The initial BAR value in the following example is invalid:
pci_bus 0000:00: root bus resource [mem 0xa0000000-0xbfffffff] (bus address [0xe0000000-0xffffffff])
pci 0000:01:00.0: reg 10: initial BAR value: 0xa0000000
pci 0000:01:00.0: reg 10: [mem 0xa0000000-0xa000007f 64bit]
bus_to_resource(0xa0000000) yields 0xa0000000 because there's no host
bridge window whose bus address range contains 0xa0000000. But CPU
accesses to 0xa0000000 appear on the bus at 0xe0000000, so they will
not be claimed if the BAR contains 0xa0000000.
If we find a BAR where resource_to_bus(bus_to_resource(A)) != A, we can
work around this problem by reassigning the BAR.
[bhelgaas: changelog, comment]
Reference: https://lkml.kernel.org/r/1368536876-27307-3-git-send-email-haokexin@gmail.com
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Since we will invoke pcibios_bus_to_resource() unconditionally if we
don't goto fail, move it out of if/else wrap. No function change.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
We print the BAR register's position in hexadecimal format, so it
is more readable if 0x prefix is added.
[bhelgaas: keep dev_printk(), not dev_dbg(), so this is always in dmesg]
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
