A number of new dm96xx variants now exist.
Reported-by: Joseph Chang <joseph_chang@davicom.com.tw>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since virtio is an OASIS standard draft now, virtio implementation
discussions are taking place on the virtio-dev OASIS mailing list.
Update MAINTAINERS.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This adds the workaround for erratum 793 as a precaution in case not
every BIOS implements it. This addresses CVE-2013-6885.
Erratum text:
[Revision Guide for AMD Family 16h Models 00h-0Fh Processors,
document 51810 Rev. 3.04 November 2013]
793 Specific Combination of Writes to Write Combined Memory Types and
Locked Instructions May Cause Core Hang
Description
Under a highly specific and detailed set of internal timing
conditions, a locked instruction may trigger a timing sequence whereby
the write to a write combined memory type is not flushed, causing the
locked instruction to stall indefinitely.
Potential Effect on System
Processor core hang.
Suggested Workaround
BIOS should set MSR
C001_1020[15] = 1b.
Fix Planned
No fix planned
[ hpa: updated description, fixed typo in MSR name ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/20140114230711.GS29865@pd.tnic
Tested-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
some missed dt nodes or props for sirf dts for 3.14.
Among them:
- add lost clocks for cphifbg
- add lost bus_width, clock and status for sdhci
- add clock, frequence-voltage table for CPU0
- add lost minigpsrtc device node
- add lost usp1_uart_nostreamctrl pin group for atlas6
- add pin group for USP0 with only RX or TX frame sync
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Merge tag 'sirf-dts-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt
ARM: sirf: dts update for 3.14
From Barry Song:
some missed dt nodes or props for sirf dts for 3.14.
Among them:
- add lost clocks for cphifbg
- add lost bus_width, clock and status for sdhci
- add clock, frequence-voltage table for CPU0
- add lost minigpsrtc device node
- add lost usp1_uart_nostreamctrl pin group for atlas6
- add pin group for USP0 with only RX or TX frame sync
* tag 'sirf-dts-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
ARM: dts: sirf: add lost minigpsrtc device node
ARM: dts: sirf: add clock, frequence-voltage table for CPU0
ARM: dts: sirf: add lost bus_width, clock and status for sdhci
ARM: dts: sirf: add lost clocks for cphifbg
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- a tiny fix for the recent AT91 CCF implementation
- the switch of one platform to DT with board file removal
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Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup
From Nicolas Ferre:
Second cleanup pull-request for 3.14:
- a tiny fix for the recent AT91 CCF implementation
- the switch of one platform to DT with board file removal
* tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91:
ARM: at91: switch Calao QIL-A9260 board to DT
clk: at91: fix pmc_clk_ids data type attriubte
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Fix a memory leak in the ieee802154_add_iface() error handling path.
Detected by Coverity: CID 710490.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at>
Signed-off-by: David S. Miller <davem@davemloft.net>
- Move GPIO2 and GPIO3 to be registered from the core boardfile.
- Update the defconfig.
Defconfig changes:
- Enable GPIOLIB and PL061 for the Versatile.
- Build the Versatile using EABI.
- Enable the new LEDs in the defconfig.
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Merge tag 'versatile-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
From Linus Walleij:
Versatile patches for v3.14:
- Move GPIO2 and GPIO3 to be registered from the core boardfile.
- Update the defconfig.
Defconfig changes:
- Enable GPIOLIB and PL061 for the Versatile.
- Build the Versatile using EABI.
- Enable the new LEDs in the defconfig.
* tag 'versatile-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: versatile: enable LEDs by default
ARM: versatile: build using EABI
ARM: versatile: enable GPIOLIB and PL061 by default
ARM: versatile: update defconfig
ARM: versatile: move GPIO2 and GPIO3 to core
When doing a function/slot/bus reset PCI grabs the device_lock for each
device to block things like suspend and driver probes, but call paths exist
where this lock may already be held. This creates an opportunity for
deadlock. For instance, vfio allows userspace to issue resets so long as
it owns the device(s). If a driver unbind .remove callback races with
userspace issuing a reset, we have a deadlock as userspace gets stuck
waiting on device_lock while another thread has device_lock and waits for
.remove to complete. To resolve this, we can make a version of the reset
interfaces which use trylock. With this, we can safely attempt a reset and
return error to userspace if there is contention.
[bhelgaas: the deadlock happens when A (userspace) has a file descriptor for
the device, and B waits in this path:
driver_detach
device_lock # take device_lock
__device_release_driver
pci_device_remove # pci_bus_type.remove
vfio_pci_remove # pci_driver .remove
vfio_del_group_dev
wait_event(vfio.release_q, !vfio_dev_present) # wait (holding device_lock)
Now B is stuck until A gives up the file descriptor. If A tries to acquire
device_lock for any reason, we deadlock because A is waiting for B to release
the lock, and B is waiting for A to release the file descriptor.]
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Fixes to select missing configuration options, and update of the maintainer
file.
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Merge tag 'sunxi-core-for-3.14-2' of https://github.com/mripard/linux into next/soc
From Maxime Ripard:
Second round of core additions for the Allwinner SoCs
Fixes to select missing configuration options, and update of the maintainer
file.
* tag 'sunxi-core-for-3.14-2' of https://github.com/mripard/linux:
ARM: sunxi: select ARM_PSCI
MAINTAINERS: Update Allwinner sunXi maintainer files
ARM: sunxi: Select RESET_CONTROLLER
ARM: sun6i: Add SMP support for the Allwinner A31
dt-bindings: fix example of allwinner interrupt controller
ARM: sunxi: Register the A31 reset IP in init_time
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
reset: Add Allwinner SoCs Reset Controller Driver
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The Samsung dmaengine ASoC driver is used with two different dmaengine drivers.
The pl80x, which properly supports residue reporting and the pl330, which
reports that it does not support residue reporting. So there is no need to
manually set the NO_RESIDUE flag. This has the advantage that a proper (race
condition free) PCM pointer() implementation is used when the pl80x driver is
used. Also once the pl330 driver supports residue reporting the ASoC PCM driver
will automatically start using it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The pl330 driver properly reports that it does not have residue reporting
support, which means the PCM dmanegine driver is able to figure this out on its
own. So there is no need to set the flag manually. Removing the flag has the
advantage that once the pl330 driver gains support for residue reporting it will
automatically be used by the generic dmaengine PCM driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The dmaengine framework now exposes the granularity with which it is able to
report the transfer residue for a certain DMA channel. Check the granularity in
the generic dmaengine PCM driver and
a) Set the SNDRV_PCM_INFO_BATCH if the granularity is per period or worse.
b) Fallback to the (race condition prone) period counting if the driver does
not support any residue reporting.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Currently we have two different snd_soc_platform_driver structs in the generic
dmaengine PCM driver. One for dmaengine drivers that support residue reporting
and one for those which do not. When registering the PCM component we check
whether the NO_RESIDUE flag is set or not and use the corresponding
snd_soc_platform_driver. This patch modifies the driver to only have one
snd_soc_platform_driver struct where the pointer() callback checks the
NO_RESIDUE flag at runtime. This allows us to set the NO_RESIDUE flag after the
PCM component has been registered. This becomes necessary when querying whether
the dmaengine driver supports residue reporting from the dmaengine driver itself
since the DMA channel might only be requested after the PCM component has been
registered.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The pl330 driver currently does not support residue reporting, so set the
residue granularity to DMA_RESIDUE_GRANULARITY_DESCRIPTOR.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds a new field to the dma_slave_caps struct which indicates the
granularity with which the driver is able to update the residue field of the
dma_tx_state struct. Making this information available to dmaengine users allows
them to make better decisions on how to operate. E.g. for audio certain features
like wakeup less operation or timer based scheduling only make sense and work
correctly if the reported residue is fine-grained enough.
Right now four different levels of granularity are supported:
* DESCRIPTOR: The DMA channel is only able to tell whether a descriptor has
been completed or not, which means residue reporting is not supported by
this channel. The residue field of the dma_tx_state field will always be
0.
* SEGMENT: The DMA channel updates the residue field after each successfully
completed segment of the transfer (For cyclic transfers this is after each
period). This is typically implemented by having the hardware generate an
interrupt after each transferred segment and then the drivers updates the
outstanding residue by the size of the segment. Another possibility is if
the hardware supports SG and the segment descriptor has a field which gets
set after the segment has been completed. The driver then counts the
number of segments without the flag set to compute the residue.
* BURST: The DMA channel updates the residue field after each transferred
burst. This is typically only supported if the hardware has a progress
register of some sort (E.g. a register with the current read/write address
or a register with the amount of bursts/beats/bytes that have been
transferred or still need to be transferred).
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
It's a bug that writing to the platform data directly, for it should
be constant. So just copy it before writing.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
To be consistent with the equivalent option in 'stat', also, for the
same reason, use -D as the one letter alias.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/n/tip-p5yjnopajb3a8x0xha7yl5w8@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
That is how the option summary describes it and so that we can free
--delay to replace --initial-delay and then be consistent with stat's
--delay equivalent option.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/n/tip-f8hd2010uhjl2zzb34hepbmi@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Instead of open-coding the intersecting of two rate masks (and getting slightly
wrong for some of the corner cases) use the new snd_pcm_rate_mask_intersect()
helper function.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
A bit of special care is necessary when creating the intersection of two rate
masks. This comes from the special meaning of the SNDRV_PCM_RATE_CONTINUOUS and
SNDRV_PCM_RATE_KNOT bits, which needs special handling when intersecting two
rate masks. SNDRV_PCM_RATE_CONTINUOUS means the hardware supports all rates in a
specific interval. SNDRV_PCM_RATE_KNOT means the hardware supports a set of
discrete rates specified by a list constraint. For all other cases the supported
rates are specified directly in the rate mask.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
SNDRV_PCM_RATE_CONTINUOUS means that all rates (possibly limited to a certain
interval) are supported. There is no need to manually set other rate bits.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Daniel Glöckner <daniel-gl@gmx.net>
Signed-off-by: Mark Brown <broonie@linaro.org>
SNDRV_PCM_RATE_CONTINUOUS means that all rates (possibly limited to a certain
interval) are supported. There is no need to manually set other rate bits.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
If none of the components (CODEC or CPU DAI) sets a maximum sample rate we'll
end up with the rate_max field of the runtime hardware set to 0. (Note that it
is still possible for the components to constrain the supported sample rates
using other methods, e.g. setting a list constraint) If rate_max is 0 this means
that the sound card doesn't support any rates at all, which is not the desired
result. So initialize rate_max to UINT_MAX. For symmetry reasons also set
rate_min to 0.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The equivalent uapi struct uses __u32 so make the kernel
uses u32 too.
This can prevent some oddities where the limit is
logged/emitted as a negative value.
Convert kstrtol to kstrtouint to disallow negative values.
Signed-off-by: Joe Perches <joe@perches.com>
[eparis: do not remove static from audit_default declaration]
Add pr_fmt to prefix "audit: " to output
Convert printk(KERN_<LEVEL> to pr_<level>
Coalesce formats
Use pr_cont
Move a brace after switch
Signed-off-by: Joe Perches <joe@perches.com>
Using the generic kernel function causes the
object size to increase with gcc 4.8.1.
$ size kernel/audit.o*
text data bss dec hex filename
18577 6079 8436 33092 8144 kernel/audit.o.new
18579 6015 8420 33014 80f6 kernel/audit.o.old
Unsigned...
The clks member of the clk_onecell_data structure should
point to a valid clk array (no NULL entries allowed),
and the clk_num should be equal to the number
of elements in the clks array.
The MSTP driver fails to satisfy the above conditions.
The clks array may contain NULL entries if not all
clock-indices are initialized in the device tree.
Thus, if the clock indices are interleaved we end up
with NULL pointers in-between.
The other problem is the driver uses maximum clock index
as the number of clocks, which is incorrect (less than
the actual number of clocks by 1).
Fix the first issue by pre-setting the whole clks array
with ERR_PTR(-ENOENT) pointers instead of zeros; and
use maximum clkidx + 1 as the number of clocks to fix
the other one.
This should make of_clk_src_onecell_get() return the following:
* valid clk pointers for all clocks registered;
* ERR_PTR(-EINVAL) if (idx >= clk_data->clk_num);
* ERR_PTR(-ENOENT) if the clock at the selected index was not
initialized in the device tree (and was not registered).
Changes in V2:
* removed brackets from the one-line for loop
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Use clkidx when registering MSTP clocks instead of loop counter
since the value is then used to access the specific clock index bit
in the mstp register.
The issue was introduced by the following commit:
f94859c215 "clk: shmobile: Add MSTP clock support"
Changes in V2:
* none
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Gradually, the global qd_lock is being used for less and less.
After this patch it will only be used for the per super block
list whose purpose is to allow syncing of changes back to the
master quota file from the local quota changes file. Fixing
up that process to make it more efficient will be the subject
of a later patch, however this patch removes another barrier
to doing that.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Cc: Abhijith Das <adas@redhat.com>
Quota slot allocation has historically used a vector of pages
and a set of homegrown find/test/set/clear bit functions. Since
the size of the bitmap is likely to be based on the default
qc file size, thats a couple of pages at most. So we ought
to be able to allocate that as a single chunk, with a vmalloc
fallback, just in case of memory fragmentation.
We are then able to use the kernel's own find/test/set/clear
bit functions, rather than rolling our own.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Cc: Abhijith Das <adas@redhat.com>
While investigating a rather strange bit of code in the quota
clean up function, I spotted that the reason for its existence
was that when remounting read only, we were not stopping the
quotad thread, and thus it was possible for it to still have
a reference to some of the quotas in that case.
This patch moves the logd and quota thread start and stop into
the make_fs_rw/ro functions, so that we now stop those threads
when mounted read only.
This means that quotad will always be stopped before we call
the quota clean up function, and we can thus dispose of the
(rather hackish) code that waits for it to give up its
reference on the quotas.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Cc: Abhijith Das <adas@redhat.com>
Prior to this patch, GFS2 kept all the quotas for each
super block in a single linked list. This is rather slow
when there are large numbers of quotas.
This patch introduces a hlist_bl based hash table, similar
to the one used for glocks. The initial look up of the quota
is now lockless in the case where it is already cached,
although we still have to take the per quota spinlock in
order to bump the ref count. Either way though, this is a
big improvement on what was there before.
The qd_lock and the per super block list is preserved, for
the time being. However it is intended that since this is no
longer used for its original role, it should be possible to
shrink the number of items on that list in due course and
remove the requirement to take qd_lock in qd_get.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Cc: Abhijith Das <adas@redhat.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
We recently fixed the writeback of pages prior to performing
direct i/o, however the initial fix was perhaps a bit heavy
handed. There is no need to invalidate pages if the direct i/o
is only a read, since they will be identical to what has been
flushed to disk anyway.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Race conditions are theoretically possible between the MPT PCI device
removal and the generic PCI bus rescan and device removal that can be
triggered via sysfs.
To avoid those race conditions make the MPT PCI code use
pci_stop_and_remove_bus_device_locked().
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Multiple race conditions are possible between the rfkill hotplug in the
asus-wmi and eeepc-laptop drivers and the generic PCI bus rescan and device
removal that can be triggered via sysfs.
To avoid those race conditions make asus-wmi and eeepc-laptop use global
PCI rescan-remove locking around the rfkill hotplug.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Multiple race conditions are possible between PCI hotplug and the generic
PCI bus rescan and device removal that can be triggered via sysfs.
To avoid those race conditions make PCI hotplug use global PCI
rescan-remove locking.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Multiple race conditions are possible between the cardbus PCI device
addition and removal and the generic PCI bus rescan and device removal that
can be triggered via sysfs.
To avoid those race conditions make the cardbus code use global PCI
rescan-remove locking.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Multiple race conditions are possible between the ACPI-based PCI hotplug
(ACPIPHP) and the generic PCI bus rescan and device removal that can be
triggered via sysfs.
To avoid those race conditions make the ACPIPHP code use global PCI
rescan-remove locking.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Multiple race conditions are possible between the addition and removal of
PCI devices during ACPI PCI host bridge hotplug and the generic PCI bus
rescan and device removal that can be triggered via sysfs.
To avoid those race conditions make the ACPI PCI host bridge addition and
removal code use global PCI rescan-remove locking.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
- mvebu
- fix boot hang on Armada XP due to broken i2c offloading in A0 SoC revision
(specifically experienced on some early OpenBlocks AX3-4 boards)
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Merge tag 'mvebu-fixes-3.13' of git://git.infradead.org/linux-mvebu into next/fixes-non-critical
From Jason Cooper:
mvebu late fixes for v3.13
- mvebu
- fix boot hang on Armada XP due to broken i2c offloading in A0 SoC revision
(specifically experienced on some early OpenBlocks AX3-4 boards)
* tag 'mvebu-fixes-3.13' of git://git.infradead.org/linux-mvebu:
i2c: mv64xxx: Document the newly introduced Armada XP A0 compatible
i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs
ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board
ARM: mvebu: Add support to get the ID and the revision of a SoC
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The help text for RANDOMIZE_BASE_MAX_OFFSET was confusing. This has been
clarified, and updated to be an export-only tunable.
Signed-off-by: Kees Cook <keescook@chromium.org>
Link: http://lkml.kernel.org/r/20131210202745.GA2961@www.outflux.net
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>