Rename PIN_CONFIG_INPUT_SCHMITT_DISABLE to
PIN_CONFIG_INPUT_SCHMITT_ENABLE. It's used to make it more generialize.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is a branch of fixes that originally were scheduled for 3.8 but
due to the request from Linus to hold back on all but the most critical
of fixes, we're re-queueing them for 3.9 here.
* fixes-for-3.9:
ARM: dts: imx6: fix fec ptp clock slow 10 time
ARM: highbank: mask cluster id from cpu_logical_map
ARM: scu: mask cluster id from cpu_logical_map
ARM: scu: add empty scu_enable for !CONFIG_SMP
ARM: at91/at91sam9x5.dtsi: fix usart3 TXD
ARM: at91: at91sam9x5: fix usart3 pinctrl name
ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
ARM: dts: fix tick and alarm irq numbers for exynos5440
ARM: dts: fix compatible value for exynos pinctrl
ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440
ARM: S3C24XX: fix uninitialized variable warning
mfd/vexpress: vexpress_sysreg_setup must not be __init
ARM: ux500: Fix u9540 booting issues
arm: mvebu: i2c come back in defconfig
arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
Dove: activate GPIO interrupts in DT
ARM: ux500: add spin_unlock(&master_lock).
ARM: ux500: Disable Power Supply and Battery Management by default
Signed-off-by: Olof Johansson <olof@lixom.net>
This update adds a debugfs interface to modify a pin configuration
for a given state in the pinctrl map. This allows to modify the
configuration for a non-active state, typically sleep state.
This configuration is not applied right away, but only when the state
will be entered.
This solution is mandated for us by HW validation: in order
to test and verify several pin configurations during sleep without
recompiling the software.
Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch removes duplicated line of samsung_pinctrl_register(),
because the number of pins is redundantly assigned twice.
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Make it harder to do mistakes by introducing the actual
defined ABx500 IRQ number into the IRQ cluster definitions.
Deduct cluster offset from the GPIO offset to make each
cluster coherent.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.
The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In its current state the gpio-ab8500 driver looks after some GPIO
lines found on the AB8500 MFD chip. It also controls all of its
own IRQ handling for these GPIOs by inventing some virtual IRQs
and handing those out to sub-devices. There has been quite a bit
of controversy over this and it was a contributing factor to the
driver being marked as BROKEN in Mainline.
The reason for adopting this method was due to added complexity
in the hardware. Unusually, each GPIO has two separate IRQs
associated with it, one for a rising and a different one for a
falling interrupt. Using this method complicates matters further
because the GPIO IRQs are actually sandwiched between a bunch
of IRQs which are handled solely by the AB8500 core driver.
The best way for us to take this forward is to get rid of the
virtual IRQs and only hand out the rising IRQ lines. If a
sub-driver wishes to request a falling interrupt, they can do
so by requesting a rising line in the normal way. They just
have to add IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH, if
they require both in the flags. Then if a falling IRQ is
triggered, the AB8500 core driver will know how to handle the
added complexity accordingly. This should greatly simply things.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augment to keep irq_base for a while (removed later)]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This removes the __init notation from some of the
the exynos 5440 pin controller set-up functions. These
functions are called from probe() and as such may be
discarded before probe() completes.
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The set_mode() and get_mode() functions in the abx500 were
not mirrored, leading to the wrong GPIO control bits being
read out.
Cc: Lee Jones <lee.jones@linaro.org>
Reported-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch will allow the ABX500 Pinctrl driver to be probed when
Device Tree is enabled with an appropriate node contained.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the
GPIO for conversion is passed through as the second argument. If
GPIO13, which is a valid GPIO for IRQ functionality, was received;
it would be rejected by the following guard:
GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */
if (offset >= cluster->start && offset <= cluster->end)
/* Valid GPIO for IRQ use */
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augmented to account for off-by-one problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Prior to this patch abx500_gpio_probe() would return the return-value
of gpiochip_remove() during its error patch regardless of what the
actual failure was. So as long as gpiochip_remove() succeeded, probe()
would look like it succeeded too.
This patch ensures the correct error value is returned and that
mutex_destroy() is invoked if gpiochip_add_pin_range() were to fail.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the pin controller of sunxi chips is represented as a
single bank in the driver.
Since this is neither convenient nor represented that way in the
datasheets, define a custom of_xlate function with the layout
<bank pin flag>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mapping logic inside ltq_pmx_gpio_request_enable() was
broken. This only effected Falcon SoC.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The current code only has a stub for falcon_pinconf_dbg_show.
This patch adds proper functionality.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Falcon driver only defined the pinconf parameters but
did not pass them properly to the underlying api.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On the Falcon SoC the bootleds are located on pins 9->14.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The template falcon.dtsi lists all 6 pad controllers that
can be loaded. Only probe those that have status = "okay";
inside the dts file.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When setting the OpenDrain bit we should really honour the
argument passed inside the devicetree.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While converting the boards inside OpenWrt to OF I noticed
that the we are missing a pinconf parameter to set a pin
to output.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While converting all the boards supported by OpenWrt to OF
I noticed that this feature is missing. Adding it makes the
devicetrees more readable.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The logic of the OD bit was inverted when calling the
pinconf get method.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The XWAY pinctrl driver invalidly uses the port and not the pin
number to work out the registers and bits to be set for the
opendrain and pullup/down resistors.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
the default of_gpio_simple_xlate() will make us fail while getting gpios
bigger than 32 by of_get_named_gpio() or related APIs.
this patch adds a specific of_xlate callback for sirf gpio_chip and fix
the problem.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.
Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Current failure path neglects to mutex_destroy() before returning
an error due to an invalid parameter or an error received from
gpiochip_add(). This patch aims to remedy that behaviour.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch provides some superficial changes to the driver to
aid with readability and maintainability. We're mostly fixing
things like white-space errors, spreading out code which as
been clumped together impeding readability and comment layout,
such as using the new "/**" comment start for function headers
etc. No code semantics were harmed in the making of this patch.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently in the empty abx500_pin_config_get() function, we're
returning -EINVAL, with a comment stating that the reason for the
failure is that the function isn't implemented yet. Well there's
a proper return code for that. If we use it, we can do away with
the comment too, as it would be implied.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BIT() macro provides a simple and easy to read way of
obtaining bit offsets into things like masks and hardware
registers. In this patch we're simply replacing all
instances of '1 << x' with 'bit(x)'.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB8505 sub driver to the ABx5x family.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the Allwinner SoCs variants don't have the same set of pins to
handle, we need to declare the pin ranges available.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
'pinctrl_release' is used only in this file. Hence make it static.
Without this patch we get the following sparse error:
drivers/pinctrl/core.c:815:6: warning:
symbol 'pinctrl_release' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IP responsible for the muxing on the Allwinner SoCs are also
handling the GPIOs on the system. This patch adds the needed driver that
relies on the pinctrl driver for most of its operations.
The number of pins available for GPIOs operations are already declared
in the pinctrl driver, we only need to probe a generic driver to handle
the banks available for each SoC.
This driver has been tested on a A13-Olinuxino.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
nmk_prcm_gpiocr_get_mode is only needed for debugfs output at
the moment, which can be compile-time disabled. Marking
the function __maybe_unused still gives us compile-time
coverage, but avoids a gcc warning.
Without this patch, building nhk8815_defconfig results in:
drivers/pinctrl/pinctrl-nomadik.c:676:12: warning: 'nmk_prcm_gpiocr_get_mode' defined but not used [-Wunused-function]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Functions called from a driver probe() method must not be
marked __init, because they may get called after the
init phase is done, when the device shows up late, or
because of deferred probing.
Without this patch, building exynos_defconfig results in
multiple warnings like:
WARNING: drivers/pinctrl/built-in.o(.text+0x51bc): Section mismatch in reference from the function exynos5440_pinctrl_probe() to the function .init.text:exynos5440_gpiolib_register()
The function exynos5440_pinctrl_probe() references
the function __init exynos5440_gpiolib_register().
This is often because exynos5440_pinctrl_probe lacks a __init
annotation or the annotation of exynos5440_gpiolib_register is wrong.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This moves the instances of the Nomadik pin controller and the
Nomadik GPIO blocks (also handled by the GPIO driver) over to
the device tree. A new compatible string is added to the
pin control driver in the process.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The header file isn't used by arch code anymore. Make it private to the
driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
