We free "dev" then dereference it on the next line.
Cc: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
If ipack_device_register() returns an error, then we returned a freed
pointer. The caller doesn't use it, but it means we return success to
the user instead of returning an error code.
I kind of rewrote the error handling in this function as a cleanup.
Cc: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Since hwmod framework now manages sysconfig context save/restore
there is no more need to touch this register in driver. Hence,
remove restore of sysconfig register in omap_timer_restore_context.
This was causing incorrect context restore of sysconfig register.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently cpu_is_omap3517() actually detects any device in the AM35x
family (3517 and no-SGX version 3505.) To make it more clear what is
being detected, convert the names from 3517 to AM35xx.
This adds a new soc_is_am35xx() which duplicates the cpu_is_omap3517().
In order to avoid cross-tree dependencies with clock-tree changes,
cpu_is_omap3517() is left until the clock changes are merged,
at which point cpu_is_omap3517() will be completely removed.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
[tony@atomide.com: change to use soc_is_omap instead]
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are several checks for AM35x devices done using
if (cpu_is_omap3517() || cpu_is_omap3505())
However, since the 3505 is just a 3517 without an SGX, the 3505 check
is redundant because cpu_is_omap3517() will always be true whenever
cpu_is_omap3505() is true. From <plat/cpu.h>:
#define cpu_is_omap3505() (cpu_is_omap3517() && !omap3_has_sgx())
Therefore, remove the redunant 3505 checks. This helps move towards
removal of SoC detection that depends on specific IP detection.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Slightly more than expected as rc7, but all are reasonablly small fixes.
A few additions of HD-audio fixup entries, a couple of other regression
fixes including a revert, and a few other trivial oneliners.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.18 (GNU/Linux)
iQIcBAABAgAGBQJPq2sLAAoJEGwxgFQ9KSmk4ZMP/jC9XLQpn3Y95+/id/D+54R5
dU4aIQYNo1vheODv9hToN6Zvyd+FrouU7mikKwFnyJ1iuPfsxKrsaY+ifbfqXuQo
L0CuWDnwSDutDf5D3s8G+jg0VQHoYu+Dv7MgLqKs/DGYe3iNZKD34QtgOq0BVio0
9PP6bQCVB48TeTte3b0KD4O8rWBfSreDJj+UEewFy0V81f8P/e/ILJnkPW144FXy
1DaR70wE/1wvhW4GWvc+WGM+iH5mUWLaE49K7wdXqcTgR7XRejG4BjWAJBKEoHVc
o3AmFMTfidMzHokXdU6YgV16I8IXRmlEWFnlEGA5dxVsh0JP0t2d3mIQpcVJMm3E
Gpz5OMSjRvuOcW3wkNWYYgcm+npHtiRcXYKr+azFymsPoTSA0xlDoi7HQsVbMzG+
Jz5AwtsyZcp2BIolLvAJTXmBiHuRHNjHW2huqV+G2OI37A5YZWRIfD2vEF07MxXH
FMRCUEHOMVbRuvZtUnSGbcpdVuSMS2hjwsOdBcO03oPVrc/gp224oQvG2iNxsCHu
iH0s114j1mIYxVZX4dx+sjMyD9h3lVSghNQcz9Z7jShWdJBiQuiIneTd3y0FVbh1
l0Nq9A/oPbIYK9kbSb9z4J13WmXeS7rFYdFSPNJJ7XAKwIsZdqEMbxZM3fLHoi7b
dF95KKVJ7VwCeLjrDVZ4
=7Zz7
-----END PGP SIGNATURE-----
Merge tag 'sound-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"Slightly more than expected as rc7, but all are reasonablly small
fixes. A few additions of HD-audio fixup entries, a couple of other
regression fixes including a revert, and a few other trivial
oneliners."
* tag 'sound-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ASoC: sh: fix migor.c compilation
ALSA: HDA: Lessen CPU usage when waiting for chip to respond
Revert "ALSA: hda - Set codec to D3 forcibly even if not used"
ALSA: hda/realtek - Call alc_auto_parse_customize_define() always after fixup
ALSA: hdsp - Provide ioctl_compat
ALSA: hda/realtek - Add missing CD-input pin for MSI-7350 mobo
ALSA: hda/realtek - Add a fixup for Acer Aspire 5739G
ALSA: echoaudio: Remove incorrect part of assertion
That is what is used in vi and mutt, and as well on the 'annotate'
browser.
Eventually we can have keymappings to make people used to other key
associations more confortable.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Cc: David Ahern <dsahern@gmail.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Namhyung Kim <namhyung@gmail.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/n/tip-fyln9286b8gx5q4n277l0djs@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
compat_sys_sigprocmask reads a smaller signal mask from userspace than
sigprogmask accepts for setting. So the high word of blocked.sig[0]
will be cleared, releasing any potentially blocked RT signal.
This was discovered via userspace code that relies on get/setcontext.
glibc's i386 versions of those functions use sigprogmask instead of
rt_sigprogmask to save/restore signal mask and caused RT signal
unblocking this way.
As suggested by Linus, this replaces the sys_sigprocmask based compat
version with one that open-codes the required logic, including the merge
of the existing blocked set with the new one provided on SIG_SETMASK.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Initialization of irqenable, irqstatus registers is the common
operation done in this function for all OMAP platforms, viz. OMAP1,
OMAP2+. The latter _gpio_rmw()'s which supposedly got introduced
wrongly to take care of OMAP2+ platforms were overwriting initially
programmed OMAP1 value breaking functionality on OMAP1.
Somehow incorrect assumption was made that each _gpio_rmw()'s were
mutually exclusive. On close observation it is found that the first
_gpio_rmw() which is supposedly done to take care of OMAP1 platform
is generic enough and takes care of OMAP2+ platform as well.
Therefore remove the latter _gpio_rmw() to irqenable as they are
redundant now.
Writing to ctrl and debounce_en registers for OMAP2+ platforms are
modified to match the original(pre-cleanup) code where the registers
are initialized with 0. In the cleanup series since we are using
_gpio_rmw(reg, 0, 1), instead of __raw_writel(), we are just reading
and writing the same values to ctrl and debounce_en. This is not an
issue for debounce_en register because it has 0x0 as the default value.
But in the case of ctrl register the default value is 0x2 (GATINGRATIO
= 0x1) so that we end up writing 0x2 instead of intended 0 value.
Therefore changing back to __raw_writel() as this is sufficient for
this case besides simpler to understand.
Also, change irqstatus initalization logic that avoids comparison
with bool, besides making it fit in a single line.
Cc: stable@vger.kernel.org
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Reported-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The amp and caps hashes aren't protected properly for concurrent
accesses. Protect them via a new mutex now.
But it can't be so simple as originally thought: since the update of a
hash table entry itself might trigger the power-up sequence which
again accesses the hash table, we can't cover the whole function
simply via mutex. Thus the update part has to be split from the mutex
and revalidated.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
ia64 build failed like this:
CC init/version.o
LD init/built-in.o
KSYM .tmp_kallsyms1.o
ld: .tmp_kallsyms1.o: linking constant-gp files with non-constant-gp files
ld: failed to merge target specific data of file .tmp_kallsyms1.o
make: *** [vmlinux] Error 1
This was introduced when link of vmlinux was migrated to a script.
Add missing option to as to fix this.
Reported-by: Tony Luck <tony.luck@gmail.com>
Tested-by: Tony Luck <tony.luck@gmail.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Michal Marek <mmarek@suse.cz>
We recently added some glock statistics to GFS2, so this is
a docs update to explain what they all mean. It is based
upon the checkin comment of the patch in question.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
This removes a repeated word and a repeated and incomplete line from two
pinctrl headers.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
THIS_MODULE is NULL only when drbd is compiled as built-in,
so the #ifdef CONFIG_MODULES should be #ifdef MODULE instead.
This fixes the warning:
drivers/block/drbd/drbd_main.c: In function ‘drbd_buildtag’:
drivers/block/drbd/drbd_main.c:4187:24: warning: the comparison will always evaluate as ‘true’ for the address of ‘__this_module’ will never be NULL [-Waddress]
Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com>
Signed-off-by: Philipp Reisner <philipp.reisner@linbit.com>
Signed-off-by: Lars Ellenberg <lars.ellenberg@linbit.com>
We can take advantage that the PCH_IIR is a subordinate register to
reduce one of the required IIR reads, and that we only need to clear
interrupts handled to reduce the writes. And by simply tidying the code
we can reduce the line count and hopefully make it more readable.
v2: Split out the bugfix from the refactoring.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Currently the code re-reads PCH_IIR during the hotplug interrupt
processing. Not only is this a wasted read, but introduces a potential
for handling a spurious interrupt as we then may not clear all the
interrupts processed (since the re-read IIR may contains more interrupts
asserted than we clear using the result of the original read).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The core really wants a struct device to be supplied for regulators and
there's no reason this should be impossible so provide one so complain
if we didn't get one.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
They pollute the global namespace and cause sparse to complain.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
The previous implementation introduced a randomness in the splitting
of the different touches reported by the device. This version is more
robust as we don't rely on hi->input->absbit, but on our own structure.
This also prepares hid-multitouch to better support Win8 devices.
[Jiri Kosina <jkosina@suse.cz>: fix build]
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@enac.fr>
Acked-by: Henrik Rydberg <rydberg@euromail.se>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
It can only be used with a machine driver so the idiomatic thing for
ASoC is to select this driver from the machine driver.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
We setup identity MMU mappings across the entire 4GB of space, which
are permissionless because the domain is set to manager.
This unfortunately allows ARMv6 and later CPUs to speculatively
prefetch from the entire address space, which can cause undesirable
side effects if those regions contain devices.
As we setup the mappings with read/write permission, we can switch
the domain to client mode, and then use the XN bit for ARMv6 and
above to control speculative prefetch to non-RAM areas.
Reported-by: R Sricharan <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Because the place of slabinfo.c changed.So update in slub.txt.
Acked-by: Christoph Lameter <cl@linux.com>
Signed-off-by: majianpeng <majianpeng@gmail.com>
Signed-off-by: Pekka Enberg <penberg@kernel.org>
Inspired by the recent ppgtt regression report, where switching of
dmar only for the gpu seems to fix things completely, I've looked
again at the semaphores+vt-d situation.
Contrary to my earlier testing a few months back my system is now
stable with dmar disabled for the igd, and not only when disabling
dmar completely.
So I'm rather hopeful that all our recent fixes for snb have changed
things for code and it's time to try enabling semaphores again. We've
also had issues with enabling semaphores which are not vt-d related,
but I guess these are all fixed by the autoreport-disabling and lazy
request fix. And there's only one way to find out whether there are
still other issues ...
When I've tried to apply this patch I've noticed that semaphores on
gen6 have already silently been enabled in
commit 2911a35b2e
Author: Ben Widawsky <ben@bwidawsk.net>
Date: Thu Apr 5 14:47:36 2012 -0700
drm/i915: use semaphores for the display plane
Fix this up by only checking whether dmar is enabled on the gfx (not
on the entire system).
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The RSK2+SH7269 board uses the SH7269 processor. It is often
referred to as just rsk7269. NOR Flash, SDRAM, serial, USB Host and
ethernet are working.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is an sh2a device (max 266MHz) with FPU, video display
controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports,
SD and on-chip USB.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Dial back the aggressiveness of the controller lockup detection thread.
Currently it will declare the controller to be locked up if it goes
for 10 seconds with no interrupts and no change in the heartbeat
register. Dial back this to 30 seconds with no heartbeat change, and
also snoop the ioctl path and if a firmware flash command is detected,
dial it back further to 4 minutes until the firmware flash command
completes. The reason for this is that during the firmware flash
operation, the controller apparently doesn't update the heartbeat
register as frequently as it is supposed to, and we can get a false
positive.
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Signed-off-by: Mike Miller <mikem@beardog.cce.hp.com>
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Use spinlocks with finer granularity in the submission and
completion paths to allow concurrent execution for multiple
reply queues. In particular, do not hold a spin lock while
submitting a request to the device, nor during most of the
interrupt handler.
Signed-off-by: Matt Gates <matthew.gates@hp.com>
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Smart Arrays can support multiple reply queues onto which command
completions may be deposited. It can help performance quite a bit
to arrange for command completions to be processed on the same CPU
from which they were submitted to increase the likelihood of cache
hits.
Signed-off-by: Matt Gates <matthew.gates@hp.com>
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This is in order to smooth the way for upcoming changes to allow use of
multiple reply queues for command completions.
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: Matt Gates <matthew.gates@hp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
When aborting a command, the tag is supposed to be
specified as 64-bit little endian. However, some smart
arrays expect the tag of the command to be aborted to be
specified in a strange byte order. How to tell which sort
of Smart Array firmware we're dealing with is not obvious.
However, because of the way we construct our tags, the values
of any outstanding tag when specified with the "strange" byte
order will not collide with the value specified in the correct
order. That means we can safely attempt the abort both ways.
Signed-off-by: Stephen M. Cameron <stephenmcameron@gmail.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Instead of giving up after 3 immediate retries of driver initiated
commands, back off the rate of retries and retry a bunch more times.
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Reviewed-by: Andi Shyti <andi.shyti@gmail.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
