The following bug can be triggered by hot adding and removing a large number of
xen domain0's vcpus repeatedly:
BUG: unable to handle kernel NULL pointer dereference at 0000000000000004 IP: [..] find_busiest_group
PGD 5a9d5067 PUD 13067 PMD 0
Oops: 0000 [#3] SMP
[...]
Call Trace:
load_balance
? _raw_spin_unlock_irqrestore
idle_balance
__schedule
schedule
schedule_timeout
? lock_timer_base
schedule_timeout_uninterruptible
msleep
lock_device_hotplug_sysfs
online_store
dev_attr_store
sysfs_write_file
vfs_write
SyS_write
system_call_fastpath
Last level cache shared mask is built during CPU up and the
build_sched_domain() routine takes advantage of it to setup
the sched domain CPU topology.
However, llc_shared_mask is not released during CPU disable,
which leads to an invalid sched domainCPU topology.
This patch fix it by releasing the llc_shared_mask correctly
during CPU disable.
Yasuaki also reported that this can happen on real hardware:
https://lkml.org/lkml/2014/7/22/1018
His case is here:
==
Here is an example on my system.
My system has 4 sockets and each socket has 15 cores and HT is
enabled. In this case, each core of sockes is numbered as
follows:
| CPU#
Socket#0 | 0-14 , 60-74
Socket#1 | 15-29, 75-89
Socket#2 | 30-44, 90-104
Socket#3 | 45-59, 105-119
Then llc_shared_mask of CPU#30 has 0x3fff80000001fffc0000000.
It means that last level cache of Socket#2 is shared with
CPU#30-44 and 90-104.
When hot-removing socket#2 and #3, each core of sockets is
numbered as follows:
| CPU#
Socket#0 | 0-14 , 60-74
Socket#1 | 15-29, 75-89
But llc_shared_mask is not cleared. So llc_shared_mask of CPU#30
remains having 0x3fff80000001fffc0000000.
After that, when hot-adding socket#2 and #3, each core of
sockets is numbered as follows:
| CPU#
Socket#0 | 0-14 , 60-74
Socket#1 | 15-29, 75-89
Socket#2 | 30-59
Socket#3 | 90-119
Then llc_shared_mask of CPU#30 becomes
0x3fff8000fffffffc0000000. It means that last level cache of
Socket#2 is shared with CPU#30-59 and 90-104. So the mask has
the wrong value.
Signed-off-by: Wanpeng Li <wanpeng.li@linux.intel.com>
Tested-by: Linn Crosetto <linn@hp.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Toshi Kani <toshi.kani@hp.com>
Reviewed-by: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
Cc: <stable@vger.kernel.org>
Cc: David Rientjes <rientjes@google.com>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Steven Rostedt <srostedt@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1411547885-48165-1-git-send-email-wanpeng.li@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Quark x1000 advertises PGE via the standard CPUID method
PGE bits exist in Quark X1000's PTEs. In order to flush
an individual PTE it is necessary to reload CR3 irrespective
of the PTE.PGE bit.
See Quark Core_DevMan_001.pdf section 6.4.11
This bug was fixed in Galileo kernels, unfixed vanilla kernels are expected to
crash and burn on this platform.
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Borislav Petkov <bp@alien8.de>
Cc: <stable@vger.kernel.org>
Link: http://lkml.kernel.org/r/1411514784-14885-1-git-send-email-pure.logic@nexus-software.ie
Signed-off-by: Ingo Molnar <mingo@kernel.org>
With certain kernel configurations, CPU offline consumes more than
100ms during S3.
It's a timing related issue: native_cpu_die() would occasionally fall
into a 100ms sleep when the CPU idle loop thread marked the CPU state
to DEAD too slowly.
What native_cpu_die() does is that it polls the CPU state and waits
for 100ms if CPU state hasn't been marked to DEAD. The 100ms sleep
doesn't make sense and is purely historic.
To avoid such long sleeping, this patch adds a 'struct completion'
to each CPU, waits for the completion in native_cpu_die() and wakes
up the completion when the CPU state is marked to DEAD.
Tested on an Intel Xeon server with 48 cores, Ivybridge and on
Haswell laptops. The CPU offlining cost on these machines is
reduced from more than 100ms to less than 5ms. The system
suspend time is reduced by 2.3s on the servers.
Borislav and Prarit also helped to test the patch on an AMD
machine and a few systems of various sizes and configurations
(multi-socket, single-socket, no hyper threading, etc.). No
issues were seen.
Tested-by: Prarit Bhargava <prarit@redhat.com>
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: srostedt@redhat.com
Cc: toshi.kani@hp.com
Cc: imammedo@redhat.com
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/1409039025-32310-1-git-send-email-tianyu.lan@intel.com
[ Improved a few minor details in the code, cleaned up the changelog. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This patch restructures the memory controller (IMC) uncore PMU support
for client SNB/IVB/HSW processors. The main change is that it can now
cope with more than one PCI device ID per processor model. There are
many flavors of memory controllers for each processor. They have
different PCI device ID, yet they behave the same w.r.t. the memory
controller PMU that we are interested in.
The patch now supports two distinct memory controllers for IVB
processors: one for mobile, one for desktop.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20140917090616.GA11281@quad
Cc: ak@linux.intel.com
Cc: kan.liang@intel.com
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The PCU frequency band filters use 8 bit each in a register.
When setting up the value the shift value was not correctly
scaled, which resulted in all filters except for band 0 to
be zero. Fix the scaling.
This allows to correctly monitor multiple uncore frequency bands.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1409872109-31645-5-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The IvyBridge-EP uncore driver was missing three filter flags:
NC, ISOC, C6 which are useful in some cases. Support them in the same way
as the Haswell EP driver, by allowing to set them and exposing
them in the sysfs formats.
Also fix a typo in a define.
Relies on the Haswell EP driver to be applied earlier.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1409872109-31645-4-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Current code registers PMUs for all possible uncore pci devices.
This is not good because, on some machines, one or more uncore pci
devices can be missing. The missing pci device make corresponding
PMU unusable. Register the PMU only if the uncore device exists.
Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1409872109-31645-3-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The uncore subsystem in Haswell-EP is similar to Sandy/Ivy
Bridge-EP. There are some differences in config register
encoding and pci device IDs. The Haswell-EP uncore also
supports a few new events. Add the Haswell-EP driver to
the snbep split driver.
Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
[ Add missing break. Add imc events. Add cbox nc/isoc/c6. ]
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1409872109-31645-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Use the newly added Broadwell cache event list for Haswell too.
All Haswell and Broadwell events and offcore masks used in these lists
are identical.
However Haswell is very different from the Sandy Bridge
list that was used previously. That fixes a wide range of mis-counting
cache events.
The node events are now only for retired memory events, so prefetching
and speculative memory accesses are not included. They are PEBS
capable now, which makes it much easier to sample for them, plus it's
possible to create address maps with -d.
The prefetch events are gone now. They way the hardware counts
them is very misleading (some prefetches included, others not), so
it seemed best to leave them out.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1409683455-29168-5-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
On Broadwell INST_RETIRED.ALL cannot be used with any period
that doesn't have the lowest 6 bits cleared. And the period
should not be smaller than 128.
Add a new callback to enforce this, and set it for Broadwell.
This is erratum BDM57 and BDM11.
How does this handle the case when an app requests a specific
period with some of the bottom bits set
The apps thinks it is sampling at X occurences per sample, when it is
in fact at X - 63 (worst case).
Short answer:
Any useful instruction sampling period needs to be 4-6 orders
of magnitude larger than 128, as an PMI every 128 instructions
would instantly overwhelm the system and be throttled.
So the +-64 error from this is really small compared to the
period, much smaller than normal system jitter.
Long answer:
<write up by Peter:>
IFF we guarantee perf_event_attr::sample_period >= 128.
Suppose we start out with sample_period=192; then we'll set period_left
to 192, we'll end up with left = 128 (we truncate the lower bits). We
get an interrupt, find that period_left = 64 (>0 so we return 0 and
don't get an overflow handler), up that to 128. Then we trigger again,
at n=256. Then we find period_left = -64 (<=0 so we return 1 and do get
an overflow). We increment with sample_period so we get left = 128. We
fire again, at n=384, period_left = 0 (<=0 so we return 1 and get an
overflow). And on and on.
So while the individual interrupts are 'wrong' we get then with
interval=256,128 in exactly the right ratio to average out at 192. And
this works for everything >=128.
So the num_samples*fixed_period thing is still entirely correct +- 127,
which is good enough I'd say, as you already have that error anyhow.
So no need to 'fix' the tools, al we need to do is refuse to create
INST_RETIRED:ALL events with sample_period < 128.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Maria Dimakopoulou <maria.n.dimakopoulou@gmail.com>
Cc: Mark Davies <junk@eslaf.co.uk>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1409683455-29168-4-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Add Broadwell support for Broadwell Client to perf. This is very
similar to Haswell. It uses a new cache event table, because there
were various changes there.
The constraint list has one new event that needs to be handled over
Haswell.
The PEBS event list is the same, so we reuse Haswell's.
[fengguang.wu: make intel_bdw_event_constraints[] static]
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1409683455-29168-3-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
71 is a Broadwell, not a Haswell. The model number was added
by mistake earlier.
Remove it for now, until it can be re-added later with
real Broadwell support.
In practice it does not cause a lot of issues because the Broadwell
PMU is very similar to Haswell, but some details were wrong,
and it's better to handle it correctly.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Link: http://lkml.kernel.org/r/1409683455-29168-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
I'm getting the spew below when booting with Haswell (Xeon
E5-2699 v3) CPUs and the "Cluster-on-Die" (CoD) feature enabled
in the BIOS. It seems similar to the issue that some folks from
AMD ran in to on their systems and addressed in this commit:
161270fc1f ("x86/smp: Fix topology checks on AMD MCM CPUs")
Both these Intel and AMD systems break an assumption which is
being enforced by topology_sane(): a socket may not contain more
than one NUMA node.
AMD special-cased their system by looking for a cpuid flag. The
Intel mode is dependent on BIOS options and I do not know of a
way which it is enumerated other than the tables being parsed
during the CPU bringup process. In other words, we have to trust
the ACPI tables <shudder>.
This detects the situation where a NUMA node occurs at a place in
the middle of the "CPU" sched domains. It replaces the default
topology with one that relies on the NUMA information from the
firmware (SRAT table) for all levels of sched domains above the
hyperthreads.
This also fixes a sysfs bug. We used to freak out when we saw
the "mc" group cross a node boundary, so we stopped building the
MC group. MC gets exported as the 'core_siblings_list' in
/sys/devices/system/cpu/cpu*/topology/ and this caused CPUs with
the same 'physical_package_id' to not be listed together in
'core_siblings_list'. This violates a statement from
Documentation/ABI/testing/sysfs-devices-system-cpu:
core_siblings: internal kernel map of cpu#'s hardware threads
within the same physical_package_id.
core_siblings_list: human-readable list of the logical CPU
numbers within the same physical_package_id as cpu#.
The sysfs effects here cause an issue with the hwloc tool where
it gets confused and thinks there are more sockets than are
physically present.
Before this patch, there are two packages:
# cd /sys/devices/system/cpu/
# cat cpu*/topology/physical_package_id | sort | uniq -c
18 0
18 1
But 4 _sets_ of core siblings:
# cat cpu*/topology/core_siblings_list | sort | uniq -c
9 0-8
9 18-26
9 27-35
9 9-17
After this set, there are only 2 sets of core siblings, which
is what we expect for a 2-socket system.
# cat cpu*/topology/physical_package_id | sort | uniq -c
18 0
18 1
# cat cpu*/topology/core_siblings_list | sort | uniq -c
18 0-17
18 18-35
Example spew:
...
NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
#2#3#4#5#6#7#8
.... node #1, CPUs: #9
------------[ cut here ]------------
WARNING: CPU: 9 PID: 0 at /home/ak/hle/linux-hle-2.6/arch/x86/kernel/smpboot.c:306 topology_sane.isra.2+0x74/0x90()
sched: CPU #9's mc-sibling CPU #0 is not on the same node! [node: 1 != 0]. Ignoring dependency.
Modules linked in:
CPU: 9 PID: 0 Comm: swapper/9 Not tainted 3.17.0-rc1-00293-g8e01c4d-dirty #631
Hardware name: Intel Corporation S2600WTT/S2600WTT, BIOS GRNDSDP1.86B.0036.R05.1407140519 07/14/2014
0000000000000009 ffff88046ddabe00 ffffffff8172e485 ffff88046ddabe48
ffff88046ddabe38 ffffffff8109691d 000000000000b001 0000000000000009
ffff88086fc12580 000000000000b020 0000000000000009 ffff88046ddabe98
Call Trace:
[<ffffffff8172e485>] dump_stack+0x45/0x56
[<ffffffff8109691d>] warn_slowpath_common+0x7d/0xa0
[<ffffffff8109698c>] warn_slowpath_fmt+0x4c/0x50
[<ffffffff81074f94>] topology_sane.isra.2+0x74/0x90
[<ffffffff8107530e>] set_cpu_sibling_map+0x31e/0x4f0
[<ffffffff8107568d>] start_secondary+0x1ad/0x240
---[ end trace 3fe5f587a9fcde61 ]---
#10#11#12#13#14#15#16#17
.... node #2, CPUs: #18#19#20#21#22#23#24#25#26
.... node #3, CPUs: #27#28#29#30#31#32#33#34#35
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
[ Added LLC domain and s/match_mc/match_die/ ]
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: David Rientjes <rientjes@google.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Toshi Kani <toshi.kani@hp.com>
Cc: brice.goglin@gmail.com
Cc: "H. Peter Anvin" <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/20140918193334.C065EBCE@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The pci_find_bios() function is only ever called from initialization code,
therefore can be marked as such, too. This, in turn, allows marking other
functions called only in this context as well.
The bios32_indirect variable can be marked as __initdata as it is only
referenced from __init functions now.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
The pci_mmcfg_probes[] array is only ever read, therefore make it const.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
The constants in pci_mmcfg_nvidia_mcp55() need to be marked as __initconst
or they will remain in memory after init memory was released.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
According to include/linux/init.h, the __init annotation should be added
immediately before the function name. However, for quite a few functions
in mmconfig-shared.c this is not the case. It's either before the return
type or even in the middle of it. Beside gcc still getting it right, we
should change them to comply to the rules of include/linux/init.h.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
In order to make the APIC access page migratable, stop pinning it in
memory.
And because the APIC access page is not pinned in memory, we can
remove kvm_arch->apic_access_page. When we need to write its
physical address into vmcs, we use gfn_to_page() to get its page
struct, which is needed to call page_to_phys(); the page is then
immediately unpinned.
Suggested-by: Gleb Natapov <gleb@kernel.org>
Signed-off-by: Tang Chen <tangchen@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Currently, the APIC access page is pinned by KVM for the entire life
of the guest. We want to make it migratable in order to make memory
hot-unplug available for machines that run KVM.
This patch prepares to handle this for the case where there is no nested
virtualization, or where the nested guest does not have an APIC page of
its own. All accesses to kvm->arch.apic_access_page are changed to go
through kvm_vcpu_reload_apic_access_page.
If the APIC access page is invalidated when the host is running, we update
the VMCS in the next guest entry.
If it is invalidated when the guest is running, the MMU notifier will force
an exit, after which we will handle everything as in the previous case.
If it is invalidated when a nested guest is running, the request will update
either the VMCS01 or the VMCS02. Updating the VMCS01 is done at the
next L2->L1 exit, while updating the VMCS02 is done in prepare_vmcs02.
Signed-off-by: Tang Chen <tangchen@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Currently, the APIC access page is pinned by KVM for the entire life
of the guest. We want to make it migratable in order to make memory
hot-unplug available for machines that run KVM.
This patch prepares to handle this in generic code, through a new
request bit (that will be set by the MMU notifier) and a new hook
that is called whenever the request bit is processed.
Signed-off-by: Tang Chen <tangchen@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This will be used to let the guest run while the APIC access page is
not pinned. Because subsequent patches will fill in the function
for x86, place the (still empty) x86 implementation in the x86.c file
instead of adding an inline function in kvm_host.h.
Signed-off-by: Tang Chen <tangchen@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
1. We were calling clear_flush_young_notify in unmap_one, but we are
within an mmu notifier invalidate range scope. The spte exists no more
(due to range_start) and the accessed bit info has already been
propagated (due to kvm_pfn_set_accessed). Simply call
clear_flush_young.
2. We clear_flush_young on a primary MMU PMD, but this may be mapped
as a collection of PTEs by the secondary MMU (e.g. during log-dirty).
This required expanding the interface of the clear_flush_young mmu
notifier, so a lot of code has been trivially touched.
3. In the absence of shadow_accessed_mask (e.g. EPT A bit), we emulate
the access bit by blowing the spte. This requires proper synchronizing
with MMU notifier consumers, like every other removal of spte's does.
Signed-off-by: Andres Lagar-Cavilla <andreslc@google.com>
Acked-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Callbacks don't have to do extra computation to learn what the caller
(lvm_handle_hva_range()) knows very well. Useful for
debugging/tracing/printk/future.
Signed-off-by: Andres Lagar-Cavilla <andreslc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
On x86_64, kernel text mappings are mapped read-only with CONFIG_DEBUG_RODATA.
In that case, KVM will fail to patch VMCALL instructions to VMMCALL
as required on AMD processors.
The failure mode is currently a divide-by-zero exception, which obviously
is a KVM bug that has to be fixed. However, picking the right instruction
between VMCALL and VMMCALL will be faster and will help if you cannot upgrade
the hypervisor.
Reported-by: Chris Webb <chris@arachsys.com>
Tested-by: Chris Webb <chris@arachsys.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Avoid open coded calculations for bank MSRs by using well-defined
macros that hide the index of higher bank MSRs.
No semantic changes.
Signed-off-by: Chen Yucong <slaoub@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit 346874c950 ("KVM: x86: Fix CR3 reserved bits") removed non-PAE
reserved bits which were not according to Intel SDM. However, residue was left
in a debug assertion (CR3_NONPAE_RESERVED_BITS). Remove it.
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Guest which sets the PAT CR to invalid value should get a #GP. Currently, if
vmx supports loading PAT CR during entry, then the value is not checked. This
patch makes the required check in that case.
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
In 64-bit mode a #GP should be delivered to the guest "if the code segment
descriptor pointed to by the selector in the 64-bit gate doesn't have the L-bit
set and the D-bit clear." - Intel SDM "Interrupt 13—General Protection
Exception (#GP)".
This patch fixes the behavior of CS loading emulation code. Although the
comment says that segment loading is not supported in long mode, this function
is executed in long mode, so the fix is necassary.
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
A one-line wrapper around kvm_make_request is not particularly
useful. Replace kvm_mmu_flush_tlb() with kvm_make_request().
Signed-off-by: Liang Chen <liangchen.linux@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
- we count KVM_REQ_TLB_FLUSH requests, not actual flushes
(KVM can have multiple requests for one flush)
- flushes from kvm_flush_remote_tlbs aren't counted
- it's easy to make a direct request by mistake
Solve these by postponing the counting to kvm_check_request().
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Liang Chen <liangchen.linux@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Initilization of L2 guest with -cpu host, on L1 guest with -cpu host
triggers:
(qemu) KVM: entry failed, hardware error 0x7
...
nested_vmx_run: VMCS MSR_{LOAD,STORE} unsupported
Nested VMX MSR load/store support is not sufficient to
allow perf for L2 guest.
Until properly fixed, trap CPUID and disable function 0xA.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit fc3a9157d3 ("KVM: X86: Don't report L2 emulation failures to
user-space") disabled the reporting of L2 (nested guest) emulation failures to
userspace due to race-condition between a vmexit and the instruction emulator.
The same rational applies also to userspace applications that are permitted by
the guest OS to access MMIO area or perform PIO.
This patch extends the current behavior - of injecting a #UD instead of
reporting it to userspace - also for guest userspace code.
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
In init_rmode_tss(), there two variables indicating the return
value, r and ret, and it return 0 on error, 1 on success. The function
is only called by vmx_set_tss_addr(), and ret is redundant.
This patch removes the redundant variable, by making init_rmode_tss()
return 0 on success, -errno on failure.
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
The KVM emulator code assumes that the guest virtual address space (in 64-bit)
is 48-bits wide. Fail the KVM_SET_CPUID and KVM_SET_CPUID2 ioctl if
userspace tries to create a guest that does not obey this restriction.
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
A number of people are reporting seeing the "setup_efi_pci() failed!"
error message in what used to be a quiet boot,
https://bugzilla.kernel.org/show_bug.cgi?id=81891
The message isn't all that helpful because setup_efi_pci() can return a
non-success error code for a variety of reasons, not all of them fatal.
Let's drop the return code from setup_efi_pci*() altogether, since
there's no way to process it in any meaningful way outside of the inner
__setup_efi_pci*() functions.
Reported-by: Darren Hart <dvhart@linux.intel.com>
Reported-by: Josh Boyer <jwboyer@fedoraproject.org>
Cc: Ulf Winkelvos <ulf@winkelvos.de>
Cc: Andre Müller <andre.muller@web.de>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Stephen Rothwell's compiler did something amazing: it unrolled a
loop, discovered that one iteration of that loop contained an
always-true test, and emitted a warning that will IMO only serve
to convince people to disable the warning.
That bogus warning caused me to wonder what prompted such an
absurdity from his compiler, and I discovered that the code in
question was, in fact, completely wrong -- I was looking things
up in the wrong array.
This affects 3.16 as well, but the only effect is to screw up
the error checking a bit. vdso2c's output is unaffected.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/53d96ad5.80ywqrbs33ZBCQej%25akpm@linux-foundation.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
* Added APQ8084 dt support for clocks, serial, pinctrl, and IFC6540 board
* Added IPQ8064 dt support for basic SoC and AP148 board
* Added APQ8064 dt support for pinctrl, reset, SDHC, and multimedia clocks
* Added PMIC 8058 dt support on MSM8660, enables PMIC based power key,
keypad, rtc, and vibrator
* Added PMIC 8921 dt support on MSM8960, enables PMIC based power key,
keypad, and rtc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: GPGTools - https://gpgtools.org
iQIcBAABCgAGBQJUE0thAAoJEF9hYXeAcXzB1LcQAJNWsOLCGdq966OZDs6gC78k
+aCfW4EtoqgzC3auNVkgeAhz35p0GkmNTMBOoEpAH1UF7lavUM3v7EpKr29b2iKw
tcfcvYddgHcfXuVVoR+QE/cf8Z36utQN5fdEJgmwWD4RQJGdfXrSP1dZQ7PVMCt+
LIVMEdD70Jc404FqQnUW0jLG9f7vOyM62HcuDGjh7l1HHA0I36476zFGlTzym+tn
NrNJV1BZHcCgIq2iVUMyCj+rlB4QTrNd8xLwddA3vV02xgyFmpWVEnX0MJVACpwl
uIRWZe3IlNSdMsEE0mAHBjuuyjdDtnR52V7OEepd8XqA9js4RwltlFIpeXysVEcq
e8yzpAY4AgXy11oKWPH0zR9ErpxKr/VWXEuB+XW3oqgFs9t29GcCttf6zXwOdtIf
p958ARd3KfPVFcSr3OHsqWXLBBI9IKoS42v8KLZ8k54WBg4Pc/pcsDSvOAu65D5o
CTF/ECfBOHGnrbXmFWIIprLWsbakEzbknb8OuETP44h1FNEWZJIak3HusWKhJLSQ
OBnI9/jPTGeKYepb0Zf5ZoRfZ55oAfa8Jx1YJEjzcfIuIPfogD3EACtElQa3wwhO
MowBggkdc6HxEdCc98qHPlvQtMUjTzC0MteII0/M+/ZPvXHSEzFp1NAGZwoj1y4Y
6UMGNmhnRBv83NKqo2lE
=L0k9
-----END PGP SIGNATURE-----
Merge tag 'qcom-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "qcom DT changes for v3.18" from Kumar Gala:
Qualcomm ARM Based Device Tree Updates for v3.18
* Added APQ8084 dt support for clocks, serial, pinctrl, and IFC6540 board
* Added IPQ8064 dt support for basic SoC and AP148 board
* Added APQ8064 dt support for pinctrl, reset, SDHC, and multimedia clocks
* Added PMIC 8058 dt support on MSM8660, enables PMIC based power key,
keypad, rtc, and vibrator
* Added PMIC 8921 dt support on MSM8960, enables PMIC based power key,
keypad, and rtc
* tag 'qcom-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: DT: QCOM: apq8064: Add dma support for sdcc node
ARM: DT: apq8064: Add sdcc support via mcci driver.
ARM: dts: qcom: Add 8064 multimedia clock controller node
ARM: DT: APQ8064: Add node for ps_hold function in pinctrl
ARM: DT: APQ8064: Add pinctrl support
ARM: dts: qcom: Add TLMM DT node for APQ8084
ARM: dts: qcom: Add initial IFC6540 board device tree
ARM: dts: msm: Add 8058 PMIC to ssbi bus
ARM: dts: msm: Add 8921 PMIC to ssbi bus
ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees
ARM: dts: qcom: Add APQ8084 serial port DT node
ARM: dts: qcom: Add APQ8084 Global Clock Controller DT node
Signed-off-by: Olof Johansson <olof@lixom.net>
HIP04 was added out of order, but so was the previous HISI debug uart
support as well. Minor reshuffling of order.
Signed-off-by: Olof Johansson <olof@lixom.net>
- Updates for gta04 to add gta04a3 model
- Add support for Tehnexion TAO3530 boards
- Regulator names for beaglebone
- Pinctrl related updates for omap5, dra7 and am437
- Model name fix for sbc-t54
- Enable mailbox for various omaps
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUEhVBAAoJEBvUPslcq6VzQYAQAKDnfBYh1UWb5hA7IQtmutih
ITnsvB0lhrAK9SRNk3UCmTdLMnc18ZYfA/DBht/tQ8OM53GKA8TF1rmWjuIk9HWa
2cMHuCYa/n96Wkrue1j3M6iaUqT8tS78lX/dKHueF7RGVrc40v5m6vXOLR7Kh97w
LIARYZb5xmoFU6kIHrUdNEJ1xyp02qCIkwHK4xIiCQp61OYNYYpXHiyjnIg43U65
duNVXAkTGArYSR0qJUi7Nu9gmakRJVG8vTm9sVyDvHuF9uDbrjRUb9pzLV0j4P0t
Xf5ze4FPUTPQEc5AjaK3LgIEhnvT2OYIDlMFsJfwFfeVByWOlxDLiJ1LurK6oZrH
lPRF81bP8VS/0th7/HUGGxPO3ddHbtPJHyJxgrOW6Gf4OC5X+HDajrovSTr/j0bq
5CK3bpIMYLoYDzWcXreAueMI5Un77UsOxIR80gvwMbFIeAQUzz0OdvfjxmFX1keE
PaMDv6mk1LE2vm32KGVbwwU7ep800bCWNOb2iAuBb4bQh0k6EkxEOnhQgQiYgSsP
k3intuxCHVCwMDs29bM4cYlLVwXer6cAVLd6rSlyI3SaoLnAaeP7lqP9yLKS9Dbj
tewUG1y67ReYyliqrv3BuZhQZwdSJ6Mgp6JS0aWE0iJbm5fPCyHYobsIh/NKFKoR
zBTcOFc1uK+Vi/Q+mXa6
=i9cD
-----END PGP SIGNATURE-----
Merge tag 'dt-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dts changes for v3.18 merge window" from Tony Lindgren:
Changes for .dts files for omaps for v3.18 merge window:
- Updates for gta04 to add gta04a3 model
- Add support for Tehnexion TAO3530 boards
- Regulator names for beaglebone
- Pinctrl related updates for omap5, dra7 and am437
- Model name fix for sbc-t54
- Enable mailbox for various omaps
* tag 'dt-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (291 commits)
ARM: dts: OMAP2+: Add sub mailboxes device node information
ARM: dts: dra7-evm: Mark uart1 rxd as wakeup capable
ARM: dts: OMAP5 / DRA7: switch over to interrupts-extended property for UART
ARM: dts: AM437x: switch to compatible pinctrl
ARM: dts: DRA7: switch to compatible pinctrl
ARM: dts: OMAP5: switch to compatible pinctrl
ARM: dts: am335x-boneblack: Add names for remaining regulators
ARM: dts: sbc-t54: fix model property
ARM: dts: omap5.dtsi: add DSS RFBI node
ARM: dts: omap3: Add HEAD acoustics omap3-ha.dts and omap3-ha-lcd.dts (TAO3530 based)
ARM: dts: omap3: Add Technexion Thunder support (TAO3530 SOM based)
ARM: dts: omap3: Add Technexion TAO3530 SOM omap3-tao3530.dtsi
ARM: OMAP2+: tao3530: Add pdata-quirk for the mmc2 internal clock
ARM: OMAP2+: board-generic: add support for AM57xx family
ARM: dts: dra72-evm: Add tps65917 PMIC node
ARM: dts: dra72-evm: Enable I2C1 node
Linux 3.17-rc3
unicore32: Fix build error
vexpress/spc: fix a build warning on array bounds
spi: sh-msiof: Fix transmit-only DMA transfers
...
Signed-off-by: Olof Johansson <olof@lixom.net>
it ready to move to drivers/irqchip. Note that this series
does not yet move the interrupt code to drivers, that will
be posted separately as a follow-up series.
Note that this branch has a dependency to patches both
in fixes-v3.18-not-urgent and soc-for-v3.18 and is based on
a merge. Without doing the merge, off-idle would not work
properly for git bisect.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUEhOaAAoJEBvUPslcq6VzdOIP/33RC/kf5aUMBvSM/lvie/ZF
Au9Ns6lmHvPagHtgPkbtlQvXjLBZXv3S3fSLvhvuGHQgwC/U7JvD7iBzTc5MQQmE
nIoKe3q6hwWHXUtx5M6zzAxUGNAkwd9ui0O/qIjK8j3F9p5w7f98m01fZEIbM8uD
iRr/PCjmxPLkvl4NsGQ4y6EnXOjy+9M3ZRzbLU57KZ+cMa1ntT5/SbwRCG8y8So9
7xcNc/gJ+kaHWmaztnSDadXJSdd9PuXohInYEDjnqG7Eg8zecbRGW2sJEYac4XIj
CvSxPXyyKFVEHjm6uVcIm7zRFWK7iQqlpugBJ4yQ6PfIP5aINEE+rU2T8a/cOSkR
NOKI58nV5jpT7+JcSnefg0OJYhzdr5QUYSh2m7bRwWCFLat8ZhU5eAWoIHUSgJgB
lgGGLxdeb+RgjJP5p+PWbP2xRZZ5THL3u8utgiSGFWL19RRV2OnipdqPtehKNHB9
rmndYjn2PU++wMATJmWzdr694a6Q9/vviXDPF46gbQsSYBO7bvBg9iLkt9xaBUuz
qnVyi7BcujOKcfmp0rz1JXOS4Rp0zXFnTebDN4sqYkWE0cvbmYGeX+26zhMswzYs
pASwfh3gY7knSdtyU7cZrN3yrRwFY/H8mcQo18W/mN+594gTz8tPgKgeiU25XxFD
Em9mXFuRQRtK9oqmPotc
=M+BY
-----END PGP SIGNATURE-----
Merge tag 'intc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "omap intc changes for v3.18 merge window" from Tony Lindgren:
Interrupt code related clean-up for omap2 and 3 to make
it ready to move to drivers/irqchip. Note that this series
does not yet move the interrupt code to drivers, that will
be posted separately as a follow-up series.
Note that this branch has a dependency to patches both
in fixes-v3.18-not-urgent and soc-for-v3.18 and is based on
a merge. Without doing the merge, off-idle would not work
properly for git bisect.
* tag 'intc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (325 commits)
arm: omap: intc: switch over to linear irq domain
arm: omap: irq: get rid of ifdef hack
arm: omap: irq: introduce omap_nr_pending
arm: omap: irq: remove nr_irqs argument
arm: omap: irq: remove unnecessary header
arm: omap: irq: drop omap2_intc_handle_irq()
arm: omap: irq: drop omap3_intc_handle_irq()
arm: omap: irq: call set_handle_irq() from .init_irq
arm: omap: irq: move some more code around
arm: boot: dts: omap2/3/am33xx: drop ti,intc-size
arm: omap: irq: drop ti,intc-size support
arm: boot: dts: am33xx/omap3: fix intc compatible flag
arm: omap: irq: use compatible flag to figure out number of IRQ lines
arm: omap: irq: add specific compatibles for omap3 and am33xx devices
arm: omap: irq: drop .handle_irq and .init_irq fields
arm: omap: irq: use IRQCHIP_DECLARE macro
arm: omap: irq: call set_handle_irq() from intc_of_init
arm: omap: irq: make intc_of_init static
arm: omap: irq: reorganize code a little bit
arm: omap: irq: always define omap3 support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- PM changes to make the code easier to use on newer SoCs
- PM changes for newer SoCs suspend and resume and wake-up events
- Minor clean-up to remove dead Kconfig options
Note that these have a dependency to the fixes-v3.18-not-urgent
tag and is based on a commit in that series.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUEhKGAAoJEBvUPslcq6VzURoP/3tM1iOFzQ83xe0ijEnHuUEz
To5DF1AgJ/l8a6H9FV9xDTn7SXjV8Fts0MrPwveGnKRUMmZfrUBedvWGM9NyyWm5
L7IJKHvSc7FAj7ee5crNobCYTrQ9THUlr8X1mLILFl5mTh2pDnm4ZRscHy+OxN0+
w97d/T5MrFhoCa8LXo8nGm7jROvayp+E0VTxjFdU07VKJK8xjd++M0B5U3pXsqCC
8VabNDt8VBK/SVCOKYn3tnNop1/9t9nSWfN18OAEaIS6rn5ZaQxXETKxyRWgjTvn
OVEgsazFiPVm87H3O6cj0BizOSXG2gMfBTECZwVPtavyQR2lb/YljHUQ5Z9/T4v9
x+nOWFxqVAr8OM1kKcatSMrZymY4AG5NdOmOgrAqKoQzWGGKhT3LcNz3Ecja25vX
ZWGYsJl6hbF4PPaCgKe8KGRISLuv1g1N4TI8ztsxELRzhClxhuaERt7TkdQRLGrH
emKSFP8Kkn6yrQy/RirOaXnwPWJRzuMrgpLuwDTKY6vY07MGk+nHkzF+2itKkvLB
CG/Tw29jUi9gnOU9QwjkpBiJxsHlgcO/XzSTGN89p6EjVylyqdCqkpO3MCfjPV7Q
kPap33Zx5SvxMMMSXRDKrrez533RfxBeTXkgT1O0fnR0r4fWYoc5+zL8Y02g10Wt
tZ4gZRYP68IuxzfPUAgJ
=LW8C
-----END PGP SIGNATURE-----
Merge tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps for v3.18 merge window:
- PM changes to make the code easier to use on newer SoCs
- PM changes for newer SoCs suspend and resume and wake-up events
- Minor clean-up to remove dead Kconfig options
Note that these have a dependency to the fixes-v3.18-not-urgent
tag and is based on a commit in that series.
* tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (514 commits)
ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7
ARM: dts: OMAP3+: Add PRM interrupt
ARM: omap: Remove stray ARCH_HAS_OPP references
ARM: DRA7: Add hook in SoC initcalls to enable pm initialization
ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization
ARM: OMAP5 / DRA7: Enable CPU RET on suspend
ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug
ARM: OMAP5 / DRA7: PM: Avoid all SAR saves
ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains
ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default
ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency
ARM: OMAP5 / DRA7: PM: Update CPU context register offset
ARM: AM437x: use pdata quirks for pinctrl information
ARM: DRA7: use pdata quirks for pinctrl information
ARM: OMAP5: use pdata quirks for pinctrl information
ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug
ARM: OMAP4+: PM: use only valid low power state for suspend
ARM: OMAP4+: PM: Make logic state programmable
ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain
ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms
...
for the -rc cycle:
- Fixes for .dts files to differentiate panda and beaglebone versions
- Powerdomain fixes from Nishant Menon mostly for newer omaps
- Fixes for __initconst and of_device_ids const usage
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUEhDQAAoJEBvUPslcq6VzwRMP/2xRm565S/GMzMkbeWg32u5a
KIyPVSfv7Jj97KjC2Ocw4dl321HA5bfArHVVCfni84vW1JCMVzqhw0r8HlopKs29
cVP88epELPW1RleW1/pqhrgeGxD6yEd4dzIlo/8zqiOtvKULEmNgOpLYSWVvl6bm
BfIS+RwzijQGShpflTPoDrJDdOV/hI9iX/5I15DhrM2+8bhU7Uuhfer9qIkktsFb
8QTk0crIMPbpxEKkJ69AZCHZaMYFVCd0TVek1p+lbbBvOzGInBMwJ9Z7MFq4FB14
1s4+uW3zpsf8RQL407w9uGprX5qhYMtBizywmkHjcIele2IHx9nUQoZaWiC5uWBo
jLuh7NQh+5pHLKduvoP8vP4XKuO+6sXTcx9Ndo73J+Mo6pked5HS3Vuof9LbSPEA
FfiWl+E82s4AAAGJ5NgPdMF/rC1T++voKskqFnr3Bf1DxxsM/0XMZeqClpHhpKTu
FvzIdIn/UNHG3pr4U8xIg3myMPcLzszUmqIaHLxtMUjXZVkWG6UVBC4N3AJORuQW
HH8sQRmtFj6bKEyK5TR+4HCwnNgPll1u00/Zpv6qhg506yry3dtsqgMfK14CRKqk
ErPnIpGrnu37W4CTgCH7sivDfnEBS0OWuMDcsBeBMYfuS/lyc2TlrdDQZBCDo9Az
mnrUA1fOCDv2f0GQC6l7
=RPuM
-----END PGP SIGNATURE-----
Merge tag 'fixes-v3.18-not-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "non-urgent omap fixes for v3.18 merge window" from Tony Lindgren:
Fixes for omaps that were not considered urgent enough
for the -rc cycle:
- Fixes for .dts files to differentiate panda and beaglebone versions
- Powerdomain fixes from Nishant Menon mostly for newer omaps
- Fixes for __initconst and of_device_ids const usage
* tag 'fixes-v3.18-not-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: make of_device_ids const
ARM: omap2: make arrays containing machine compatible strings const
ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug
ARM: OMAP4+: PM: use only valid low power state for suspend
ARM: OMAP4+: PM: Make logic state programmable
ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain
ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms
ARM: OMAP5: powerdomain data: fix powerdomain powerstate
ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstate
ARM: dts: am335x-bone*: Fix model name and update compatibility information
ARM: dts: omap4-panda: Fix model and SoC family details
+ Linux 3.17-rc3
Signed-off-by: Olof Johansson <olof@lixom.net>
- move of the PIT (basic timer) from mach-at91 to its proper location:
drivers/clocksource
- big cleanup of this driver along the way
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJUFw4gAAoJEAf03oE53VmQAdwH+gIVjFww5vGjvfZqcOofmjlA
hzELgv1Jem2/OSQRkKX9ekY0hArca7POij+V9Ubz0LHag8JzEXhORq7KThx6vXbY
iUtx5hXkyXded5h8WqDJT0y7YFpM57Hv6Dgp7gXJQnNULwhQnafds0ucKr0fZVZK
64Zhf6YDQnHYotEoiE2zi+yAl2BI9uoO2tP+kWPezNWLQ5v89FnWtt828N+5Be/B
gujSX1ZHDtsIshdfjqhlZtm1eGDztajm/OxdWheU4qELsZ5QaSYe3klaExV93Hp4
LCFzczu54/krauAlLn01x/Kyjpi8S8Hc4Qj6AQU8LpAvoy/SMBy9xo0SIlX1ZX4=
=Zxt2
-----END PGP SIGNATURE-----
Merge tag 'at91-drivers2' of git://github.com/at91linux/linux-at91 into next/drivers
Merge " Second drivers series for AT91/3.18" from Nicolas Ferre:
- move of the PIT (basic timer) from mach-at91 to its proper location:
drivers/clocksource
- big cleanup of this driver along the way
* tag 'at91-drivers2' of git://github.com/at91linux/linux-at91:
ARM: at91: PIT: Move the driver to drivers/clocksource
ARM: at91: Give the PIT irq as an argument of at91sam926x_pit_init
ARM: at91: Convert the boards to the init_time callback
ARM: at91: soc: Add init_time callback
ARM: at91: PIT: (Almost) remove the global variables
ARM: at91: PIT: use request_irq instead of setup_irq
ARM: at91: PIT: Use pr_fmt
ARM: at91: PIT: Use consistent exit path in probe
ARM: at91: dt: Remove init_time definitions
ARM: at91: PIT: Rework probe functions
ARM: at91: PIT: Use of_have_populated_dt instead of CONFIG_OF
ARM: at91: PIT: Use DIV_ROUND_CLOSEST to compute the cycles
ARM: at91: generic.h: Add include safe guards
ARM: at91: PIT: Follow the general coding rules
Signed-off-by: Olof Johansson <olof@lixom.net>
