This commit adds the necessary SoC-level Device Tree definitions to
describe the Device Bus of Orion5x SOCs. The Device Bus is mainly used
to connect NOR flashes to the system.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-27-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit fixes the Orion5x SoC definition to:
* Not define a clock-frequency, as it should be described on a
per-board basis.
* Declare the appropriate clock reference, so that the driver can do
correct divisors calculations for the I2C bus.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-26-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit declares the pinctrl device in the Orion5x 5182 Device
Tree files, and ensures that the Orion pinctrl driver is compiled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-25-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit switches the Orion5x platforms described through DT to use
a DT-defined interrupt controller and timer.
This involves:
* Describing in the DT the bridge interrupt controller, which is a
child interrupt controller to the main one, which is used for timer
and watchdog interrupts.
* Describing in the DT the timer.
* Adding in the DT the interrupt specifications for the watchdog.
* Selecting the ORION_IRQCHIP and ORION_TIMER drivers to be compiled.
* Change board-dt.c to no longer have an ->init_time() callback,
since the default callback will work fine: it calls
clocksource_of_init() and of_clk_init(), as needed.
* Implement a multi-IRQ handler for non-DT platforms in
mach-orion5x/irq.c.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-24-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
enabled, even for non-DT platforms (if we want both DT and non-DT
platforms to be supported in a single kernel).
However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
platforms in plat-orion/irq.c doesn't match the needs of
Orion5x. Also, it doesn't make much sense for orion_irq_init() to
register the multi-IRQ handler: orion_irq_init() is called once for
each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
be registered once.
To solve this problem, we move the multi-IRQ handle in per-platform
code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
will be introduced in a followup commit. Of course, this code will
ultimately be completely removed once all boards are converted to the
Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-23-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Until the previous commit, the Orion5x clocks were not described in
the Device Tree. Now that they are described in the Device Tree, we
can replace the manual 'clock-frequency' property in the UART nodes
by a nicer 'clocks' reference in those UART nodes.
This commit consequently removes the 'clock-frequency' property from
the LaCie edmini_v2 board, which is at this point the only Orion5x
board converted to the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-22-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit moves the Orion5x platforms using the Device Tree to use
the recently introduced clock driver for Orion5x. To achieve that, it:
* Adds the necessary DT description of the clock.
* Selects ORION_CLK to enable the compilation of the clock driver.
* Call of_clk_init() instead of the Orion5x-specific clock
initialization function.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-21-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit renames the XOR engine Device Tree node to
dma-controller@, to conform with the standard node name proposed by
the ePAPR.
Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-19-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit converts the existing devices described in the edmini_v2
Device Tree to use node labels: the UART and SATA device. Also, it
reorders the eth and mdio node label references to be sorted
alphabetically.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-18-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds the new linux,stdout-path to the edmini_v2 platform,
pointing to the serial device use for the console.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-17-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As noted by Sebastian Hesselbarth, the Device Tree nodes for GPIO keys
and LEDs should be named gpio-keys and gpio-leds.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-16-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to ease identification of devices, it is useful to have
Device Tree labels on all devices. This commit adds such labels to the
Orion5x SoC Device Tree file.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-15-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit switches the Orion5x Device Tree files to use the DT
representation and probing for the mvebu-mbus driver. The changes are
mainly:
* Re-organize the DT to follow the same organization as the one used
on Armada 370/XP, which is needed for mvebu-mbus to work: a
top-level soc { ... } node, which corresponds to the MBus bus, and
a sub-node internal-regs { ... } for all peripherals whose register
sit only in the "Internal Register Window". This change re-indents
by one level the definition of all nodes in the Device Tree, which
explains the large change.
* Use custom functions orion5x_dt_init_early() and
orion5x_dt_init_time() instead of orion5x_init_early() and
orion5x_timer_init() as we now want the MBus driver to be probed
from the Device Tree. We still use the old-style timer
initialization, but that will be changed in a followup commit.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-14-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The orion5x-lacie-ethernet-disk-mini-v2.dts can benefit from using
gpio.h and input.h dt-bindings headers to replace hardcoded values by
more meaningful macros.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-13-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit switches the Orion5x Device Tree files to use C
preprocessor based includes, as it will allow us to use definitions
from header files in future commits.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-12-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The interrupt controller node was located outside of the ocp@f1000000
node, which doesn't make much sense: like any other device, the
interrupt controller has registers located in the "Internal Registers
Window", so it is much more logical to have it under the ocp@f1000000
node.
It is even more important as we are going to move Orion5x to use the
Device Tree binding of the mvebu-mbus driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398202002-28530-11-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
KVM currently crashes and burns on big-endian hosts, so don't allow it
to be selected until we've got that fixed.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Commit 62e3879 (imx-drm: imx-tve: Fix DDC I2C bus property) was trying
to use 'ddc-i2c-bus' as the DDC property name (we can see that from the
commit log), but unfortunately 'i2c-ddc-bus' which is a typo was
actually used in the code. This results in some unnecessary
inconsistency and confusions, because all the documented DDC property
in device tree bindings use 'ddc-i2c-bus'.
Documentation/devicetree/bindings/staging/imx-drm/hdmi.txt
Documentation/devicetree/bindings/panel/simple-panel.txt
Documentation/devicetree/bindings/video/dvi-connector.txt
Let's fix it before the error spreads.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- one little DT fix
- the use of proper directory for clock in include/dt-bindings
it allows to remove the now empty include/dt-bindings/clk
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Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
3.15 fixes for AT91
- one little DT fix
- the use of proper directory for clock in include/dt-bindings
it allows to remove the now empty include/dt-bindings/clk
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
dt-bindings: clock: Move at91.h to dt-bindigs/clock
ARM: at91: fix spi cs on sama5d3 Xplained board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Netgear RN2120 was not using the same strategy as the other Armada
370/375/38x/XP boards: it was using a 'clocks' property and not the
'clock-frequency' property in its UART controller Device Tree node.
However, now that this clock reference is present at the SoC-level,
there is no point in duplicating it at the board-level.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the Armada 370/375/38x/XP SoC-level Device Tree files have
the proper "clocks" property in their UART controllers node, it is no
longer useful to have the clock-frequency property defined in the
board-level Device Tree files.
Therefore, this commit gets rid of all the useless 'clock-frequency'
properties.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Back when the Armada 370 and Armada XP initial support was introduced,
the only way to pass the clock frequency to the of_serial driver was
through a clock-frequency Device Tree property.
Thanks to 0bbeb3c3e8 ('of serial port
driver - add clk_get_rate() support'), it is possible to use the
standard 'clocks' DT property to reference the clock used for a
particular UART controller. This clock is then used by the of_serial
driver to retrieve the clock rate.
This commit modifies the SoC-level Device Tree files of Armada 370,
Armada XP, Armada 375 and Armada 38x to use this possibility. Since
there is no gatable clock for the UART controllers, we simply
reference the TCLK, which is the main SoC clock for the peripherals.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell Armada 38x platform needs the ahci_mvebu driver enabled
for the AHCI interfaces, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397574006-5868-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell Armada 38x processors contain two AHCI compatible
interfaces. This commit adds the Device Tree description of those
interfaces at the SoC level, and also enables them on the Armada 385
DB platform, which allows access to both interfaces through SATA
ports.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397574006-5868-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mmu-gather operation 'tlb_flush_mmu()' has done two things: the
actual tlb flush operation, and the batched freeing of the pages that
the TLB entries pointed at.
This splits the operation into separate phases, so that the forced
batched flushing done by zap_pte_range() can now do the actual TLB flush
while still holding the page table lock, but delay the batched freeing
of all the pages to after the lock has been dropped.
This in turn allows us to avoid a race condition between
set_page_dirty() (as called by zap_pte_range() when it finds a dirty
shared memory pte) and page_mkclean(): because we now flush all the
dirty page data from the TLB's while holding the pte lock,
page_mkclean() will be held up walking the (recently cleaned) page
tables until after the TLB entries have been flushed from all CPU's.
Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Dave Hansen <dave.hansen@intel.com>
Acked-by: Hugh Dickins <hughd@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The Marvell Armada 38x platform has a SDHCI interface managed by the
sdhci-pxav3 MMC host driver. It therefore makes sense to enable this
driver in mvebu_v7_defconfig.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1397486478-16991-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In commit "mmc: sdhci-pxav3: add support for the Armada 38x SDHCI
controller", the sdhci-pxav3 driver has been extended to also be
usable on Armada 38x platforms.
Therefore, this commit adds the necessary Device Tree informations to
declare this SDHCI interface in the Armada 38x SoC, and also in the
Armada 385 Development Board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1397486478-16991-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The codec is defined both in DT and the board file. The board file
however contains platform data which is required in order that the
codec works. When the DT instantiates the codec before the board files
does, it is missing the platform data and so fails. Remove the DT node
until we have a binding which can pass the additional data.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1397565608-1830-1-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 375 SoC has a dual-port SATA interface, which is exposed on
the Armada 375 DB board. This commit therefore enables this interface
on the Armada 375 DB board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In commit 249f382250 ('ARM: mvebu: add
audio support to Armada 370 DB'), the I2C bus 0 was enabled on the
Armada 370 DB board, and an I2C codec was described as being connected
on this bus.
However, this commit forgot to define the I2C bus frequency, which
leads the i2c-mv64xxx to fail probing, as it cannot calculate the baud
rate multiplier/divisor to derive the I2C bus frequency from the core
SoC frequency. It makes audio completely unusable, as the I2C bus is
not probed, and therefore the audio codec is not probed either.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada XP GP isn't using rgmii-id connections between the MAC and
PHY, but instead a single QSGMII connection, which is a quad-SGMII
connection: a double pair of differential lines that are multiplexed
to convey the traffic of four network interfaces between a MAC and a
PHY.
Until now, the Armada XP GP was relying on the bootloader setting the
correct values in various configuration registers. With this change,
the mvneta driver can be used as a module on this platform.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397569821-5530-4-git-send-email-thomas.petazzoni@free-electrons.com
Tested-by: Arnaud Ebalard <arno@natisbad.org>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mvebu-devbus driver had a serious bug, which lead to a 8 bits bus
width declared in the Device Tree being considered as a 16 bits bus
width when configuring the hardware.
This bug in mvebu-devbus driver was compensated by a symetric mistake
in the Armada XP OpenBlocks AX3 Device Tree: a 8 bits bus width was
declared, even though the hardware actually has a 16 bits bus width
connection with the NOR flash.
Now that we have fixed the mvebu-devbus driver to behave according to
its Device Tree binding, this commit fixes the problematic Device Tree
files as well.
This bug was introduced in commit
a7d4f81821 ('ARM: mvebu: Add support for
NOR flash device on Openblocks AX3 board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397489361-5833-5-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: a7d4f81821 ('ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board')
Cc: stable@vger.kernel.org # v3.10+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mvebu-devbus driver had a serious bug, which lead to a 8 bits bus
width declared in the Device Tree being considered as a 16 bits bus
width when configuring the hardware.
This bug in mvebu-devbus driver was compensated by a symetric mistake
in the Armada XP DB Device Tree: a 8 bits bus width was declared, even
though the hardware actually has a 16 bits bus width connection with
the NOR flash.
Now that we have fixed the mvebu-devbus driver to behave according to
its Device Tree binding, this commit fixes the problematic Device Tree
files as well.
This bug was introduced in commit
b484ff42df ('ARM: mvebu: Add support for
NOR flash device on Armada XP-DB board') which was merged in v3.11.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397489361-5833-4-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: b484ff42df ('ARM: mvebu: Add support for NOR flash device on Armada XP-DB board')
Cc: stable@vger.kernel.org # v3.11+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mvebu-devbus driver had a serious bug, which lead to a 8 bits bus
width declared in the Device Tree being considered as a 16 bits bus
width when configuring the hardware.
This bug in mvebu-devbus driver was compensated by a symetric mistake
in the Armada XP GP Device Tree: a 8 bits bus width was declared, even
though the hardware actually has a 16 bits bus width connection with
the NOR flash.
Now that we have fixed the mvebu-devbus driver to behave according to
its Device Tree binding, this commit fixes the problematic Device Tree
files as well.
This bug was introduced in commit
da8d1b3835 ('ARM: mvebu: Add support for
NOR flash device on Armada XP-GP board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397489361-5833-3-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: da8d1b3835 ('ARM: mvebu: Add support for NOR flash device on Armada XP-GP board')
Cc: stable@vger.kernel.org # v3.10+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Since we didn't get around to collect fixes in time for -rc2 over
the easter vacation, this one is unfortunately a bit larger than
we'd like for an -rc3 merge. A large set of the changes is in the
device tree sources, so I'm splitting out the description between
code changes and DT changes. Aside from omap and versatile express,
the actual code bugs are sporadic and trivial. Here is an overview:
imx:
- fix video clock settings
- fix one clock refcounting bug
omap:
- update defconfig for renamed USB PHY driver
- fix error handling in gpmc
- fix N900 video initialization regression
- fix reression in hwmod code from missing braces
- fix am43xx and omap3 clocks
- remove bogus write to voltage control register
pxa:
- fix build regression from 3.13 header cleanup
rockchip:
- fix a misleading printk string
shmobile:
- fix incorrect sound setting on multiple machines
spear:
- remove incorrect __init section annotation
tegra:
- remove a stale Kconfig entry
u300:
- update defconfig
ux500:
- enable common wireless and sensor drivers in defconfig
- more defconfig updates
vexpress:
- fix voltage calculation for opp
- fix reboot hang and warning
- fix out-of-bounds array access
- improve error handling in clock driver
overall:
- always select CLKSRC_OF in multiplatform builds
And these are the devicetree related changes:
imx:
- add missing #clock-cell properties
- fix pinctrl setting in imx6sl-evk
- fix video endpoint on imx53
- remove obsolete lvds-channel nodes (multiple patches)
- add missing second stmpe node
- fix usb host mode on dmo-edmqmx6 (multiple patches)
- fix gic node #address-cells to match usage
- add missing legacy IRQ map for PCIe
- fix microsom pincontrol setting for rgmii
- fix fatal typo in touchscreen DT usage for mx5
- list all RAM present on m53evk and mx53qsb
omap:
- fix bug in DT handling of gpmc external bus
- add DT for older revision of beagleboard
- fix regression after DT node name fixes
- remove obsolete properties for gpmc
- fix pinmux comment to match DT it refers to
- fix newly added dra7xx clock node data
- add missing clock for USB PHY
mvebu:
- add missing clock for mdio node
- fix nonstandard vendor prefixes on i2c nodes
rockchip:
- fix pin control setting for uart
shmobile:
- fix typo in DT data for pin control (multiple patches)
- fix gic node #address-cells to match usage
tegra:
- fix clock and uart DT representation to match hardware
zynq:
- add DT nodes for newly added driver
- add DT properties required for cpufreq-ondemand
overall:
- restore alphabetic order in Makefile
- grammar fixes in bindings
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Merge tag 'fixes-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Since we didn't get around to collect fixes in time for -rc2 over the
easter vacation, this one is unfortunately a bit larger than we'd like
for an -rc3 merge.
A large set of the changes is in the device tree sources, so I'm
splitting out the description between code changes and DT changes.
Aside from omap and versatile express, the actual code bugs are and
trivial. Here is an overview:
imx:
- fix video clock settings
- fix one clock refcounting bug
omap:
- update defconfig for renamed USB PHY driver
- fix error handling in gpmc
- fix N900 video initialization regression
- fix reression in hwmod code from missing braces
- fix am43xx and omap3 clocks
- remove bogus write to voltage control register
pxa:
- fix build regression from 3.13 header cleanup
rockchip:
- fix a misleading printk string
shmobile:
- fix incorrect sound setting on multiple machines
spear:
- remove incorrect __init section annotation
tegra:
- remove a stale Kconfig entry
u300:
- update defconfig
ux500:
- enable common wireless and sensor drivers in defconfig
- more defconfig updates
vexpress:
- fix voltage calculation for opp
- fix reboot hang and warning
- fix out-of-bounds array access
- improve error handling in clock driver
overall:
- always select CLKSRC_OF in multiplatform builds
And these are the devicetree related changes:
imx:
- add missing #clock-cell properties
- fix pinctrl setting in imx6sl-evk
- fix video endpoint on imx53
- remove obsolete lvds-channel nodes (multiple patches)
- add missing second stmpe node
- fix usb host mode on dmo-edmqmx6 (multiple patches)
- fix gic node #address-cells to match usage
- add missing legacy IRQ map for PCIe
- fix microsom pincontrol setting for rgmii
- fix fatal typo in touchscreen DT usage for mx5
- list all RAM present on m53evk and mx53qsb
omap:
- fix bug in DT handling of gpmc external bus
- add DT for older revision of beagleboard
- fix regression after DT node name fixes
- remove obsolete properties for gpmc
- fix pinmux comment to match DT it refers to
- fix newly added dra7xx clock node data
- add missing clock for USB PHY
mvebu:
- add missing clock for mdio node
- fix nonstandard vendor prefixes on i2c nodes
rockchip:
- fix pin control setting for uart
shmobile:
- fix typo in DT data for pin control (multiple patches)
- fix gic node #address-cells to match usage
tegra:
- fix clock and uart DT representation to match hardware
zynq:
- add DT nodes for newly added driver
- add DT properties required for cpufreq-ondemand
overall:
- restore alphabetic order in Makefile
- grammar fixes in bindings"
* tag 'fixes-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (66 commits)
ARM: vexpress/TC2: Convert OPP voltage to uV before storing
power/reset: vexpress: Fix restart/power off operation
dt: tegra: remove non-existent clock IDs
clk: tegra: remove non-existent clocks
ARM: tegra: remove UART5/UARTE from tegra124.dtsi
ARM: tegra: remove TEGRA_EMC_SCALING_ENABLE
ARM: Tidy up DTB Makefile entries
ARM: fix missing CLKSRC_OF on multi-platform
ARM: spear: add __init to spear_clocksource_init()
ARM: pxa: hx4700.h: include "irqs.h" for PXA_NR_BUILTIN_GPIO
arm/mach-vexpress: array accessed out of bounds
clk: vexpress: NULL dereference on error path
ARM: OMAP2+: Fix GPMC remap for devices using an offset
ARM: zynq: dt: Add I2C nodes to Zynq device tree
ARM: zynq: DT: Add 'clock-latency' property
ARM: OMAP2+: Fix oops for GPMC free
ARM: dts: Add support for the BeagleBoard xM A/B
ARM: dts: Grammar /that will/it will/
ARM: dts: Grammar /is uses/ is used/
ARM: OMAP2+: Fix config name for USB3 PHY
...
- fix for a long-standing bug in __break_lease that can cause soft lockups
- renaming of file-private locks to "open file description" locks, and the
command macros to more visually distinct names.
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Merge tag 'locks-v3.15-2' of git://git.samba.org/jlayton/linux
Pull file locking fixes from Jeff Layton:
"File locking related bugfixes for v3.15 (pile #2)
- fix for a long-standing bug in __break_lease that can cause soft
lockups
- renaming of file-private locks to "open file description" locks,
and the command macros to more visually distinct names
The fix for __break_lease is also in the pile of patches for which
Bruce sent a pull request, but I assume that your merge procedure will
handle that correctly.
For the other patches, I don't like the fact that we need to rename
this stuff at this late stage, but it should be settled now
(hopefully)"
* tag 'locks-v3.15-2' of git://git.samba.org/jlayton/linux:
locks: rename FL_FILE_PVT and IS_FILE_PVT to use "*_OFDLCK" instead
locks: rename file-private locks to "open file description locks"
locks: allow __break_lease to sleep even when break_time is 0
AM3517 inherits OMAP3 dts file, but does not have all the IPs
that are present on OMAP3. This patch disables the following
absent IPs for AM3517: Mailbox, IVA, MMU_ISP, MPU_IVA SmartReflex.
A label had to be added for IVA node in omap3.dtsi to be able to
get a reference to the node for disabling.
Otherwise we get the following warnings during booting:
platform iva.2: Cannot lookup hwmod 'iva'
platform 48094000.mailbox: Cannot lookup hwmod 'mailbox'
platform 480bd400.mmu: Cannot lookup hwmod 'mmu_isp'
platform 480c9000.smartreflex: Cannot lookup hwmod 'smartreflex_mpu_iva'
Signed-off-by: Suman Anna <s-anna@ti.com>
[tony@atomide.com: updated description for the warnings]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The mailbox module is capable of generating two interrupts
to MPU in OMAP2420, compared to one in OMAP2430. The second
interrupt is to handle interrupts from the additional IVA
processor present only on OMAP2420.
Move the current common mailbox DT node into the SoC
specific files to allow the above differentiation. Also,
added back the interrupt-names on OMAP2420, that were
previously defined in hwmod data.
This fixes regression caused by the recent dropping of
hwmod data in favor for defining it in the .dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
[tony@atomide.com: updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the mailbox device DT node for OMAP5 SoC. The OMAP5 mailbox
IP is identical to that used in OMAP4.
The OMAP5 hwmod data no longer publishes the module address space,
so this patch fixes the WARN_ON backtrace associated with the
following trace during the kernel boot:
"omap_hwmod: mailbox: doesn't have mpu register target base".
Otherwise we get a warning like this:
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2538 _init+0x1c0/0x3dc()
omap_hwmod: mailbox: doesn't have mpu register target base
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.15.0-rc2-00001-gb5e85a0 #45
[<c0015724>] (unwind_backtrace) from [<c00120f4>] (show_stack+0x10/0x14)
[<c00120f4>] (show_stack) from [<c05a1ccc>] (dump_stack+0x78/0x94)
[<c05a1ccc>] (dump_stack) from [<c0042a74>] (warn_slowpath_common+0x6c/0x8c)
[<c0042a74>] (warn_slowpath_common) from [<c0042b28>] (warn_slowpath_fmt+0x30/0x40)
[<c0042b28>] (warn_slowpath_fmt) from [<c0803b40>] (_init+0x1c0/0x3dc)
[<c0803b40>] (_init) from [<c0029c8c>] (omap_hwmod_for_each+0x34/0x5c)
[<c0029c8c>] (omap_hwmod_for_each) from [<c08042b0>] (__omap_hwmod_setup_all+0x24/0x40)
[<c08042b0>] (__omap_hwmod_setup_all) from [<c00088b8>] (do_one_initcall+0x34/0x160)
[<c00088b8>] (do_one_initcall) from [<c07f7bf4>] (kernel_init_freeable+0xfc/0x1c8)
[<c07f7bf4>] (kernel_init_freeable) from [<c059c4f4>] (kernel_init+0x8/0xe4)
[<c059c4f4>] (kernel_init) from [<c000eaa8>] (ret_from_fork+0x14/0x2c)
Signed-off-by: Suman Anna <s-anna@ti.com>
[tony@atomide.com: updated description to for the warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>
On my DRA7 system, when the kernel is built in Thumb-2 mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
seems to be because the CPU is in ARM mode once the ROM hands over control to
the kernel. Switch to Thumb-2 mode if required once the kernel is control of
secondary CPU. On OMAP4 on the other hand, it appears to be in Thumb-2 mode on
entry so this is not required and SMP boot works as is.
Also corrected a spurious '+' and updated copyright information.
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Do not reset GPIO5 at boot-up because GPIO5_7 is used
on AM437x GP-EVM to control VTT regulators on DDR3.
Without this some GP-EVM boards will fail to boot because
of DDR3 corruption.
Reported-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IGEPv2 board has a SMSC LAN9221i ethernet chip and not a
SMSC LAN911x connected to the GPMC. Each chip needs different
timings in order to operate correctly so is wrong to include
omap-gpmc-smsc911x.dtsi instead of omap-gpmc-smsc9221.dtsi.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
[tony@atomide.com: this is needed to avoid potential memory corruption]
Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM_ERRATA_775420 needs to be enabled.
A data cache maintenance operation which aborts, followed by an ISB,
without any DSB in-between, might lead to deadlock.
Affects: bug present in Cortex-A9 r3p0 and earlier. Fixed in r4p0.
Cortex-A9 r3p0 is used in a multitude of Broadcom parts including
the bcm21664, bcm281xx, 5301x families of devices.
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Tested-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Currently, Broadcom SoC options are shown whenever ARCH_MULTIPLATFORM
is enabled. Restrict this so they are only seen when ARCH_MULTI_V6_V7
variants are enabled.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
[mporter: added commit log message]
Signed-off-by: Matt Porter <mporter@linaro.org>
These source files contain only level-2 cache initialization code,
so rename them to make that fact more obvious.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
The block of comments in bcm_kona_do_smc() are somewhat confusing.
This patch attempts to clarify what's going on.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Move the code that implements the "smc" call into a C function that
uses inline assembly. This allows us to make that function private,
and enables us to get rid of "arch/arm/mach-bcm/bcm_kona_smc_asm.S".
Rename what had been the "buffer_addr" argument to be "buffer_phys"
so it's consistent with other usage in this file.
Since it's now easy to do, verify that r12 contains SEC_EXIT_NORMAL
upon completion of the SMC. There really isn't a good way to handle
the abnormal completion of a secure monitor request.
Since "bcm_kona_smc.h" is now only included from C files, eliminate
the #ifndef __ASSEMBLY__.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Clean up a few header file includes, eliminating a few that are not
really needed and putting in their place some that are.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
