drm/msm: rework inactive-work
Re-arrange things a bit so that we can get work requested after a bo fence passes, like pageflip, done before retiring bo's. Without any sort of bo cache in userspace, some games can trigger hundred's of transient bo's, which can cause retire to take a long time (5-10ms). Obviously we want a bo cache.. but this cleanup will make things a bit easier for atomic as well and makes things a bit cleaner. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
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6 changed files with 71 additions and 33 deletions
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@ -73,6 +73,9 @@ struct msm_drm_private {
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struct workqueue_struct *wq;
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/* callbacks deferred until bo is inactive: */
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struct list_head fence_cbs;
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/* registered IOMMU domains: */
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unsigned int num_iommus;
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struct iommu_domain *iommus[NUM_DOMAINS];
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@ -97,6 +100,20 @@ struct msm_format {
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uint32_t pixel_format;
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};
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/* callback from wq once fence has passed: */
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struct msm_fence_cb {
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struct work_struct work;
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uint32_t fence;
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void (*func)(struct msm_fence_cb *cb);
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};
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void __msm_fence_worker(struct work_struct *work);
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#define INIT_FENCE_CB(_cb, _func) do { \
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INIT_WORK(&(_cb)->work, __msm_fence_worker); \
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(_cb)->func = _func; \
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} while (0)
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/* As there are different display controller blocks depending on the
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* snapdragon version, the kms support is split out and the appropriate
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* implementation is loaded at runtime. The kms module is responsible
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@ -160,8 +177,8 @@ int msm_gem_prime_pin(struct drm_gem_object *obj);
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void msm_gem_prime_unpin(struct drm_gem_object *obj);
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void *msm_gem_vaddr_locked(struct drm_gem_object *obj);
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void *msm_gem_vaddr(struct drm_gem_object *obj);
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int msm_gem_queue_inactive_work(struct drm_gem_object *obj,
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struct work_struct *work);
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int msm_gem_queue_inactive_cb(struct drm_gem_object *obj,
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struct msm_fence_cb *cb);
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void msm_gem_move_to_active(struct drm_gem_object *obj,
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struct msm_gpu *gpu, bool write, uint32_t fence);
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void msm_gem_move_to_inactive(struct drm_gem_object *obj);
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