Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (40 commits) mfd: Fix incorrect kfree(i2c) in wm8994-core i2c_driver probe mfd: Fix incorrect kfree(i2c) in wm831x-core i2c_driver probe mfd: Fix incorrect kfree(i2c) in tps6507x i2c_driver probe mfd: Add TPS6586x driver mfd: Use macros instead of some constant magic numbers for menelaus mfd: Fix menelaus mmc slot 2 misconfiguration mfd: Missing slab.h includes mfd: Fix wrong wm8350-core kfree in error path mfd: Fix wm8994_device_init() return value mfd: Avoid calling platform_device_put() twice in ucb1400 probe error path mfd: Annotate tc6387xb probe/remove routines with __devinit/__devexit mfd: Fix tc6387xb resource reclaim mfd: Fix wrong goto labels for tc6393xb error handling mfd: Get rid of now unused mc13783 private header hwmon: Don't access struct mc13783 directly from mc13783-adc mfd: New mc13783 function exposing flags mfd: Check jz4740-adc kmalloc() result mfd: Fix jz4740-adc resource reclaim in probe error path mfd: Add WM8321 support mfd: Add stmpe auto sleep feature ...
This commit is contained in:
commit
e83ddb3354
43 changed files with 3933 additions and 339 deletions
32
include/linux/jz4740-adc.h
Normal file
32
include/linux/jz4740-adc.h
Normal file
|
|
@ -0,0 +1,32 @@
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|||
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#ifndef __LINUX_JZ4740_ADC
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#define __LINUX_JZ4740_ADC
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#include <linux/device.h>
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/*
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* jz4740_adc_set_config - Configure a JZ4740 adc device
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* @dev: Pointer to a jz4740-adc device
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* @mask: Mask for the config value to be set
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* @val: Value to be set
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*
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* This function can be used by the JZ4740 ADC mfd cells to configure their
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* options in the shared config register.
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*/
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int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val);
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#define JZ_ADC_CONFIG_SPZZ BIT(31)
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#define JZ_ADC_CONFIG_EX_IN BIT(30)
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#define JZ_ADC_CONFIG_DNUM_MASK (0x7 << 16)
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#define JZ_ADC_CONFIG_DMA_ENABLE BIT(15)
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#define JZ_ADC_CONFIG_XYZ_MASK (0x2 << 13)
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#define JZ_ADC_CONFIG_SAMPLE_NUM_MASK (0x7 << 10)
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#define JZ_ADC_CONFIG_CLKDIV_MASK (0xf << 5)
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#define JZ_ADC_CONFIG_BAT_MB BIT(4)
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#define JZ_ADC_CONFIG_DNUM(dnum) ((dnum) << 16)
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#define JZ_ADC_CONFIG_XYZ_OFFSET(dnum) ((xyz) << 13)
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#define JZ_ADC_CONFIG_SAMPLE_NUM(x) ((x) << 10)
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#define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5)
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#endif
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|
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@ -1,220 +0,0 @@
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/*
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* Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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*
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* Initial development of this code was funded by
|
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* Phytec Messtechnik GmbH, http://www.phytec.de
|
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*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __LINUX_MFD_MC13783_PRIV_H
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#define __LINUX_MFD_MC13783_PRIV_H
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#include <linux/platform_device.h>
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#include <linux/mfd/mc13783.h>
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#include <linux/mutex.h>
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#include <linux/interrupt.h>
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struct mc13783 {
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struct spi_device *spidev;
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struct mutex lock;
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int irq;
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int flags;
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irq_handler_t irqhandler[MC13783_NUM_IRQ];
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void *irqdata[MC13783_NUM_IRQ];
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/* XXX these should go as platformdata to the regulator subdevice */
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struct mc13783_regulator_init_data *regulators;
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int num_regulators;
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};
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#define MC13783_REG_INTERRUPT_STATUS_0 0
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#define MC13783_REG_INTERRUPT_MASK_0 1
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#define MC13783_REG_INTERRUPT_SENSE_0 2
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#define MC13783_REG_INTERRUPT_STATUS_1 3
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#define MC13783_REG_INTERRUPT_MASK_1 4
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#define MC13783_REG_INTERRUPT_SENSE_1 5
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#define MC13783_REG_POWER_UP_MODE_SENSE 6
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#define MC13783_REG_REVISION 7
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#define MC13783_REG_SEMAPHORE 8
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#define MC13783_REG_ARBITRATION_PERIPHERAL_AUDIO 9
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#define MC13783_REG_ARBITRATION_SWITCHERS 10
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#define MC13783_REG_ARBITRATION_REGULATORS_0 11
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#define MC13783_REG_ARBITRATION_REGULATORS_1 12
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#define MC13783_REG_POWER_CONTROL_0 13
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#define MC13783_REG_POWER_CONTROL_1 14
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#define MC13783_REG_POWER_CONTROL_2 15
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#define MC13783_REG_REGEN_ASSIGNMENT 16
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#define MC13783_REG_CONTROL_SPARE 17
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#define MC13783_REG_MEMORY_A 18
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#define MC13783_REG_MEMORY_B 19
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#define MC13783_REG_RTC_TIME 20
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#define MC13783_REG_RTC_ALARM 21
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#define MC13783_REG_RTC_DAY 22
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#define MC13783_REG_RTC_DAY_ALARM 23
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#define MC13783_REG_SWITCHERS_0 24
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#define MC13783_REG_SWITCHERS_1 25
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#define MC13783_REG_SWITCHERS_2 26
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#define MC13783_REG_SWITCHERS_3 27
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#define MC13783_REG_SWITCHERS_4 28
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#define MC13783_REG_SWITCHERS_5 29
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#define MC13783_REG_REGULATOR_SETTING_0 30
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#define MC13783_REG_REGULATOR_SETTING_1 31
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#define MC13783_REG_REGULATOR_MODE_0 32
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#define MC13783_REG_REGULATOR_MODE_1 33
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#define MC13783_REG_POWER_MISCELLANEOUS 34
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#define MC13783_REG_POWER_SPARE 35
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#define MC13783_REG_AUDIO_RX_0 36
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#define MC13783_REG_AUDIO_RX_1 37
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#define MC13783_REG_AUDIO_TX 38
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#define MC13783_REG_AUDIO_SSI_NETWORK 39
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#define MC13783_REG_AUDIO_CODEC 40
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#define MC13783_REG_AUDIO_STEREO_DAC 41
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#define MC13783_REG_AUDIO_SPARE 42
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#define MC13783_REG_ADC_0 43
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#define MC13783_REG_ADC_1 44
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#define MC13783_REG_ADC_2 45
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#define MC13783_REG_ADC_3 46
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#define MC13783_REG_ADC_4 47
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#define MC13783_REG_CHARGER 48
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#define MC13783_REG_USB 49
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#define MC13783_REG_CHARGE_USB_SPARE 50
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#define MC13783_REG_LED_CONTROL_0 51
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#define MC13783_REG_LED_CONTROL_1 52
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#define MC13783_REG_LED_CONTROL_2 53
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#define MC13783_REG_LED_CONTROL_3 54
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#define MC13783_REG_LED_CONTROL_4 55
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#define MC13783_REG_LED_CONTROL_5 56
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#define MC13783_REG_SPARE 57
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#define MC13783_REG_TRIM_0 58
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#define MC13783_REG_TRIM_1 59
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#define MC13783_REG_TEST_0 60
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#define MC13783_REG_TEST_1 61
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#define MC13783_REG_TEST_2 62
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#define MC13783_REG_TEST_3 63
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#define MC13783_REG_NB 64
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/*
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* Reg Regulator Mode 0
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*/
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#define MC13783_REGCTRL_VAUDIO_EN (1 << 0)
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#define MC13783_REGCTRL_VAUDIO_STBY (1 << 1)
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#define MC13783_REGCTRL_VAUDIO_MODE (1 << 2)
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#define MC13783_REGCTRL_VIOHI_EN (1 << 3)
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#define MC13783_REGCTRL_VIOHI_STBY (1 << 4)
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#define MC13783_REGCTRL_VIOHI_MODE (1 << 5)
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#define MC13783_REGCTRL_VIOLO_EN (1 << 6)
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#define MC13783_REGCTRL_VIOLO_STBY (1 << 7)
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#define MC13783_REGCTRL_VIOLO_MODE (1 << 8)
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#define MC13783_REGCTRL_VDIG_EN (1 << 9)
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#define MC13783_REGCTRL_VDIG_STBY (1 << 10)
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#define MC13783_REGCTRL_VDIG_MODE (1 << 11)
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#define MC13783_REGCTRL_VGEN_EN (1 << 12)
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||||
#define MC13783_REGCTRL_VGEN_STBY (1 << 13)
|
||||
#define MC13783_REGCTRL_VGEN_MODE (1 << 14)
|
||||
#define MC13783_REGCTRL_VRFDIG_EN (1 << 15)
|
||||
#define MC13783_REGCTRL_VRFDIG_STBY (1 << 16)
|
||||
#define MC13783_REGCTRL_VRFDIG_MODE (1 << 17)
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||||
#define MC13783_REGCTRL_VRFREF_EN (1 << 18)
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||||
#define MC13783_REGCTRL_VRFREF_STBY (1 << 19)
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#define MC13783_REGCTRL_VRFREF_MODE (1 << 20)
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#define MC13783_REGCTRL_VRFCP_EN (1 << 21)
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#define MC13783_REGCTRL_VRFCP_STBY (1 << 22)
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#define MC13783_REGCTRL_VRFCP_MODE (1 << 23)
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/*
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* Reg Regulator Mode 1
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*/
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#define MC13783_REGCTRL_VSIM_EN (1 << 0)
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#define MC13783_REGCTRL_VSIM_STBY (1 << 1)
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#define MC13783_REGCTRL_VSIM_MODE (1 << 2)
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#define MC13783_REGCTRL_VESIM_EN (1 << 3)
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#define MC13783_REGCTRL_VESIM_STBY (1 << 4)
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#define MC13783_REGCTRL_VESIM_MODE (1 << 5)
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#define MC13783_REGCTRL_VCAM_EN (1 << 6)
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#define MC13783_REGCTRL_VCAM_STBY (1 << 7)
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#define MC13783_REGCTRL_VCAM_MODE (1 << 8)
|
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#define MC13783_REGCTRL_VRFBG_EN (1 << 9)
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#define MC13783_REGCTRL_VRFBG_STBY (1 << 10)
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#define MC13783_REGCTRL_VVIB_EN (1 << 11)
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#define MC13783_REGCTRL_VRF1_EN (1 << 12)
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#define MC13783_REGCTRL_VRF1_STBY (1 << 13)
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#define MC13783_REGCTRL_VRF1_MODE (1 << 14)
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#define MC13783_REGCTRL_VRF2_EN (1 << 15)
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#define MC13783_REGCTRL_VRF2_STBY (1 << 16)
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#define MC13783_REGCTRL_VRF2_MODE (1 << 17)
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#define MC13783_REGCTRL_VMMC1_EN (1 << 18)
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#define MC13783_REGCTRL_VMMC1_STBY (1 << 19)
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#define MC13783_REGCTRL_VMMC1_MODE (1 << 20)
|
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#define MC13783_REGCTRL_VMMC2_EN (1 << 21)
|
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#define MC13783_REGCTRL_VMMC2_STBY (1 << 22)
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#define MC13783_REGCTRL_VMMC2_MODE (1 << 23)
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/*
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* Reg Regulator Misc.
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*/
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#define MC13783_REGCTRL_GPO1_EN (1 << 6)
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#define MC13783_REGCTRL_GPO2_EN (1 << 8)
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#define MC13783_REGCTRL_GPO3_EN (1 << 10)
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#define MC13783_REGCTRL_GPO4_EN (1 << 12)
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#define MC13783_REGCTRL_VIBPINCTRL (1 << 14)
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/*
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* Reg Switcher 4
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*/
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#define MC13783_SWCTRL_SW1A_MODE (1 << 0)
|
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#define MC13783_SWCTRL_SW1A_STBY_MODE (1 << 2)
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#define MC13783_SWCTRL_SW1A_DVS_SPEED (1 << 6)
|
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#define MC13783_SWCTRL_SW1A_PANIC_MODE (1 << 8)
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#define MC13783_SWCTRL_SW1A_SOFTSTART (1 << 9)
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#define MC13783_SWCTRL_SW1B_MODE (1 << 10)
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#define MC13783_SWCTRL_SW1B_STBY_MODE (1 << 12)
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#define MC13783_SWCTRL_SW1B_DVS_SPEED (1 << 14)
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#define MC13783_SWCTRL_SW1B_PANIC_MODE (1 << 16)
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#define MC13783_SWCTRL_SW1B_SOFTSTART (1 << 17)
|
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#define MC13783_SWCTRL_PLL_EN (1 << 18)
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#define MC13783_SWCTRL_PLL_FACTOR (1 << 19)
|
||||
|
||||
/*
|
||||
* Reg Switcher 5
|
||||
*/
|
||||
#define MC13783_SWCTRL_SW2A_MODE (1 << 0)
|
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#define MC13783_SWCTRL_SW2A_STBY_MODE (1 << 2)
|
||||
#define MC13783_SWCTRL_SW2A_DVS_SPEED (1 << 6)
|
||||
#define MC13783_SWCTRL_SW2A_PANIC_MODE (1 << 8)
|
||||
#define MC13783_SWCTRL_SW2A_SOFTSTART (1 << 9)
|
||||
#define MC13783_SWCTRL_SW2B_MODE (1 << 10)
|
||||
#define MC13783_SWCTRL_SW2B_STBY_MODE (1 << 12)
|
||||
#define MC13783_SWCTRL_SW2B_DVS_SPEED (1 << 14)
|
||||
#define MC13783_SWCTRL_SW2B_PANIC_MODE (1 << 16)
|
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#define MC13783_SWCTRL_SW2B_SOFTSTART (1 << 17)
|
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#define MC13783_SWSET_SW3 (1 << 18)
|
||||
#define MC13783_SWCTRL_SW3_EN (1 << 20)
|
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#define MC13783_SWCTRL_SW3_STBY (1 << 21)
|
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#define MC13783_SWCTRL_SW3_MODE (1 << 22)
|
||||
|
||||
static inline int mc13783_set_bits(struct mc13783 *mc13783, unsigned int offset,
|
||||
u32 mask, u32 val)
|
||||
{
|
||||
int ret;
|
||||
mc13783_lock(mc13783);
|
||||
ret = mc13783_reg_rmw(mc13783, offset, mask, val);
|
||||
mc13783_unlock(mc13783);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* __LINUX_MFD_MC13783_PRIV_H */
|
||||
|
|
@ -21,6 +21,8 @@ int mc13783_reg_write(struct mc13783 *mc13783, unsigned int offset, u32 val);
|
|||
int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset,
|
||||
u32 mask, u32 val);
|
||||
|
||||
int mc13783_get_flags(struct mc13783 *mc13783);
|
||||
|
||||
int mc13783_irq_request(struct mc13783 *mc13783, int irq,
|
||||
irq_handler_t handler, const char *name, void *dev);
|
||||
int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq,
|
||||
|
|
|
|||
201
include/linux/mfd/stmpe.h
Normal file
201
include/linux/mfd/stmpe.h
Normal file
|
|
@ -0,0 +1,201 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* License Terms: GNU General Public License, version 2
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_STMPE_H
|
||||
#define __LINUX_MFD_STMPE_H
|
||||
|
||||
#include <linux/device.h>
|
||||
|
||||
enum stmpe_block {
|
||||
STMPE_BLOCK_GPIO = 1 << 0,
|
||||
STMPE_BLOCK_KEYPAD = 1 << 1,
|
||||
STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
|
||||
STMPE_BLOCK_ADC = 1 << 3,
|
||||
STMPE_BLOCK_PWM = 1 << 4,
|
||||
STMPE_BLOCK_ROTATOR = 1 << 5,
|
||||
};
|
||||
|
||||
enum stmpe_partnum {
|
||||
STMPE811,
|
||||
STMPE1601,
|
||||
STMPE2401,
|
||||
STMPE2403,
|
||||
};
|
||||
|
||||
/*
|
||||
* For registers whose locations differ on variants, the correct address is
|
||||
* obtained by indexing stmpe->regs with one of the following.
|
||||
*/
|
||||
enum {
|
||||
STMPE_IDX_CHIP_ID,
|
||||
STMPE_IDX_ICR_LSB,
|
||||
STMPE_IDX_IER_LSB,
|
||||
STMPE_IDX_ISR_MSB,
|
||||
STMPE_IDX_GPMR_LSB,
|
||||
STMPE_IDX_GPSR_LSB,
|
||||
STMPE_IDX_GPCR_LSB,
|
||||
STMPE_IDX_GPDR_LSB,
|
||||
STMPE_IDX_GPEDR_MSB,
|
||||
STMPE_IDX_GPRER_LSB,
|
||||
STMPE_IDX_GPFER_LSB,
|
||||
STMPE_IDX_GPAFR_U_MSB,
|
||||
STMPE_IDX_IEGPIOR_LSB,
|
||||
STMPE_IDX_ISGPIOR_MSB,
|
||||
STMPE_IDX_MAX,
|
||||
};
|
||||
|
||||
|
||||
struct stmpe_variant_info;
|
||||
|
||||
/**
|
||||
* struct stmpe - STMPE MFD structure
|
||||
* @lock: lock protecting I/O operations
|
||||
* @irq_lock: IRQ bus lock
|
||||
* @dev: device, mostly for dev_dbg()
|
||||
* @i2c: i2c client
|
||||
* @variant: the detected STMPE model number
|
||||
* @regs: list of addresses of registers which are at different addresses on
|
||||
* different variants. Indexed by one of STMPE_IDX_*.
|
||||
* @irq_base: starting IRQ number for internal IRQs
|
||||
* @num_gpios: number of gpios, differs for variants
|
||||
* @ier: cache of IER registers for bus_lock
|
||||
* @oldier: cache of IER registers for bus_lock
|
||||
* @pdata: platform data
|
||||
*/
|
||||
struct stmpe {
|
||||
struct mutex lock;
|
||||
struct mutex irq_lock;
|
||||
struct device *dev;
|
||||
struct i2c_client *i2c;
|
||||
enum stmpe_partnum partnum;
|
||||
struct stmpe_variant_info *variant;
|
||||
const u8 *regs;
|
||||
|
||||
int irq_base;
|
||||
int num_gpios;
|
||||
u8 ier[2];
|
||||
u8 oldier[2];
|
||||
struct stmpe_platform_data *pdata;
|
||||
};
|
||||
|
||||
extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
|
||||
extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
|
||||
extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
|
||||
u8 *values);
|
||||
extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
|
||||
const u8 *values);
|
||||
extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
|
||||
extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
|
||||
enum stmpe_block block);
|
||||
extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
|
||||
extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
|
||||
|
||||
struct matrix_keymap_data;
|
||||
|
||||
/**
|
||||
* struct stmpe_keypad_platform_data - STMPE keypad platform data
|
||||
* @keymap_data: key map table and size
|
||||
* @debounce_ms: debounce interval, in ms. Maximum is
|
||||
* %STMPE_KEYPAD_MAX_DEBOUNCE.
|
||||
* @scan_count: number of key scanning cycles to confirm key data.
|
||||
* Maximum is %STMPE_KEYPAD_MAX_SCAN_COUNT.
|
||||
* @no_autorepeat: disable key autorepeat
|
||||
*/
|
||||
struct stmpe_keypad_platform_data {
|
||||
struct matrix_keymap_data *keymap_data;
|
||||
unsigned int debounce_ms;
|
||||
unsigned int scan_count;
|
||||
bool no_autorepeat;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct stmpe_gpio_platform_data - STMPE GPIO platform data
|
||||
* @gpio_base: first gpio number assigned. A maximum of
|
||||
* %STMPE_NR_GPIOS GPIOs will be allocated.
|
||||
*/
|
||||
struct stmpe_gpio_platform_data {
|
||||
int gpio_base;
|
||||
void (*setup)(struct stmpe *stmpe, unsigned gpio_base);
|
||||
void (*remove)(struct stmpe *stmpe, unsigned gpio_base);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct stmpe_ts_platform_data - stmpe811 touch screen controller platform
|
||||
* data
|
||||
* @sample_time: ADC converstion time in number of clock.
|
||||
* (0 -> 36 clocks, 1 -> 44 clocks, 2 -> 56 clocks, 3 -> 64 clocks,
|
||||
* 4 -> 80 clocks, 5 -> 96 clocks, 6 -> 144 clocks),
|
||||
* recommended is 4.
|
||||
* @mod_12b: ADC Bit mode (0 -> 10bit ADC, 1 -> 12bit ADC)
|
||||
* @ref_sel: ADC reference source
|
||||
* (0 -> internal reference, 1 -> external reference)
|
||||
* @adc_freq: ADC Clock speed
|
||||
* (0 -> 1.625 MHz, 1 -> 3.25 MHz, 2 || 3 -> 6.5 MHz)
|
||||
* @ave_ctrl: Sample average control
|
||||
* (0 -> 1 sample, 1 -> 2 samples, 2 -> 4 samples, 3 -> 8 samples)
|
||||
* @touch_det_delay: Touch detect interrupt delay
|
||||
* (0 -> 10 us, 1 -> 50 us, 2 -> 100 us, 3 -> 500 us,
|
||||
* 4-> 1 ms, 5 -> 5 ms, 6 -> 10 ms, 7 -> 50 ms)
|
||||
* recommended is 3
|
||||
* @settling: Panel driver settling time
|
||||
* (0 -> 10 us, 1 -> 100 us, 2 -> 500 us, 3 -> 1 ms,
|
||||
* 4 -> 5 ms, 5 -> 10 ms, 6 for 50 ms, 7 -> 100 ms)
|
||||
* recommended is 2
|
||||
* @fraction_z: Length of the fractional part in z
|
||||
* (fraction_z ([0..7]) = Count of the fractional part)
|
||||
* recommended is 7
|
||||
* @i_drive: current limit value of the touchscreen drivers
|
||||
* (0 -> 20 mA typical 35 mA max, 1 -> 50 mA typical 80 mA max)
|
||||
*
|
||||
* */
|
||||
struct stmpe_ts_platform_data {
|
||||
u8 sample_time;
|
||||
u8 mod_12b;
|
||||
u8 ref_sel;
|
||||
u8 adc_freq;
|
||||
u8 ave_ctrl;
|
||||
u8 touch_det_delay;
|
||||
u8 settling;
|
||||
u8 fraction_z;
|
||||
u8 i_drive;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct stmpe_platform_data - STMPE platform data
|
||||
* @id: device id to distinguish between multiple STMPEs on the same board
|
||||
* @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
|
||||
* @irq_trigger: IRQ trigger to use for the interrupt to the host
|
||||
* @irq_invert_polarity: IRQ line is connected with reversed polarity
|
||||
* @autosleep: bool to enable/disable stmpe autosleep
|
||||
* @autosleep_timeout: inactivity timeout in milliseconds for autosleep
|
||||
* @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or
|
||||
* %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
|
||||
* @gpio: GPIO-specific platform data
|
||||
* @keypad: keypad-specific platform data
|
||||
* @ts: touchscreen-specific platform data
|
||||
*/
|
||||
struct stmpe_platform_data {
|
||||
int id;
|
||||
unsigned int blocks;
|
||||
int irq_base;
|
||||
unsigned int irq_trigger;
|
||||
bool irq_invert_polarity;
|
||||
bool autosleep;
|
||||
int autosleep_timeout;
|
||||
|
||||
struct stmpe_gpio_platform_data *gpio;
|
||||
struct stmpe_keypad_platform_data *keypad;
|
||||
struct stmpe_ts_platform_data *ts;
|
||||
};
|
||||
|
||||
#define STMPE_NR_INTERNAL_IRQS 9
|
||||
#define STMPE_INT_GPIO(x) (STMPE_NR_INTERNAL_IRQS + (x))
|
||||
|
||||
#define STMPE_NR_GPIOS 24
|
||||
#define STMPE_NR_IRQS STMPE_INT_GPIO(STMPE_NR_GPIOS)
|
||||
|
||||
#endif
|
||||
47
include/linux/mfd/tps6586x.h
Normal file
47
include/linux/mfd/tps6586x.h
Normal file
|
|
@ -0,0 +1,47 @@
|
|||
#ifndef __LINUX_MFD_TPS6586X_H
|
||||
#define __LINUX_MFD_TPS6586X_H
|
||||
|
||||
enum {
|
||||
TPS6586X_ID_SM_0,
|
||||
TPS6586X_ID_SM_1,
|
||||
TPS6586X_ID_SM_2,
|
||||
TPS6586X_ID_LDO_0,
|
||||
TPS6586X_ID_LDO_1,
|
||||
TPS6586X_ID_LDO_2,
|
||||
TPS6586X_ID_LDO_3,
|
||||
TPS6586X_ID_LDO_4,
|
||||
TPS6586X_ID_LDO_5,
|
||||
TPS6586X_ID_LDO_6,
|
||||
TPS6586X_ID_LDO_7,
|
||||
TPS6586X_ID_LDO_8,
|
||||
TPS6586X_ID_LDO_9,
|
||||
TPS6586X_ID_LDO_RTC,
|
||||
};
|
||||
|
||||
struct tps6586x_subdev_info {
|
||||
int id;
|
||||
const char *name;
|
||||
void *platform_data;
|
||||
};
|
||||
|
||||
struct tps6586x_platform_data {
|
||||
int num_subdevs;
|
||||
struct tps6586x_subdev_info *subdevs;
|
||||
|
||||
int gpio_base;
|
||||
};
|
||||
|
||||
/*
|
||||
* NOTE: the functions below are not intended for use outside
|
||||
* of the TPS6586X sub-device drivers
|
||||
*/
|
||||
extern int tps6586x_write(struct device *dev, int reg, uint8_t val);
|
||||
extern int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val);
|
||||
extern int tps6586x_read(struct device *dev, int reg, uint8_t *val);
|
||||
extern int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val);
|
||||
extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
|
||||
extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
|
||||
extern int tps6586x_update(struct device *dev, int reg, uint8_t val,
|
||||
uint8_t mask);
|
||||
|
||||
#endif /*__LINUX_MFD_TPS6586X_H */
|
||||
|
|
@ -36,6 +36,10 @@
|
|||
#define WM8994_GP_FN_WSEQ_STATUS 16
|
||||
#define WM8994_GP_FN_FIFO_ERROR 17
|
||||
#define WM8994_GP_FN_OPCLK 18
|
||||
#define WM8994_GP_FN_THW 19
|
||||
#define WM8994_GP_FN_DCS_DONE 20
|
||||
#define WM8994_GP_FN_FLL1_OUT 21
|
||||
#define WM8994_GP_FN_FLL2_OUT 22
|
||||
|
||||
#define WM8994_GPN_DIR 0x8000 /* GPN_DIR */
|
||||
#define WM8994_GPN_DIR_MASK 0x8000 /* GPN_DIR */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue