sparc32: fix build of pcic
Left-overs for an earlier iteration of the generic clock events patch removed. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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					 1 changed files with 3 additions and 3 deletions
				
			
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					@ -722,7 +722,7 @@ static unsigned int pcic_cycles_offset(void)
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	 */
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						 */
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	count = ((count / HZ) * USECS_PER_JIFFY) / (TICK_TIMER_LIMIT / HZ);
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						count = ((count / HZ) * USECS_PER_JIFFY) / (TICK_TIMER_LIMIT / HZ);
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	/* Coordinate with the fact that timer_cs rate is 2MHz */
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						/* Coordinate with the sparc_config.clock_rate setting */
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	return count * 2;
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						return count * 2;
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}
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					}
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					@ -735,10 +735,10 @@ void __init pci_time_init(void)
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#ifndef CONFIG_SMP
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					#ifndef CONFIG_SMP
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	/*
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						/*
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	 * It's in SBUS dimension, because timer_cs is in this dimension.
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						 * The clock_rate is in SBUS dimension.
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	 * We take into account this in pcic_cycles_offset()
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						 * We take into account this in pcic_cycles_offset()
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	 */
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						 */
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	timer_cs_period = SBUS_CLOCK_RATE / HZ;
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						sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ;
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	sparc_config.features |= FEAT_L10_CLOCKEVENT;
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						sparc_config.features |= FEAT_L10_CLOCKEVENT;
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#endif
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					#endif
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	sparc_config.features |= FEAT_L10_CLOCKSOURCE;
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						sparc_config.features |= FEAT_L10_CLOCKSOURCE;
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